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1038 Commits

Author SHA1 Message Date
Stanislav Shwartsman
8b55085c76 Merge tss286 and tss386 segment descriptor cache fields to one structure 2006-05-21 20:41:48 +00:00
Stanislav Shwartsman
d00b2dec1d LDTR and TR type check in assert_check 2006-05-21 19:31:23 +00:00
Stanislav Shwartsman
73e1266cbe Add CR0 consistency checks and CS.L/CS.D consistency check 
Optimize icache writestamps - 2x more space to decrement for page-write-stamp
 2006-05-19 20:04:33 +00:00
Stanislav Shwartsman
274e17a1fc Remove unneeded function 2006-05-18 20:16:15 +00:00
Stanislav Shwartsman
8db1de7124 - Fixed several issues, each cause to NullTimer function never be called, the method is required for icache correct functionalit 
- Speed-up icache by correct purging of Icache entries
- Several new assertions for timers, to prevent bugs in future
 2006-05-16 20:55:55 +00:00
Stanislav Shwartsman
7acb46cd3d Small cleanup in cpu.cc 2006-05-16 16:47:00 +00:00
Stanislav Shwartsman
16713b309d PALIGNR fixed 2006-05-16 16:20:26 +00:00
Stanislav Shwartsman
7c2c9c41e8 Remove unused CPU vars 2006-05-15 18:00:55 +00:00
Stanislav Shwartsman
f4c7b4074e Support for x86-64 in x86 debugger (DR0-DR7) 2006-05-13 12:49:45 +00:00
Stanislav Shwartsman
9a32d0e98f Optimize debug registers handling 2006-05-13 12:29:12 +00:00
Stanislav Shwartsman
fc799ab623 FetchDecode tables are constant. Marking them const implicitly will help to compiler/linker in optimization. 2006-05-12 18:03:26 +00:00
Stanislav Shwartsman
fe644dfcbf - Code cleanup, remove x86-64 code from functions which cannot be called from x86-64 
- Fix PANIC multiple SSE prefix decoding (fetchdecode and disasm)
- More Bit32u -> bx_phy_address convert
- Lazy flags optimization
 2006-05-12 17:04:19 +00:00
Stanislav Shwartsman
b0e49a9a05 Warn if somebody used BSWAP with 16-bit opsize (behavior undefined) 2006-05-07 20:56:40 +00:00
Stanislav Shwartsman
91ada6c72c Separate RepeatSpeedups code in io.cc to stand-alone CPU methods 
FestRepINSW and FastRepOUTSW similar to that is done in string.cc
Done to simplify the code, it was just impossible to understand it.
 2006-05-07 20:45:42 +00:00
Stanislav Shwartsman
20b14aefa6 Fix in BSWAP 64-bit mode - allow to use additional R8-R15 registers 
Also fixed code duplication story with BSWAP instruction
 2006-05-07 18:58:47 +00:00
Stanislav Shwartsman
d69eba6c07 Split in/out instructions based on operand size 2006-05-07 18:27:36 +00:00
Stanislav Shwartsman
767fb77ebd Fully handle segment limits inside prefetch method. 
1. Should speed up the simulation (eliminate seg.limit check per every instruction exec)
2. Should help for DT (h.johansson request)
 2006-05-04 19:54:25 +00:00
Volker Ruppert
9340f3b3f8 - partial sync with BRANCH_SAVE_RESTORE_3 (hardware save/restore not present yet) 
* changed data format of text files for save/restore (looks like C/C++ structures,
    similar to the format used in old save/restore branches)
  * don't set the initial value of shadow bool parameters
  * don't set the initial value of bool parameters twice
  * cpu/init.cc: missing #undef added
  * ne2k.cc: variable tx_timer_active was never set to 1 (type now bx_bool)
  * floppy.cc: missing initialization of the 'eot' array in reset() added
  * pic.h: type of member 'byte_expected' changed to Bit8u
  * pit_wrap.h: unused members removed
 2006-05-01 18:24:47 +00:00
Stanislav Shwartsman
f93ab35357 Flush TLB for all CPUs when memory mapping information changed by system (A20 change, PAM write or similar events) 2006-04-29 17:21:49 +00:00
Stanislav Shwartsman
199c987ee3 Return back (modified) dbg_is_end_instr_bpoint method in cpu.cc 2006-04-29 16:14:47 +00:00
Stanislav Shwartsman
2889ed190c Removed icount guard for debugger. Implement STEPN debugger command using CPU_LOOP method capabilities 2006-04-29 09:27:49 +00:00
Stanislav Shwartsman
1a0b7ee1e3 I want to replace debugger ICOUNT guard by existent cpu_loop funtionality, first step to do that ... 2006-04-29 07:12:13 +00:00
Stanislav Shwartsman
510cbe02e2 Make fetchInstruction INLINE according to hjjhansson patch 2006-04-28 16:45:29 +00:00
Stanislav Shwartsman
003c2f59e6 Added missed CVS header to several files 2006-04-27 15:11:45 +00:00
Stanislav Shwartsman
bb1116e569 Fixed bx_cpu_c::MOVD_EdVd () always UDs 
reported in mailing list
 2006-04-27 06:09:56 +00:00
Stanislav Shwartsman
798c90ee85 Fixed comments 2006-04-26 14:05:28 +00:00
Stanislav Shwartsman
4b86ae3917 Added new ar_byte function, might be used to fix code duplication and for save-restore 2006-04-25 15:35:26 +00:00
Stanislav Shwartsman
b2408c2fca Added assertion check CPU method, could be used for "debug mode" run with checking various assumptions before each instruction emulation 2006-04-25 14:42:57 +00:00
Stanislav Shwartsman
1939544bf8 move get_descriptor_l/get_descriptor_h methods to general cpu methods (were debugger only) 2006-04-23 17:16:27 +00:00
Stanislav Shwartsman
63dc4d4e10 Fixed CR4 GP(0) condition (patch by no_mayl in mailing list) 2006-04-23 16:11:16 +00:00
Stanislav Shwartsman
cc29f3d94b Remove duplicate ';' 2006-04-23 16:03:46 +00:00
Stanislav Shwartsman
44afbdcd82 Implemented FXSAVE/FXRSTOR for FOO/FIP/FDP fields 2006-04-23 16:01:34 +00:00
Stanislav Shwartsman
ff02bc8ef0 Fixed: 
With cvs snapshot 2006-04-09, --enable-debugger does not show the executed instructions anymore after being enabled via iodebug or "trace on".
 2006-04-23 15:37:25 +00:00
Volker Ruppert
52c4666465 - partial sync with BRANCH_SAVE_RESTORE_3 (hardware save/restore not present yet) 
* fixed minimum limit of signed variable types
  * don't set the initial value of shadow parameters
  * fixed range check for shadow parameters
  * added support for setting the value base (decimal/hex) of numeric shadow parameters.
    The text format hex number is now initialized in the constructor
  * added missing newline after filename for binary data
  * fixed data size of 64-bit shadow parameters
  * fixed save/restore output format of numeric parameters (signed/unsigned/64-bit)
  * cpu/init.cc: fixed macro name and added missing #undef line
 2006-04-22 18:14:55 +00:00
Volker Ruppert
eb2104d0de - parameters for the wx debugger moved to a separate subtree to avoid conflicts 
with the proposed save/restore feature
- fixed a warning in the cpu parameter handler for the wx debugger
 2006-04-16 10:12:32 +00:00
Stanislav Shwartsman
d972e4a4b7 Fixed CR3 restore in RSM instruction 
Added HALT state indication (actually make existant one working for single CPU)
 2006-04-10 19:05:21 +00:00
Stanislav Shwartsman
e7565760f7 Fixed compilation error when DEBUGGER is enabled 2006-04-07 20:53:39 +00:00
Stanislav Shwartsman
45f30f0a4c some code written to enter CPU to shutdown state. 
finally the shutdown handling should be done exactly as in VmWare - the GUI should ask user if the CPU should reset and go to HLT/IF=0 if user choosed to stay in shutdown mode.
CPU configure option reset-on-triple-failt should be extended to shutdown-reset=0|1
small code cleanups and fixes
 2006-04-07 20:47:32 +00:00
Stanislav Shwartsman
7a1d0a53d7 Small cleanup 2006-04-06 18:45:54 +00:00
Stanislav Shwartsman
03eac64013 Added decoding of new SSE4 instructions (recently published in Intel docs) 
At least CPUID detects them correctly
The code is never tested (still) ! (but should work fine)
 2006-04-06 18:30:05 +00:00
Stanislav Shwartsman
c8cc6bcd14 Remove code duplication from SMM code 2006-04-06 16:47:29 +00:00
Stanislav Shwartsman
9dc1790f07 Simplify and optimize fetchdecode methods. 
Now fetchdecode is simpler to understand and easier to modify, for example to support 3-byte opcodes (SSE4)
 2006-04-05 20:52:40 +00:00
Stanislav Shwartsman
b9dedc8412 Added missed file from prev commit (waiting for moderator approval, message is too big) 
Summary changes:
- Fixed critical ICACHE bug from one of the recent commits
- Complete preliminary SMM implemntation, SMI still PANICs but 'alwayscont' should work fine
- Correctly decode, disassemble and execute 'XCHG R8, rAX' x86-64 instruction
- Correctly decode, disassemble and execute multi-byte NOP 0F F1 opcode
- Fixed ENTER and LEAVE instructions in x86-64 mode
- Disasm SSE4 instructions
- Rename PNI->SSE3 everywhere in the code
 2006-04-05 17:44:04 +00:00
Stanislav Shwartsman
f8c3968d42 Changes list made after CVS service crash: 
- Fixed critical bug in CPU code added with one of the prev commits
  - Disasm support for SSE4
  - Rename PNI->SSE3 everywhere in the code
  - Correctly decode, disassemble and execute 'XCHG R8, rAX' x86-64 instruction
  - Correctly decode, disassemble and execute multi-byte NOP 0F F1 opcode
  - Fixed ENTER and LEAVE instructions in x86-64 mode
  - Added ability to turn ON instruction trace, only GUI support is missed.
    Instruction trace could be enabled if Bochs was compiled with disasm
  - More changes Bit32u -> bx_phy_address
  - Complete preliminary implementation of SMM in Bochs, SMI is still PANICs but if you press 'continue' everything should work OK
  - Small code cleanup
  - Update CHANGES and user docs
 2006-04-05 17:31:35 +00:00
Stanislav Shwartsman
a6c3ffeeb5 Fixed compilation error 2006-03-29 19:16:24 +00:00
Stanislav Shwartsman
ae2ea87c43 More fixes for SMM 2006-03-29 18:08:13 +00:00
Stanislav Shwartsman
4fd9bd53c3 Change Bit32u -> bx_phy_address in memory 2006-03-28 16:53:02 +00:00
Stanislav Shwartsman
42aac37624 Fixed complilation error 2006-03-27 20:09:37 +00:00
Stanislav Shwartsman
da3d26d7f4 Preliminary implemntation of SMM save statei 
Fixed fetchModeMask for load32bitOsStack
 2006-03-27 18:02:07 +00:00
Stanislav Shwartsman
b8be848943 Use access_type param in getHostMemAddr, less efficient but no copy-paste at least 2006-03-26 19:39:37 +00:00