Commit Graph

539 Commits

Author SHA1 Message Date
Alexander von Gluck IV
87628f17eb intel_extreme: Add additional more recent PCH devices
Change-Id: Ib9f7dc187300c9f746bca9fd7f721c1954f5be44
2018-06-11 20:34:14 -05:00
Augustin Cavalier
52d1e93353 Revert "intel_extreme: Broadwell is really Gen7(.5), not 8."
This reverts commit 4f059c1fc5.

From discussion on the mailing list, it seems I was correct the first time
and Broadwell is Gen8. The confusion comes from the SER5/SOC distinction,
which is not in the Linux driver, and I still don't know which one it really
belongs in.
2018-06-05 21:07:59 -04:00
Augustin Cavalier
4f059c1fc5 intel_extreme: Broadwell is really Gen7(.5), not 8. 2018-06-05 17:27:45 +00:00
Alexander von Gluck IV
7f167d4f4a radeon_hd/dp: Fix bug in lane training. Kudos gcc7
* GCC7's static analysis found this one and it still
  took #gcc and me a while to spot. Nice work gcc7!
* Should help DisplayPort training issues :-)

Change-Id: I9b47f13c95e622a2c08ff329ec9c3fc7e3db493d
2018-05-21 18:02:32 -05:00
Augustin Cavalier
361f980f9d More "missing space after macro; invalid in C++11" error fixes. 2017-12-12 20:08:26 -05:00
Adrien Destugues
8ddec194c6 intel_extreme: backlight control on pre-PCH devices
Thanks to oco for letting me test this on his old laptop.
2017-11-23 23:59:39 +01:00
Augustin Cavalier
164e4f8de4 intel_extreme: Beginnings of Broadwell support.
At present, does not work (it fails to properly set up interrupts,
resulting in thousands of unhandled ones which all but grinds the system
to a halt) but this at least is some progress.
2017-11-21 23:37:18 +00:00
Adrien Destugues
3a2b67b5ae Support for configuring screen backlight
Accelerant interface:
Introduce new hooks B_SET_BRIGHTNESS and B_GET_BRIGHTNESS. Brightness is
a float in the 0..1 range.

App_server:
Forward brightness things between BScreen and the accelerant.

intel_extreme:
Implement the hooks. Note that this only works for laptop panels, but
the driver will pretend to support it in other cases as well.

Screen preferences:
If the accelerant supports the B_GET_BRIGHTNESS hook, allow to set
brightness with a slider. Otherwise, the slidere is hidden and these
changes aren't visible.
2017-11-21 09:12:18 +01:00
Augustin Cavalier
9d8a58ea46 nvidia_gpgpu: Remove from tree.
Was nothing but a slightly-stripped version of the nvidia driver,
not touched substantially in nearly 10 years, and the cards it was
originally going to support (but never got anywhere near so) have long since
been deprecated.
2017-09-30 21:27:47 -04:00
Alexander von Gluck IV
2da9ebb7f3 radeon_hd: Drop dp config array from dp_info
* Caching these values could result in missed
  state changes.
* We may want to re-implement later.
* Highlights that all DP AUX communication is broken
  during my testing.
2017-09-29 11:10:56 -05:00
Alexander von Gluck IV
4bcba8a84f radeon_hd: Add missing FirePro, Add vega, cleanup names.
* Vega is 100% untested.
* I think AMD is doing away with the DCE version numbers.
2017-09-22 15:58:49 -05:00
Alexander von Gluck IV
66a16010b7 radeon_hd: Add missing DP STATUS request type
* Name change inline with DP specifications.
2017-09-08 18:02:32 -05:00
Alexander von Gluck IV
25a087bc7c radeon_hd: AtomBIOS version bump. Encoder work.
* Now pulling in latest amdgpu atombios.h headers
* Lots of DisplayPort cleanup and removal of legacy stuff
* Add obsolete atombios header for things that disappear
  (amdgpu doesn't support older cards like we do)
* Introduce new code to support later encoder tables
* Drop radeon-specific encoder service from common dp_info
* Tested on HD 5450 hdmi
2016-10-05 13:54:24 -05:00
Alexander von Gluck IV
38f17b01ce radeon_hd: Polaris10 power distribution fix
* Helps prevent mainboard explosions and other bad stuff.
* ...maybe not explosions, but bad things.
* The RX 480 reference design can pull as much as 90W
  from its PCIe slot at load. PCIe is rated for 75W.
* This change overloads the PCIe power cables vs the PCIe
  slot. The PCIe power cables can handle going over spec.
* Untested since we really can't come close to loading a
  RX 480 without hardware OpenGL ^_^
* Should be able to test on real hardware within a week.
2016-09-28 15:46:14 -05:00
Adrien Destugues
187ad82a62 intel_extreme: fix wait_for_vblank on SandyBridge
There was some mixup with the interrupt registers, still:
- The driver uses 16-bit read/write, but on SandyBridge the register is
  32 bits
- There is a global interrupt enable bit, which must be set to unmask
  everything else
- The bits for vblank interrupt are not the same on SNB and later PCH
  based devices, and the code mixed the two.

Move the computation of the interrupt bits to an helper function, and
use it everywhere to make sure we always use the right bits.
2016-08-26 21:45:38 +02:00
Adrien Destugues
adc0f76e64 More SandyBridge fixes and cleanups
Modesetting
===========

My previous hack was setting the transcoder registers, instead of the
display ones. Do that the way it is designed in the driver instead:

- If there is a transcoder, set its registers, but do not set the
display timings. The display will remain set at its native (and only)
resolution, and panel fitting will adjust the output of the transcoder
to match.
- If there is no transcoder, set the display registers directly to the
native resolution, as it was done on previous generation devices.
- fPipeOffset hacks no longer needed

DPMS
====

It seems the panel control register is not readable on PCH? Anyway, the
code would loop forever waiting for the bit to become unset when turning
the display off. Waiting seems to not be needed, so just remove it as
well as the "unlock" bit, which does not work for me and results in a
black screen.

Remaining hacks
===============

I still need to force HEAD_MODE_A_ANALOG to get output on pipe B (LVDS
display) working. I suspect something is common to the two pipes or not
allocated to the right one.

This version will have less side effects on other generations and help
with getting things to work on SandyBridge and possibly later devices.
Please test and report.
2016-08-25 23:17:12 +02:00
Adrien Destugues
bb4190f050 Fix SandyBridge support.
This reverts commit 4f2b258c32.
This reverts commit c86f3dba23.
This reverts commit 61fbdb0667.
This reverts commit b3f14fb7c7.
2016-08-21 16:54:03 +02:00
Alexander von Gluck IV
95b6439eec intel_extreme: Implement Snb PCH FDI link training 2016-07-29 17:49:59 -05:00
Alexander von Gluck IV
c0d4def4e4 intel_extreme: Implement Ilk PCH FDI link training
* IronLake tested and FDI says it trains successfully
* Still no LVDS video on Ilk
2016-07-29 16:04:40 -05:00
Alexander von Gluck IV
f6c32ce310 intel_extreme: Set FDI PLL RX lane count when enabling 2016-07-20 00:25:38 -05:00
Alexander von Gluck IV
a933bb4cbc intel_extreme: IronLake reference clock activation 2016-07-17 15:25:08 -05:00
Alexander von Gluck IV
92e254d047 intel_extreme: Improve PCH detection
* Detect PCH model based on ISA bridge and save
  into shared info for later use.
* On CougarPoint PCH systems, assign pipes via
  special CPT registers
* Drop HasPlatformControlHub as PCH should be
  based on more than just generation.
2016-07-10 21:02:01 -05:00
Alexander von Gluck IV
30d631c821 radeon_hd: Add new Polaris GPU, untested 2016-06-30 15:09:59 -05:00
Alexander von Gluck IV
8fe5054828 intel_extreme: Extend DDI port probing to A-E
* The Linux code made this a bit hard to figure out via
  complex define functions, however there can be up to
  5 DDI ports (A-E)
2016-05-08 15:40:57 -05:00
Alexander von Gluck IV
8d1cb54aac intel_extreme: Add in some code for the lakes (unused) 2016-04-22 22:41:52 -05:00
Alexander von Gluck IV
ca95e9dad9 intel_extreme: Add initial work for DDI ports 2016-03-15 18:12:28 -05:00
Alexander von Gluck IV
3d1bd895ad intel_extreme: Properly use VBIOS panel mode
* Move current_mode into the accelerant as the
  driver doesn't care.
* Record panel_mode in driver and present to accelerant
* eDP, if no EDID and mobile, leave edid incomplete.
  Mode set should notice that and fall back to panel_mode
2016-03-11 18:20:28 -06:00
Alexander von Gluck IV
a81f65eae5 Merge branch 'master' into intel-extreme 2016-03-09 17:11:08 -06:00
Alexander von Gluck IV
721ba9af43 intel_extreme: Clean up DisplayPort Port class
* DisplayPort != DigitalPort
* i2c needs wrapped in DP AUX transaction code
* Mode-setting comes with DP link training as well
* We need to try and share DP code with radeon_hd
2016-02-23 14:10:14 -06:00
Alexander von Gluck IV
9975620612 intel_extreme: Prepare for DisplayPort AUX comms 2016-02-23 13:39:10 -06:00
Jérôme Duval
f369957d03 via.accelerant: move enums out of the struct. 2016-02-19 22:33:41 +01:00
Alexander von Gluck IV
bab64f65bb Merge remote-tracking branch 'upstream/master' into intel-extreme 2016-02-19 10:17:42 -06:00
Alexander von Gluck IV
c9c61669ea intel_extreme: Add general pipe configuration and adjust color space 2016-02-19 00:09:43 -06:00
Rudolf Cornelissen
0fa7d5c4df VIA gfx driver: overlay engine on K8M800 responds now, wip. 2016-01-23 23:46:22 +01:00
Rudolf Cornelissen
14de50bad7 VIA gfx driver:K8M800 now works (fixed PLL), fixed info in GetDeviceInfo 2016-01-13 01:01:32 +01:00
Rudolf Cornelissen
b0c69e8490 nVidia driver: added option to block EDID resolution restrictions (check_edid) 2016-01-05 23:49:00 +01:00
RudolfC
063436816d nVidia driver: Added basic dualhead support for native Haiku ScreenPrefs app 2016-01-04 22:17:48 +00:00
Alexander von Gluck IV
d35a52e8e2 intel_extreme: Fix i965 LVDS panel programming
* polarity regs move on LVDS vs analog
* add knowledge or transcoder registers, they
  exist seperately on PCH-split
* Native resolutions now work on LVDS under i965
2016-01-03 10:46:13 -06:00
Alexander von Gluck IV
0ea662e5e9 intel_extreme: Correct panel control register on non-pch 2015-12-15 07:23:21 -06:00
Alexander von Gluck IV
3cfe299798 intel_extreme: Rework PLL and id PineView as PIN 2015-12-04 13:34:33 -06:00
Alexander von Gluck IV
e6fefa6cbf intel_extreme: More FDI training work
* IvyBridge or higher can auto-train.
* Linux doesn't use this feature, however
  manual FDI link training is *really*
  complex... lets try auto-training first.
2015-11-19 17:49:51 -06:00
Alexander von Gluck IV
aa06863ccd intel_extreme: Enable / Disable FDI TX/RX 2015-11-19 13:26:55 -06:00
Alexander von Gluck IV
00e0982f68 intel_extreme: First work at programming FDI 2015-11-17 23:28:09 -06:00
Alexander von Gluck IV
e5494f1bb2 intel_extreme: Fix DP / HDMI gpu register location mixup on die 2015-11-16 20:41:14 -06:00
Alexander von Gluck IV
202ffc8cca intel_extreme: Bump the VLV offset back a bit and fix port defines 2015-11-16 19:58:51 -06:00
Alexander von Gluck IV
f979e62e54 intel_extreme: Program more LVDS regs. Set +/- @ lvds port 2015-11-12 18:30:21 -06:00
Alexander von Gluck IV
92bcdd7935 intel_extreme: Add initial TMDS modesetting code 2015-11-09 09:26:07 -06:00
Alexander von Gluck IV
d442692fab intel_extreme: Correct DP port registers 2015-11-09 09:15:16 -06:00
Alexander von Gluck IV
61fbdb0667 intel_extreme: Set mode and pll via pipe-aware class functions 2015-11-08 23:14:46 -06:00
Alexander von Gluck IV
37b903fbc8 intel_extreme: Add pipe selection for ports 2015-11-08 10:39:07 -06:00