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intel_extreme: Bump the VLV offset back a bit and fix port defines

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This commit is contained in:
Alexander von Gluck IV 2015-11-16 19:58:51 -06:00
parent 21e840d154
commit 202ffc8cca
2 changed files with 4 additions and 5 deletions
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6
headers/private/graphics/intel_extreme/intel_extreme.h
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@ -512,9 +512,9 @@ struct intel_free_graphics_memory {
#define PCH_HDMI_PORT_C (0x1150 | REGS_SOUTH_TRANSCODER_PORT)
#define PCH_HDMI_PORT_D (0x1160 | REGS_SOUTH_TRANSCODER_PORT)
#define GEN4_HDMI_PORT_B (0x1140 | REGS_NORTH_PIPE_AND_PORT)
#define GEN4_HDMI_PORT_C (0x1160 | REGS_NORTH_PIPE_AND_PORT)
#define CHV_HDMI_PORT_D (0x116C | REGS_NORTH_PIPE_AND_PORT)
#define GEN4_HDMI_PORT_B (0x1140 | REGS_SOUTH_TRANSCODER_PORT)
#define GEN4_HDMI_PORT_C (0x1160 | REGS_SOUTH_TRANSCODER_PORT)
#define CHV_HDMI_PORT_D (0x116C | REGS_SOUTH_TRANSCODER_PORT)
// DP_A always @ 6xxxx, DP_B-DP_D move with PCH
#define INTEL_DISPLAY_PORT_A (0x4000 | REGS_NORTH_PIPE_AND_PORT)

3
src/add-ons/kernel/drivers/graphics/intel_extreme/intel_extreme.cpp
View File

@ -353,9 +353,8 @@ intel_extreme_init(intel_info &info)
// Everything in the display PRM gets +0x180000
if (info.device_type.InGroup(INTEL_GROUP_VLV)) {
// "I nearly got violent with the hw guys when they told me..."
blocks[REGISTER_BLOCK(REGS_NORTH_PIPE_AND_PORT)] += VLV_DISPLAY_BASE;
blocks[REGISTER_BLOCK(REGS_NORTH_PLANE_CONTROL)] += VLV_DISPLAY_BASE;
blocks[REGISTER_BLOCK(REGS_SOUTH_SHARED)] += VLV_DISPLAY_BASE;
blocks[REGISTER_BLOCK(REGS_SOUTH_TRANSCODER_PORT)] += VLV_DISPLAY_BASE;
}
TRACE("REGS_NORTH_SHARED: 0x%X\n",