intel_extreme: Correct DP port registers

This commit is contained in:
Alexander von Gluck IV 2015-11-09 09:15:16 -06:00
parent 328d66d5f0
commit d442692fab

View File

@ -510,10 +510,11 @@ struct intel_free_graphics_memory {
#define GEN4_HDMI_PORT_C (0x1160 | REGS_NORTH_PIPE_AND_PORT)
#define CHV_HDMI_PORT_D (0x116C | REGS_NORTH_PIPE_AND_PORT)
// DP_A always @ 6xxxx, DP_B-DP_D move with PCH
#define INTEL_DISPLAY_PORT_A (0x4000 | REGS_NORTH_PIPE_AND_PORT)
#define INTEL_DISPLAY_PORT_B (0x4100 | REGS_NORTH_PIPE_AND_PORT)
#define INTEL_DISPLAY_PORT_C (0x4200 | REGS_NORTH_PIPE_AND_PORT)
#define INTEL_DISPLAY_PORT_D (0x4300 | REGS_NORTH_PIPE_AND_PORT)
#define INTEL_DISPLAY_PORT_B (0x4100 | REGS_SOUTH_TRANSCODER_PORT)
#define INTEL_DISPLAY_PORT_C (0x4200 | REGS_SOUTH_TRANSCODER_PORT)
#define INTEL_DISPLAY_PORT_D (0x4300 | REGS_SOUTH_TRANSCODER_PORT)
// planes
#define INTEL_PIPE_ENABLED (1UL << 31)