VIA gfx driver:K8M800 now works (fixed PLL), fixed info in GetDeviceInfo
This commit is contained in:
Rudolf Cornelissen
parent
1a40c81cfe
commit
14de50bad7
@ -5,7 +5,7 @@
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Other authors:
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Mark Watson;
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Apsed;
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Rudolf Cornelissen 10/2002-9/2005.
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Rudolf Cornelissen 10/2002-1/2016.
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*/
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#ifndef DRIVERINTERFACE_H
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@ -174,12 +174,12 @@ typedef struct {
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/* card info - information gathered from PINS (and other sources) */
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enum
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{ // card_type in order of date of VIA chip design (fixme: check order)
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CLE3122 = 0,
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CLE3022,
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VT3122 = 0,
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VT3022,
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VT7205,
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VT3205,
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VT7204,
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VT3204,
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VT3108,
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VT3204NC,
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NV04,
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NV05,
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NV05M64,
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@ -653,13 +653,16 @@
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#define ENSEQX_MSIZE_CLE266 0x34
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#define ENSEQX_MSIZE_OTHER 0x39
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#define ENSEQX_PLL_RESET 0x40
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#define ENSEQX_0x44 0x44
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#define ENSEQX_0x45 0x45
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#define ENSEQX_PPLL_P_OTH 0x44
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#define ENSEQX_PPLL_M_OTH 0x45
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#define ENSEQX_PPLL_N_OTH 0x46
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#define ENSEQX_PPLL2_MP_CLE 0x44
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#define ENSEQX_PPLL2_N_CLE 0x45
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#define ENSEQX_PPLL_N_OTH 0x44
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#define ENSEQX_PPLL_P_OTH 0x45
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#define ENSEQX_PPLL_M_OTH 0x46
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#define ENSEQX_PPLL_MP_CLE 0x46
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#define ENSEQX_PPLL_N_CLE 0x47
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#define ENSEQX_PPLL2_N_OTH 0x4a
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#define ENSEQX_PPLL2_P_OTH 0x4b
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#define ENSEQX_PPLL2_M_OTH 0x4c
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/* VIA GRAPHICS indexed registers */
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/* VGA standard registers: */
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@ -1,6 +1,6 @@
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/*
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Author:
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Rudolf Cornelissen 7/2004-11/2004
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Rudolf Cornelissen 7/2004-1/2016
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*/
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#define MODULE_BIT 0x04000000
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@ -15,77 +15,23 @@ status_t GET_ACCELERANT_DEVICE_INFO(accelerant_device_info * adi)
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/* no info on version is provided, so presumably this is for my info */
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adi->version = 1;
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sprintf(adi->name, "nVidia chipset");
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sprintf(adi->name, "VIA chipset");
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switch (si->ps.card_type)
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{
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case NV04:
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sprintf(adi->chipset, "NV04");
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case VT3022:
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sprintf(adi->chipset, "CLE266 Unichrome Pro (VT3022)");
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break;
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case NV05:
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sprintf(adi->chipset, "NV05");
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case VT3108:
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sprintf(adi->chipset, "K8M800 Unichrome Pro (VT3108)");
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break;
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case NV05M64:
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sprintf(adi->chipset, "NV05 model 64");
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case VT3122:
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sprintf(adi->chipset, "CLE266 Unichrome Pro (VT3122)");
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break;
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case NV06:
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sprintf(adi->chipset, "NV06");
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case VT3205:
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sprintf(adi->chipset, "KM400 Unichrome (VT3205)");
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break;
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case NV10:
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sprintf(adi->chipset, "NV10");
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break;
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case NV11:
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case NV11M:
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sprintf(adi->chipset, "NV11");
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break;
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case NV15:
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sprintf(adi->chipset, "NV15");
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break;
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case NV17:
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case NV17M:
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sprintf(adi->chipset, "NV17");
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break;
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case NV18:
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case NV18M:
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sprintf(adi->chipset, "NV18");
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break;
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case NV20:
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sprintf(adi->chipset, "NV20");
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break;
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case NV25:
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sprintf(adi->chipset, "NV25");
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break;
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case NV28:
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sprintf(adi->chipset, "NV28");
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break;
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case NV30:
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sprintf(adi->chipset, "NV30");
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break;
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case NV31:
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sprintf(adi->chipset, "NV31");
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break;
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case NV34:
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sprintf(adi->chipset, "NV34");
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break;
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case NV35:
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sprintf(adi->chipset, "NV35");
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break;
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case NV36:
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sprintf(adi->chipset, "NV36");
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break;
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case NV38:
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sprintf(adi->chipset, "NV38");
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break;
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case NV40:
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sprintf(adi->chipset, "NV40");
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break;
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case NV41:
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sprintf(adi->chipset, "NV41");
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break;
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case NV43:
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sprintf(adi->chipset, "NV43");
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break;
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case NV45:
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sprintf(adi->chipset, "NV45");
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case VT7205:
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sprintf(adi->chipset, "KM400 Unichrome (VT7205)");
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break;
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default:
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sprintf(adi->chipset, "unknown");
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@ -1,6 +1,6 @@
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/* program the DAC */
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/* Author:
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Rudolf Cornelissen 12/2003-7/2005
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Rudolf Cornelissen 12/2003-1/2016
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*/
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#define MODULE_BIT 0x00010000
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@ -9,6 +9,8 @@
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static status_t cle266_km400_dac_pix_pll_find(
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display_mode target,float * calc_pclk,uint8 * m_result,uint8 * n_result,uint8 * p_result, uint8 test);
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static status_t k8m800_dac_pix_pll_find(
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display_mode target,float * calc_pclk,uint8 * m_result,uint8 * n_result,uint8 * p_result, uint8 test);
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/* see if an analog VGA monitor is connected to connector #1 */
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bool eng_dac_crt_connected(void)
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@ -195,9 +197,9 @@ status_t eng_dac_set_pix_pll(display_mode target)
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else
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{
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/* fixme: preliminary, still needs to be confirmed */
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SEQW(PPLL_N_OTH, (n & 0x7f));
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SEQW(PPLL_M_OTH, (m & 0x3f));
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SEQW(PPLL_P_OTH, (p & 0x03));
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SEQW(PPLL_N_OTH, (n & 0xff));
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SEQW(PPLL_M_OTH, (m & 0x1f));
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SEQW(PPLL_P_OTH, (p & 0x03) << 2);
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}
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/* reset primary pixelPLL (playing it safe) */
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@ -237,8 +239,11 @@ status_t eng_dac_pix_pll_find
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(display_mode target,float * calc_pclk,uint8 * m_result,uint8 * n_result,uint8 * p_result, uint8 test)
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{
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//fixme: add K8M800 calcs if needed..
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switch (si->ps.card_type) {
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default: return cle266_km400_dac_pix_pll_find(target, calc_pclk, m_result, n_result, p_result, test);
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switch (si->ps.card_arch) {
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case K8M800:
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return k8m800_dac_pix_pll_find(target, calc_pclk, m_result, n_result, p_result, test);
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default:
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return cle266_km400_dac_pix_pll_find(target, calc_pclk, m_result, n_result, p_result, test);
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}
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return B_ERROR;
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}
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@ -390,6 +395,155 @@ static status_t cle266_km400_dac_pix_pll_find(
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return B_OK;
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}
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/* find nearest valid pixel PLL setting */
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static status_t k8m800_dac_pix_pll_find(
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display_mode target,float * calc_pclk,uint8 * m_result,uint8 * n_result,uint8 * p_result, uint8 test)
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{
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int m = 0, n = 0, p = 0/*, m_max*/;
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float error, error_best = 999999999;
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int best[3];
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float f_vco, max_pclk;
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float req_pclk = target.timing.pixel_clock/1000.0;
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/* determine the max. reference-frequency postscaler setting for the
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* current card (see G100, G200 and G400 specs). */
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/* switch(si->ps.card_type)
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{
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case G100:
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LOG(4,("DAC: G100 restrictions apply\n"));
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m_max = 7;
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break;
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case G200:
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LOG(4,("DAC: G200 restrictions apply\n"));
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m_max = 7;
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break;
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default:
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LOG(4,("DAC: G400/G400MAX restrictions apply\n"));
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m_max = 32;
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break;
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}
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*/
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LOG(4,("DAC: K8M800 restrictions apply\n"));
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/* determine the max. pixelclock for the current videomode */
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switch (target.space)
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{
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case B_CMAP8:
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max_pclk = si->ps.max_dac1_clock_8;
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break;
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case B_RGB15_LITTLE:
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case B_RGB16_LITTLE:
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max_pclk = si->ps.max_dac1_clock_16;
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break;
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case B_RGB24_LITTLE:
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max_pclk = si->ps.max_dac1_clock_24;
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break;
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case B_RGB32_LITTLE:
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max_pclk = si->ps.max_dac1_clock_32;
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break;
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default:
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/* use fail-safe value */
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max_pclk = si->ps.max_dac1_clock_32;
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break;
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}
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/* if some dualhead mode is active, an extra restriction might apply */
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if ((target.flags & DUALHEAD_BITS) && (target.space == B_RGB32_LITTLE))
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max_pclk = si->ps.max_dac1_clock_32dh;
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/* Make sure the requested pixelclock is within the PLL's operational limits */
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/* lower limit is min_pixel_vco divided by highest postscaler-factor */
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if (req_pclk < (si->ps.min_pixel_vco / 8.0))
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{
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LOG(4,("DAC: clamping pixclock: requested %fMHz, set to %fMHz\n",
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req_pclk, (float)(si->ps.min_pixel_vco / 8.0)));
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req_pclk = (si->ps.min_pixel_vco / 8.0);
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}
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/* upper limit is given by pins in combination with current active mode */
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if (req_pclk > max_pclk)
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{
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LOG(4,("DAC: clamping pixclock: requested %fMHz, set to %fMHz\n",
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req_pclk, (float)max_pclk));
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req_pclk = max_pclk;
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}
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/* iterate through all valid PLL postscaler settings */
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for (p = 0x01; p < 0x10; p = p << 1)
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{
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/* calculate the needed VCO frequency for this postscaler setting */
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f_vco = req_pclk * p;
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/* check if this is within range of the VCO specs */
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if ((f_vco >= si->ps.min_pixel_vco) && (f_vco <= si->ps.max_pixel_vco))
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{
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/* iterate trough all valid reference-frequency postscaler settings */
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/* (checked agains xf86 unichrome driver) */
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//fixme: 32 and 33 probably ok as well..
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for (m = 2; m <= 31; m++)
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{
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/* check if phase-discriminator will be within operational limits */
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//fixme: check specs, settings as is now seems safe btw..
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if (((si->ps.f_ref / m) < 2.0) || ((si->ps.f_ref / m) > 3.6)) continue;
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/* calculate VCO postscaler setting for current setup.. */
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n = (int)(((f_vco * m) / si->ps.f_ref) + 0.5);
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/* ..and check for validity */
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/* (checked agains xf86 unichrome driver) */
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if ((n < 2) || (n > 257)) continue;
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/* find error in frequency this setting gives */
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error = fabs(req_pclk - (((si->ps.f_ref / m) * n) / p));
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/* note the setting if best yet */
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if (error < error_best)
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{
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error_best = error;
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best[0]=m;
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best[1]=n;
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best[2]=p;
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}
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}
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}
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}
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/* setup the scalers programming values for found optimum setting */
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m = best[0];
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n = best[1];
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p = best[2];
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/* log the VCO frequency found */
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f_vco = ((si->ps.f_ref / m) * n);
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LOG(2,("DAC: pix VCO frequency found %fMhz\n", f_vco));
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/* return the results */
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*calc_pclk = (f_vco / p);
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*m_result = m - 2;
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*n_result = n - 2;
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switch(p)
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{
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case 1:
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p = 0x00;
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break;
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case 2:
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p = 0x01;
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break;
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case 4:
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p = 0x02;
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break;
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case 8:
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p = 0x03;
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break;
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}
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*p_result = p;
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/* display the found pixelclock values */
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LOG(2,("DAC: pix PLL check: requested %fMHz got %fMHz, mnp 0x%02x 0x%02x 0x%02x\n",
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req_pclk, *calc_pclk, *m_result, *n_result, *p_result));
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return B_OK;
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}
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/* find nearest valid system PLL setting */
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status_t eng_dac_sys_pll_find(
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float req_sclk, float* calc_sclk, uint8* m_result, uint8* n_result, uint8* p_result, uint8 test)
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@ -1,7 +1,7 @@
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/* Authors:
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Mark Watson 12/1999,
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Apsed,
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Rudolf Cornelissen 10/2002-4/2006
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Rudolf Cornelissen 10/2002-1/2016
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*/
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#define MODULE_BIT 0x00008000
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@ -90,7 +90,7 @@ status_t eng_general_powerup()
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{
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status_t status;
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LOG(1,("POWERUP: Haiku VIA Accelerant 0.16 running.\n"));
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LOG(1,("POWERUP: Haiku VIA Accelerant 0.17 running.\n"));
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/* preset no laptop */
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si->ps.laptop = false;
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@ -100,22 +100,21 @@ status_t eng_general_powerup()
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{
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/* Vendor Via */
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case 0x30221106:
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si->ps.card_type = CLE3022;
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si->ps.card_type = VT3022;
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si->ps.card_arch = CLE266;
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LOG(4,("POWERUP: Detected VIA CLE266 Unichrome Pro (CLE3022)\n"));
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LOG(4,("POWERUP: Detected VIA CLE266 Unichrome Pro (VT3022)\n"));
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status = engxx_general_powerup();
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break;
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case 0x31081106:
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//fixme: card_type unknown..
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si->ps.card_type = VT3204;
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si->ps.card_type = VT3108;
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si->ps.card_arch = K8M800;
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LOG(4,("POWERUP: Detected VIA K8M800 Unichrome Pro (unknown chiptype)\n"));
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LOG(4,("POWERUP: Detected VIA K8M800 Unichrome Pro (VT3108)\n"));
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status = engxx_general_powerup();
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break;
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case 0x31221106:
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si->ps.card_type = CLE3122;
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si->ps.card_type = VT3122;
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si->ps.card_arch = CLE266;
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LOG(4,("POWERUP: Detected VIA CLE266 Unichrome Pro (CLE3122)\n"));
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LOG(4,("POWERUP: Detected VIA CLE266 Unichrome Pro (VT3122)\n"));
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status = engxx_general_powerup();
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break;
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case 0x32051106:
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@ -14,10 +14,9 @@ You use this software at your own risk! Although I don't expect it to damage you
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<ul>
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<li>KM400 Unichrome (VT3205)
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<li>KM400 Unichrome (VT7205)
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<li>CLE266 Unichrome Pro (CLE3022)
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<li>CLE266 Unichrome Pro (CLE3122)
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<li>K8M800 Unichrome Pro (VT3204)
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<li>K8M800 Unichrome Pro (VT7204)
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<li>CLE266 Unichrome Pro (VT3022)
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<li>CLE266 Unichrome Pro (VT3122)
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<li>K8M800 Unichrome Pro (VT3108)
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</ul>
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<br>
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<hr>
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@ -39,8 +38,8 @@ You use this software at your own risk! Although I don't expect it to damage you
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<hr>
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<h2>Installation:</h2>
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<br>
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In contrary to what I have said before you don't need to de-install official Be drivers for this driver to work correctly. This driver will install in the user part of the BeOS, so not in the system part where the official drivers are.<br>
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BeOS first checks (during boot) if there are 'user-addons' that should be loaded for a device. If not, it loads it's own drivers (if any). You can select which driver should be loaded by hitting the spacebar as soon as the BeOS 'icons' screen appears. If you select <strong>disable user addons</strong> the system will load it's own drivers. If you don't do anything, the system will load the Haiku VIA unichrome (pro) graphics driver.<br>
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You don't need to de-install official drivers for this driver to work correctly. This driver will install in the user part of Haiku, so not in the system part where the official drivers are.<br>
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Haiku first checks (during boot) if there are 'user-addons' that should be loaded for a device. If not, it loads it's own drivers (if any). You can select which driver should be loaded by hitting the spacebar just before the Haiku 'icons' screen appears. If you select <strong>disable user addons</strong> the system will load it's own drivers. If you don't do anything, the system will load the Haiku VIA unichrome (pro) graphics driver.<br>
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<br>
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<strong>Note:</strong> This might turn out to be handy if you run into trouble upon testing the driver, or if you are 'tweaking' the via.settings file...<br>
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<br><br>
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@ -58,10 +57,10 @@ Unzip the zip file that contains the driver to the root folder. Now reboot and y
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<br>
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Currently there's no uninstall script included. Just do it manually:<br>
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<br>
|
||||
Delete the <strong>via.accelerant</strong> file in <strong>home/config/add-ons/accelerants/</strong><br>
|
||||
Delete the <strong>via.driver</strong> file in <strong>home/config/add-ons/kernel/drivers/bin/</strong><br>
|
||||
Delete the <strong>via.accelerant</strong> file in <strong>home/config/non-packaged/add-ons/accelerants/</strong><br>
|
||||
Delete the <strong>via.driver</strong> file in <strong>home/config/non-packaged/add-ons/kernel/drivers/bin/</strong><br>
|
||||
Delete the <strong>via.settings</strong> file in <strong>home/config/settings/kernel/drivers/</strong><br>
|
||||
Delete the <strong>via.driver shortcut</strong> in <strong>home/config/add-ons/kernel/drivers/dev/graphics/</strong> which pointed to the file <strong>via.driver</strong>.<br>
|
||||
Delete the <strong>via.driver shortcut</strong> in <strong>home/config/non-packaged/add-ons/kernel/drivers/dev/graphics/</strong> which pointed to the file <strong>via.driver</strong>.<br>
|
||||
<br>
|
||||
You have to reboot in order to apply the original configuration.<br>
|
||||
<br>
|
||||
@ -155,7 +154,7 @@ With the <strong>pgm_panel true</strong> setting, the driver will fix your panel
|
||||
|
||||
<hr>
|
||||
<br>
|
||||
<a href="mailto:info.be-hold@inter.nl.net">Rudolf Cornelissen.</a>
|
||||
<p>(Page last updated on September 29, 2005)</p>
|
||||
Rudolf Cornelissen.<br>
|
||||
<p>(Page last updated on January 13, 2016)</p>
|
||||
</body>
|
||||
</html>
|
||||
|
||||
@ -4,7 +4,7 @@
|
||||
</head>
|
||||
<body>
|
||||
<p><h2>Changes done for each driverversion:</h2></p>
|
||||
<p><h1>via_driver (SVN 0.16, Rudolf)</h1></p>
|
||||
<p><h1>via_driver (Haiku repository 0.17, Rudolf)</h1></p>
|
||||
<ul>
|
||||
<li>Initial setup based on nVidia driver 0.30;
|
||||
<li>Kerneldriver uses MTR-WC mapping where available;
|
||||
@ -20,7 +20,9 @@
|
||||
<li>Added primary head pixelPLL programming (refreshrate is now set);
|
||||
<li>Added switch to 'enhanced mode' making the driver independant from a preset VESA mode;
|
||||
<li>Added video overlay support;
|
||||
<li>Finalized virtualscreen panning granularity constraints programming.
|
||||
<li>Finalized virtualscreen panning granularity constraints programming;
|
||||
<li>Added returning correct information in GET_ACCELERANT_DEVICE_INFO (displayed in Haiku screenprefs panel);
|
||||
<li>Fixed wrong PLL registerdefines for K8M800 and added seperate pixelPLL calculation routine: K8M800 now works correctly whereas previously you'd have a black screen (tested different resolutions, refreshrates and colordepths).
|
||||
</ul>
|
||||
<p><h1>Still todo:</h1></p>
|
||||
<ul>
|
||||
@ -31,6 +33,6 @@
|
||||
<hr><br>
|
||||
<br>
|
||||
<a href="mailto:info.be-hold@inter.nl.net">Rudolf Cornelissen.</a>
|
||||
<p>(Page last updated on September 29, 2005)</p>
|
||||
<p>(Page last updated on January 13, 2016)</p>
|
||||
</body>
|
||||
</html>
|
||||
|
||||
Loading…
Reference in New Issue
Block a user