diff --git a/headers/private/graphics/via/DriverInterface.h b/headers/private/graphics/via/DriverInterface.h index b90cb92706..5fecfd2e57 100644 --- a/headers/private/graphics/via/DriverInterface.h +++ b/headers/private/graphics/via/DriverInterface.h @@ -5,7 +5,7 @@ Other authors: Mark Watson; Apsed; - Rudolf Cornelissen 10/2002-9/2005. + Rudolf Cornelissen 10/2002-1/2016. */ #ifndef DRIVERINTERFACE_H @@ -174,12 +174,12 @@ typedef struct { /* card info - information gathered from PINS (and other sources) */ enum { // card_type in order of date of VIA chip design (fixme: check order) - CLE3122 = 0, - CLE3022, + VT3122 = 0, + VT3022, VT7205, VT3205, - VT7204, - VT3204, + VT3108, + VT3204NC, NV04, NV05, NV05M64, diff --git a/headers/private/graphics/via/macros.h b/headers/private/graphics/via/macros.h index e6f0816d2b..41fa989630 100644 --- a/headers/private/graphics/via/macros.h +++ b/headers/private/graphics/via/macros.h @@ -653,13 +653,16 @@ #define ENSEQX_MSIZE_CLE266 0x34 #define ENSEQX_MSIZE_OTHER 0x39 #define ENSEQX_PLL_RESET 0x40 -#define ENSEQX_0x44 0x44 -#define ENSEQX_0x45 0x45 -#define ENSEQX_PPLL_P_OTH 0x44 -#define ENSEQX_PPLL_M_OTH 0x45 -#define ENSEQX_PPLL_N_OTH 0x46 +#define ENSEQX_PPLL2_MP_CLE 0x44 +#define ENSEQX_PPLL2_N_CLE 0x45 +#define ENSEQX_PPLL_N_OTH 0x44 +#define ENSEQX_PPLL_P_OTH 0x45 +#define ENSEQX_PPLL_M_OTH 0x46 #define ENSEQX_PPLL_MP_CLE 0x46 #define ENSEQX_PPLL_N_CLE 0x47 +#define ENSEQX_PPLL2_N_OTH 0x4a +#define ENSEQX_PPLL2_P_OTH 0x4b +#define ENSEQX_PPLL2_M_OTH 0x4c /* VIA GRAPHICS indexed registers */ /* VGA standard registers: */ diff --git a/src/add-ons/accelerants/via/GetDeviceInfo.c b/src/add-ons/accelerants/via/GetDeviceInfo.c index bc18184fbc..817c515d79 100644 --- a/src/add-ons/accelerants/via/GetDeviceInfo.c +++ b/src/add-ons/accelerants/via/GetDeviceInfo.c @@ -1,6 +1,6 @@ /* Author: - Rudolf Cornelissen 7/2004-11/2004 + Rudolf Cornelissen 7/2004-1/2016 */ #define MODULE_BIT 0x04000000 @@ -15,77 +15,23 @@ status_t GET_ACCELERANT_DEVICE_INFO(accelerant_device_info * adi) /* no info on version is provided, so presumably this is for my info */ adi->version = 1; - sprintf(adi->name, "nVidia chipset"); + sprintf(adi->name, "VIA chipset"); switch (si->ps.card_type) { - case NV04: - sprintf(adi->chipset, "NV04"); + case VT3022: + sprintf(adi->chipset, "CLE266 Unichrome Pro (VT3022)"); break; - case NV05: - sprintf(adi->chipset, "NV05"); + case VT3108: + sprintf(adi->chipset, "K8M800 Unichrome Pro (VT3108)"); break; - case NV05M64: - sprintf(adi->chipset, "NV05 model 64"); + case VT3122: + sprintf(adi->chipset, "CLE266 Unichrome Pro (VT3122)"); break; - case NV06: - sprintf(adi->chipset, "NV06"); + case VT3205: + sprintf(adi->chipset, "KM400 Unichrome (VT3205)"); break; - case NV10: - sprintf(adi->chipset, "NV10"); - break; - case NV11: - case NV11M: - sprintf(adi->chipset, "NV11"); - break; - case NV15: - sprintf(adi->chipset, "NV15"); - break; - case NV17: - case NV17M: - sprintf(adi->chipset, "NV17"); - break; - case NV18: - case NV18M: - sprintf(adi->chipset, "NV18"); - break; - case NV20: - sprintf(adi->chipset, "NV20"); - break; - case NV25: - sprintf(adi->chipset, "NV25"); - break; - case NV28: - sprintf(adi->chipset, "NV28"); - break; - case NV30: - sprintf(adi->chipset, "NV30"); - break; - case NV31: - sprintf(adi->chipset, "NV31"); - break; - case NV34: - sprintf(adi->chipset, "NV34"); - break; - case NV35: - sprintf(adi->chipset, "NV35"); - break; - case NV36: - sprintf(adi->chipset, "NV36"); - break; - case NV38: - sprintf(adi->chipset, "NV38"); - break; - case NV40: - sprintf(adi->chipset, "NV40"); - break; - case NV41: - sprintf(adi->chipset, "NV41"); - break; - case NV43: - sprintf(adi->chipset, "NV43"); - break; - case NV45: - sprintf(adi->chipset, "NV45"); + case VT7205: + sprintf(adi->chipset, "KM400 Unichrome (VT7205)"); break; default: sprintf(adi->chipset, "unknown"); diff --git a/src/add-ons/accelerants/via/engine/dac.c b/src/add-ons/accelerants/via/engine/dac.c index e3a380f98a..2dd47e954a 100644 --- a/src/add-ons/accelerants/via/engine/dac.c +++ b/src/add-ons/accelerants/via/engine/dac.c @@ -1,6 +1,6 @@ /* program the DAC */ /* Author: - Rudolf Cornelissen 12/2003-7/2005 + Rudolf Cornelissen 12/2003-1/2016 */ #define MODULE_BIT 0x00010000 @@ -9,6 +9,8 @@ static status_t cle266_km400_dac_pix_pll_find( display_mode target,float * calc_pclk,uint8 * m_result,uint8 * n_result,uint8 * p_result, uint8 test); +static status_t k8m800_dac_pix_pll_find( + display_mode target,float * calc_pclk,uint8 * m_result,uint8 * n_result,uint8 * p_result, uint8 test); /* see if an analog VGA monitor is connected to connector #1 */ bool eng_dac_crt_connected(void) @@ -195,9 +197,9 @@ status_t eng_dac_set_pix_pll(display_mode target) else { /* fixme: preliminary, still needs to be confirmed */ - SEQW(PPLL_N_OTH, (n & 0x7f)); - SEQW(PPLL_M_OTH, (m & 0x3f)); - SEQW(PPLL_P_OTH, (p & 0x03)); + SEQW(PPLL_N_OTH, (n & 0xff)); + SEQW(PPLL_M_OTH, (m & 0x1f)); + SEQW(PPLL_P_OTH, (p & 0x03) << 2); } /* reset primary pixelPLL (playing it safe) */ @@ -237,8 +239,11 @@ status_t eng_dac_pix_pll_find (display_mode target,float * calc_pclk,uint8 * m_result,uint8 * n_result,uint8 * p_result, uint8 test) { //fixme: add K8M800 calcs if needed.. - switch (si->ps.card_type) { - default: return cle266_km400_dac_pix_pll_find(target, calc_pclk, m_result, n_result, p_result, test); + switch (si->ps.card_arch) { + case K8M800: + return k8m800_dac_pix_pll_find(target, calc_pclk, m_result, n_result, p_result, test); + default: + return cle266_km400_dac_pix_pll_find(target, calc_pclk, m_result, n_result, p_result, test); } return B_ERROR; } @@ -390,6 +395,155 @@ static status_t cle266_km400_dac_pix_pll_find( return B_OK; } +/* find nearest valid pixel PLL setting */ +static status_t k8m800_dac_pix_pll_find( + display_mode target,float * calc_pclk,uint8 * m_result,uint8 * n_result,uint8 * p_result, uint8 test) +{ + int m = 0, n = 0, p = 0/*, m_max*/; + float error, error_best = 999999999; + int best[3]; + float f_vco, max_pclk; + float req_pclk = target.timing.pixel_clock/1000.0; + + /* determine the max. reference-frequency postscaler setting for the + * current card (see G100, G200 and G400 specs). */ +/* switch(si->ps.card_type) + { + case G100: + LOG(4,("DAC: G100 restrictions apply\n")); + m_max = 7; + break; + case G200: + LOG(4,("DAC: G200 restrictions apply\n")); + m_max = 7; + break; + default: + LOG(4,("DAC: G400/G400MAX restrictions apply\n")); + m_max = 32; + break; + } +*/ + LOG(4,("DAC: K8M800 restrictions apply\n")); + + /* determine the max. pixelclock for the current videomode */ + switch (target.space) + { + case B_CMAP8: + max_pclk = si->ps.max_dac1_clock_8; + break; + case B_RGB15_LITTLE: + case B_RGB16_LITTLE: + max_pclk = si->ps.max_dac1_clock_16; + break; + case B_RGB24_LITTLE: + max_pclk = si->ps.max_dac1_clock_24; + break; + case B_RGB32_LITTLE: + max_pclk = si->ps.max_dac1_clock_32; + break; + default: + /* use fail-safe value */ + max_pclk = si->ps.max_dac1_clock_32; + break; + } + /* if some dualhead mode is active, an extra restriction might apply */ + if ((target.flags & DUALHEAD_BITS) && (target.space == B_RGB32_LITTLE)) + max_pclk = si->ps.max_dac1_clock_32dh; + + /* Make sure the requested pixelclock is within the PLL's operational limits */ + /* lower limit is min_pixel_vco divided by highest postscaler-factor */ + if (req_pclk < (si->ps.min_pixel_vco / 8.0)) + { + LOG(4,("DAC: clamping pixclock: requested %fMHz, set to %fMHz\n", + req_pclk, (float)(si->ps.min_pixel_vco / 8.0))); + req_pclk = (si->ps.min_pixel_vco / 8.0); + } + /* upper limit is given by pins in combination with current active mode */ + if (req_pclk > max_pclk) + { + LOG(4,("DAC: clamping pixclock: requested %fMHz, set to %fMHz\n", + req_pclk, (float)max_pclk)); + req_pclk = max_pclk; + } + + /* iterate through all valid PLL postscaler settings */ + for (p = 0x01; p < 0x10; p = p << 1) + { + /* calculate the needed VCO frequency for this postscaler setting */ + f_vco = req_pclk * p; + + /* check if this is within range of the VCO specs */ + if ((f_vco >= si->ps.min_pixel_vco) && (f_vco <= si->ps.max_pixel_vco)) + { + /* iterate trough all valid reference-frequency postscaler settings */ + /* (checked agains xf86 unichrome driver) */ + //fixme: 32 and 33 probably ok as well.. + for (m = 2; m <= 31; m++) + { + /* check if phase-discriminator will be within operational limits */ + //fixme: check specs, settings as is now seems safe btw.. + if (((si->ps.f_ref / m) < 2.0) || ((si->ps.f_ref / m) > 3.6)) continue; + + /* calculate VCO postscaler setting for current setup.. */ + n = (int)(((f_vco * m) / si->ps.f_ref) + 0.5); + + /* ..and check for validity */ + /* (checked agains xf86 unichrome driver) */ + if ((n < 2) || (n > 257)) continue; + + /* find error in frequency this setting gives */ + error = fabs(req_pclk - (((si->ps.f_ref / m) * n) / p)); + + /* note the setting if best yet */ + if (error < error_best) + { + error_best = error; + best[0]=m; + best[1]=n; + best[2]=p; + } + } + } + } + + /* setup the scalers programming values for found optimum setting */ + m = best[0]; + n = best[1]; + p = best[2]; + + /* log the VCO frequency found */ + f_vco = ((si->ps.f_ref / m) * n); + + LOG(2,("DAC: pix VCO frequency found %fMhz\n", f_vco)); + + /* return the results */ + *calc_pclk = (f_vco / p); + *m_result = m - 2; + *n_result = n - 2; + switch(p) + { + case 1: + p = 0x00; + break; + case 2: + p = 0x01; + break; + case 4: + p = 0x02; + break; + case 8: + p = 0x03; + break; + } + *p_result = p; + + /* display the found pixelclock values */ + LOG(2,("DAC: pix PLL check: requested %fMHz got %fMHz, mnp 0x%02x 0x%02x 0x%02x\n", + req_pclk, *calc_pclk, *m_result, *n_result, *p_result)); + + return B_OK; +} + /* find nearest valid system PLL setting */ status_t eng_dac_sys_pll_find( float req_sclk, float* calc_sclk, uint8* m_result, uint8* n_result, uint8* p_result, uint8 test) diff --git a/src/add-ons/accelerants/via/engine/general.c b/src/add-ons/accelerants/via/engine/general.c index e79c6fd9b6..e2f42a4663 100644 --- a/src/add-ons/accelerants/via/engine/general.c +++ b/src/add-ons/accelerants/via/engine/general.c @@ -1,7 +1,7 @@ /* Authors: Mark Watson 12/1999, Apsed, - Rudolf Cornelissen 10/2002-4/2006 + Rudolf Cornelissen 10/2002-1/2016 */ #define MODULE_BIT 0x00008000 @@ -90,7 +90,7 @@ status_t eng_general_powerup() { status_t status; - LOG(1,("POWERUP: Haiku VIA Accelerant 0.16 running.\n")); + LOG(1,("POWERUP: Haiku VIA Accelerant 0.17 running.\n")); /* preset no laptop */ si->ps.laptop = false; @@ -100,22 +100,21 @@ status_t eng_general_powerup() { /* Vendor Via */ case 0x30221106: - si->ps.card_type = CLE3022; + si->ps.card_type = VT3022; si->ps.card_arch = CLE266; - LOG(4,("POWERUP: Detected VIA CLE266 Unichrome Pro (CLE3022)\n")); + LOG(4,("POWERUP: Detected VIA CLE266 Unichrome Pro (VT3022)\n")); status = engxx_general_powerup(); break; case 0x31081106: - //fixme: card_type unknown.. - si->ps.card_type = VT3204; + si->ps.card_type = VT3108; si->ps.card_arch = K8M800; - LOG(4,("POWERUP: Detected VIA K8M800 Unichrome Pro (unknown chiptype)\n")); + LOG(4,("POWERUP: Detected VIA K8M800 Unichrome Pro (VT3108)\n")); status = engxx_general_powerup(); break; case 0x31221106: - si->ps.card_type = CLE3122; + si->ps.card_type = VT3122; si->ps.card_arch = CLE266; - LOG(4,("POWERUP: Detected VIA CLE266 Unichrome Pro (CLE3122)\n")); + LOG(4,("POWERUP: Detected VIA CLE266 Unichrome Pro (VT3122)\n")); status = engxx_general_powerup(); break; case 0x32051106: diff --git a/src/add-ons/kernel/drivers/graphics/via/README.html b/src/add-ons/kernel/drivers/graphics/via/README.html index 99bc981395..f25dd30b09 100644 --- a/src/add-ons/kernel/drivers/graphics/via/README.html +++ b/src/add-ons/kernel/drivers/graphics/via/README.html @@ -14,10 +14,9 @@ You use this software at your own risk! Although I don't expect it to damage you
(Page last updated on September 29, 2005)
+Rudolf Cornelissen.(Page last updated on January 13, 2016)