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intel_extreme: Clean up DisplayPort Port class

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* DisplayPort != DigitalPort
* i2c needs wrapped in DP AUX transaction code
* Mode-setting comes with DP link training as well
* We need to try and share DP code with radeon_hd
This commit is contained in:
Alexander von Gluck IV 2016-02-23 14:10:14 -06:00
parent 9975620612
commit 721ba9af43
3 changed files with 56 additions and 10 deletions
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14
headers/private/graphics/intel_extreme/intel_extreme.h
View File

@ -554,14 +554,14 @@ struct intel_free_graphics_memory {
#define CHV_DISPLAY_PORT_D (VLV_DISPLAY_BASE + 0x64300)
// DP AUX channels
#define INTEL_DPA_AUX_CTL (0x4010 | REGS_NORTH_PIPE_AND_PORT)
#define INTEL_DPB_AUX_CTL (0x4110 | REGS_SOUTH_TRANSCODER_PORT)
#define INTEL_DPC_AUX_CTL (0x4210 | REGS_SOUTH_TRANSCODER_PORT)
#define INTEL_DPD_AUX_CTL (0x4310 | REGS_SOUTH_TRANSCODER_PORT)
#define INTEL_DP_AUX_CTL_A (0x4010 | REGS_NORTH_PIPE_AND_PORT)
#define INTEL_DP_AUX_CTL_B (0x4110 | REGS_SOUTH_TRANSCODER_PORT)
#define INTEL_DP_AUX_CTL_C (0x4210 | REGS_SOUTH_TRANSCODER_PORT)
#define INTEL_DP_AUX_CTL_D (0x4310 | REGS_SOUTH_TRANSCODER_PORT)
#define VLV_DPB_AUX_CTL (VLV_DISPLAY_BASE + 0x64110)
#define VLV_DPC_AUX_CTL (VLV_DISPLAY_BASE + 0x64210)
#define CHV_DPC_AUX_CTL (VLV_DISPLAY_BASE + 0x64310)
#define VLV_DP_AUX_CTL_B (VLV_DISPLAY_BASE + 0x64110)
#define VLV_DP_AUX_CTL_C (VLV_DISPLAY_BASE + 0x64210)
#define CHV_DP_AUX_CTL_D (VLV_DISPLAY_BASE + 0x64310)
#define INTEL_DP_AUX_CTL_BUSY (1 << 31)
#define INTEL_DP_AUX_CTL_DONE (1 << 30)

46
src/add-ons/accelerants/intel_extreme/Ports.cpp
View File

@ -834,7 +834,7 @@ HDMIPort::_PortRegister()
DisplayPort::DisplayPort(port_index index, const char* baseName)
:
DigitalPort(index, baseName)
Port(index, baseName)
{
}
@ -853,6 +853,35 @@ DisplayPort::IsConnected()
}
addr_t
DisplayPort::_DDCRegister()
{
// TODO: Do VLV + CHV use the VLV_DP_AUX_CTL_B + VLV_DP_AUX_CTL_C?
switch (PortIndex()) {
case INTEL_PORT_A:
return INTEL_DP_AUX_CTL_A;
case INTEL_PORT_B:
if (gInfo->shared_info->device_type.InGroup(INTEL_GROUP_VLV))
return VLV_DP_AUX_CTL_B;
return INTEL_DP_AUX_CTL_B;
case INTEL_PORT_C:
if (gInfo->shared_info->device_type.InGroup(INTEL_GROUP_VLV))
return VLV_DP_AUX_CTL_C;
return INTEL_DP_AUX_CTL_C;
case INTEL_PORT_D:
if (gInfo->shared_info->device_type.InGroup(INTEL_GROUP_CHV))
return CHV_DP_AUX_CTL_D;
else if (gInfo->shared_info->device_type.InGroup(INTEL_GROUP_VLV))
return 0;
return INTEL_DP_AUX_CTL_D;
default:
return 0;
}
return 0;
}
addr_t
DisplayPort::_PortRegister()
{
@ -862,8 +891,10 @@ DisplayPort::_PortRegister()
// ignore DisplayPort on ValleyView / CherryView
if (gInfo->shared_info->device_type.InGroup(INTEL_GROUP_VLV)
|| gInfo->shared_info->device_type.InGroup(INTEL_GROUP_CHV))
|| gInfo->shared_info->device_type.InGroup(INTEL_GROUP_CHV)) {
ERROR("TODO: DisplayPort on ValleyView / CherryView");
return 0;
}
// Intel, are humans even involved anymore?
// This is a lot more complex than this code makes it look. (see defines)
@ -894,6 +925,17 @@ DisplayPort::_PortRegister()
}
status_t
DisplayPort::SetDisplayMode(display_mode* target, uint32 colorMode)
{
TRACE("%s: %s %dx%d\n", __func__, PortName(), target->virtual_width,
target->virtual_height);
ERROR("TODO: DisplayPort\n");
return B_ERROR;
}
// #pragma mark - Embedded DisplayPort

6
src/add-ons/accelerants/intel_extreme/Ports.h
View File

@ -170,7 +170,7 @@ virtual addr_t _PortRegister();
};
class DisplayPort : public DigitalPort {
class DisplayPort : public Port {
public:
DisplayPort(port_index index,
const char* baseName = "DisplayPort");
@ -180,7 +180,11 @@ virtual uint32 Type() const
virtual bool IsConnected();
virtual status_t SetDisplayMode(display_mode* mode,
uint32 colorMode);
protected:
virtual addr_t _DDCRegister();
virtual addr_t _PortRegister();
};