drisavar.h pretends to provide a few bus.h macros, hardwired to
that chip.
This should eventually be replaced by attachment code for the normal
com.c driver, once that one is split up into chip core driver and
attachment code, and once we have busxxx macros in NetBSD/Amiga.
along with toolchain enhancements.
aout2bb transforms a.out files with reloc information into bootblock format
files with a compressed relocation info.
bbstart.s relocates the bootblock using this compressed info, before jumping
to C code.
txlt changes some more of the absolute references to pc-relative ones (we know
we have a single code + data address space).
If you ever try to change this: don't even dare to change the compiler options;
they were found in weeks of trial and error as the ones producing the smallest
(not necessarily fastests) code.
installboot is just a script around dd, for now.
Some ideas by Michael Hitch, Leo Weppelman and Jason Thorpe; bugs added
by myself.
along with toolchain enhancements.
aout2bb transforms a.out files with reloc information into bootblock format
files with a compressed relocation info.
bbstart.s relocates the bootblock using this compressed info, before jumping
to C code.
txlt changes some more of the absolute references to pc-relative ones (we know
we have a single code + data address space).
If you ever try to change this: don't even dare to change the compiler options;
they were found in weeks of trial and error as the ones producing the smallest
(not necessarily fastests) code.
installboot is just a script around dd, for now.
Some ideas by Michael Hitch, Leo Weppelman and Jason Thorpe; bugs added
by myself.
Also, the munging is extended by inserting an instruction that branches
past the header, so the same boot image can be used on all supported
sun platforms.
primarily to nicely print version information about your PCI chipset
(try with "options PCIVERBOSE"). Eventually, it may be used to
enable/disable features/bugs of a given PCI chipset. In addition, this
driver uses the PCI-ISA bridge callback mechanism to logically attach the
ISA bus to the PCI-ISA bridge.
driver is a place-holder, which will nicely print version information
about your PCI chipset (try with "options PCIVERBOSE"). Eventually,
this can be used to enable/disable features/bugs of individual PCI
chipsets.
been attached to the system. If, by the time mainbus wants to attach
an ISA an ISA has not yet been attached to the system, attempt to attach
an ISA to mainbus.
>Pay attention to DMA errors as reported by DMAINTR() returning -1. If this
>happens reset everything.
>
>Re-schedule a timeout when first attempting to abort an operation.
>Cancel any queued timer events before re-scheduling a timeout, so esp_abort()
>can be called from other places besides the timeout handler.
as a "timeout", yet there's no specific delay in each iteration. Add
a small delay (10 usec... pretty arbitrary) in each iteration. This
fixes the "fdcresult: timeout" problems I've been having on my 200MHz P6.
after returning from hardclock(), rather than before. For some reason,
this fixes the 0xffffffff i used to see in the tv_secs of the used cpu
time of some processes.
XXX I don't fully understand the issue.
the chipset space init functions multiple times, since that would clobber
extent allocations made between the two calls. Also, deal with the
fact that the APECS and LCA no longer shared common chipset functions.
the same things, but the extent maps have to be managed differently,
since the two chipsets provide different memory and I/O region mapping
possibilities.
and PC-ish keyboard controller. (Actually, on alphas, the built-in PPI
(in the SIO) appears to be a lobotomized version of the original, but
i'd not call that a bad thing.) This driver should eventually handle all
speaker tone requests and keyboard commands, but for now it just maps
the relevant ports and passes them on to the keyboard and mouse drivers,
which are now its children (rather than children of ISA).
* Support for the new softint mechanism. Softints are now requested by
triggering an unused ICU hardware interrupt. The idea for this was
contributed by Phil Budne.
* Real probe code added.
* Duart info is now allocated only for devices that are present.
* Added IO-Recovery delays for 30mhz systems.
* Removed a few potential NULL-pointer references.
>One control block per target is insufficient if you have a full complement
>of targets attached and access those simultaneously (like in a ccd(4) array).
>We (now) allocate (somewhat arbitrarily) three per target.
>Noticed by Marshall Midden.
don't machine check when a PCI Master Abort is signalled. This can
happen, for instance, when configuration space for a device that isn't
present is examined. When this is detected, act like we normally would
when machine checks are posted while examining nonexistant devices.
enabled (from the attach routine), and add comments as to why.
Some PALcode apparently 'saves' a clock interrupt for the kernel,
and if the clock interrupt handler is enabled at attach time, it
will be run when that interrupt hits, i.e. right after the spl0()
at the end of autoconfiguration. That would cause hardclock to be
run, but proc0's p_stats isn't set up by then, which would cause
hardclock to crash.
rather than and-ing 16G-1. That just strips the k0seg bits, rather
than making the false assumption that the physical address is going
to be in the lower 16G. That doesn't apply for CIA device-space
addresses, for instance.
even if PCI and the IDs are right), just for sanity, before declaring
success. Split the single 0x3b0 -> 0x3df allocation into three seperate
ones: 0x3b0 -> 0x3bc (leaving the 4 ports available for lpt),
0x3c0 -> 0x3cf, and 0x3d0 -> 0x3df. The former chunk has to be split
off if the lpt can exist there, and it's sort-of pretty to have each
group (based on second hex digit) have its own handle.
These alternative macros have a workaround for the STM^ bug in revision < 3
StrongARM CPU's that causes incorrect register saving if a cache line fill
is in progress during the STM.
a podulebus.
Make sure the podulebus driver conforms to the Acorn expansion card
specification:
- Probe the podule bus using sync access cycles rather than slow access
cycles.
- Read the podulebus header/ROM using sync access cycles rather than slow
access cycles
of targets attached and access those simultaneously (like in a ccd(4) array).
We (now) allocate (somewhat arbitrarily) three per target.
Noticed by Marshall Midden.
Interrupts for irqs with handlers are counted as normal, even if none of
the handlers claim the interrupt.
Should all be redone with hierarchical event counters. that count
hardware events and invocations of each handler separately.
* Increment cnt.v_intr for normal interrupts (bugfix).
to initialize conspa was invalid on non-040 machines, since we don't
know which MMU we're using on those, yet. On the other hand, by the time
we get to check_video() on the 040 machines, the MMU has been disabled.
Compromise: get the video PA in setmachdep() on the 040, and in
check_video() on the others. (This is not optimal. *sigh*)
ioctl and mmap routines take a void *, rather than a struct device *,
so that they can be set up to work more easily when using a 'struct device *'
isn't appropriate. Add a cookie (void *) to be passed to the mmap and
ioctl routines. Rename a few struct members, and shuffle them into
a more sensible order.
front-ends. Unfortunately, because of the way ISA and PCI are currently
probed, if you have a PCI VGA board in your machine and both drivers
in your kernel, the ISA VGA driver may accidentally match the PCI board.
For now, the only solution to this is to not put both drivers in
the GENERIC kernels.
Earlier, we re-complained about excessive token losses about once a minute.
However, on small ARCnet networks, the token will also be lost if only one
station (us) is active (ifconfig'd down interfaces don't take place in the
token exchange), and our syslog would be filled with repeated messages about
this condition.
Our new code only complains once, starts a timeout() each time a token
regeneration is reported by the chip, and generates a log message about
the regenerated token if it was stable for 15 seconds.
buffer out of the hardware (it is invalid!).
This fixes hangups due to spurious rx interupts.
XXX Maybe I should completely reset the hardware in this case?
- New variables: biosextmem, biosbasemem, nkpde
- Above can be set by using the options BIOSEXTMEM, BIOSBASEMEM,
and NKPDE respectively (EXTMEM_SIZE is now called BIOSEXTMEM).
When preset this way, they won't be filled in / calculated.
- Readable by sysctl using machdep.nkpde, machdep.biosbasemem
and machdep.biosextmem.
- nkpde is calculated as:
min(NKPDE_MAX, NKPDE_BASE + (biosextmem >> 10) * NKPDE_SCALE)
Where NKPDE_MAX is 31, NKPDE_BASE is 4, NKPDE_SCALE = 1.
We test this condition AFTER the interupt condition, because it is only
disabled during autoconfiguration.
Without this patch, if autoconfiguration takes long enough, eventually a
timer interupt will call hardclock() and panic the machine.
the Digital Semiconductor AlphaPC 164 Motherboard Technical Reference
Manual. This may not work, but it's the best i can do with the
documentation I have.
is set in the RPB's rpb_variation field. This fixes a bug where machines
(e.g. the 3000/900) would see that they could touch memory where a built-in
PMAGB-BA, assume that it was there, and panic later because the memory they
were accessing didn't look like PMAGB-BA registers (because it wasn't).
-Werror -Wall -Wstrict-prototypes -Wmissing-prototypes
-Wcast-qual -Wno-format
(if not already set). -Wno-format is necessary because of the few
bits of code in the tree that use NetBSD's special kernel printf()
formats, and because there are a few bits of code that try to use the 'q'
modifier to print int64_t's (but int64_t's are only 'long' on the
alpha, not 'long long').
On sun4/sun4c with a virtual address hole (starting at 512MB), this seems
like a reasonable compromise: about 196MB left for shared libs and sysv-style
shared memory segments.
On the sun4m the limits can easily be made larger: consider turning
MAXTSIZ and MAXDSIZ into tunable variables..
deleting (and cleaning up) N pages of #ifdefs in machdep.c. While we're
at it, make the cpu type options generate flags, and check them instead of
kernel Makefile defines.
Fixes profiling for non-underscore-prepending toolchains
(elf, e.g., shared libs), and breaks a.out/ecoff toolchains.
May break mips kernel profiling too. Needs more thought, since the
original intent of __mcount vs ___mcount on mips date back to pre-1.0 days.
21164 + 21172 box, with Yet Another Way of doing interrupts. The
interrupt mapping and handling code hasn't been written yet, and none
of this code has been tested. (Checkpoint of work in progress.)
* handle interpreters with nonzero virtual address of entry-point:
subtract p_vaddr from computed entrypoint, as the mips elf exec did.
* Add #ifdef ELF_INTERP_NON_RELOCATABLE/#endif around the code
that tries to choose a `good' address at which to load an interpreter,
if none was set by the emul probe function.
(the address chosen could be improved to avoid fragmenting the
process virtual address space).
* define ELF_INTERP_NON_RELOCATABLE in machine/elf_machdep.h for mips CPUs,
which currently use a GNU-derived ld.so.
ELF_INTERP_NON_RELOCATABLE is not necessary for native NetBSD/alpha ELF
binaries. It may be required for GNU-derived ELF dynamic loaders (Linux/i386?)
- Add reset attribute sequences for bold, underline, and reverse
- Add insert/delete line sequences
- Recognize but ignore G0/G1 character set sequences
Performance:
- Speed up clear_line() when clearing the entire line
Also, some stylistic changes for checking/setting scroll region bounds
and in putc_getpars().
These changes make the ITE work properly with the 1.2 termcap file.
- The boundary argument to bus_space_alloc() should be a bus_size_t, not
a bus_addr_t.
- The buffer arguments in the "multiple write" methods should have
const qualifiers.
And one from me:
- Make bus_space_barrier() eat up the arguments passed to it so that
the compiler doesn't needlessly whine.
the variable `dumpsize' (used by savecore(8)) and that the CPU specific data
gets dumped first.
Also, squash a typo that prevented the crash dump to be shifted towards the
end of the swap partition. In fact, the entire dumpconf() routine has been
redone, mostly by pasting large chunks from the alpha port.
have an Apple Sound Chip. Make sure that we have configured the device
before allowing accesses to ASC memory. Among other things, this
prevents the 660AV and 840AV from getting a kernel bus error when trying
to beep on the console.
everything before the beginning of the "a" partition on a disk
is read-only except when accessed via RAW_PART. (a problem if
"a" isn't at the front of the disk). pointed out by pk back
in july.
* Only FFS is needed for the install kernel.
* Configure the console to 8N1 (that's what the pc532's rom monitor uses).
* The install kernel doesn't need to know about CDROM drives.
* Use the new mi ramdisk.
the wrong thing with standby mode (as some older ThinkPAD 701c BIOSes do, for
example.) Rename APM_NOIDLE to APM_NO_IDLE for consistency and "niceness,"
and error out (with a useful error message) if APM_NOIDLE is defined.
floppy driver.
- Fixup format types in the debug-printf's
- Don't print empty lines on unconfigured drives.
- When a drive is detected, show it's default format.
---- Warning: minor numbers are shifted! ---
instead of 0x400.
- Restructure interrupt handling for more performance--continue to
read/write data as long as the device keeps us in a data xfer phase.
There is still a lot of room for speed improvement here. Perhaps it
lies is speeding up the interrupt path in general?
naming for fmovem, while breaking it for fmove. We probably never will
see normal fmove in the kernel, nevertheless it should be corrected while
somebody remembers.
Besides, the correct patch is smaller and thus easier to verify than the
origininal one.
Added support the new instructions defined in the ARM V4 Architecture
Reference manual (long multiplies, half word load and stores,
half word/byte signed loads).
Added support for the ARM810 IMB architecture defined SWIs.
Fixed bug in calculating some immediate constants.
Added support for the wfs, rfs, wfc, rfc instructions
Added support for the floating point compare instructions
Added ldf, stf, ldc and stc instructions.
Fixed mis-disassembly of some msr/mrs instructions.
The ldm and stm instructions will modify the direction identifier to
use the stack variations if the base register is r13.
variant of the CG4 (the one with the AMD colormap DACs). This has
been tested only on the "Type B" H/W at this point (Brooktree DACs).
Thanks to Ezra Story and Scott Ellis for the "Type A" support.
some guesses for the machines that have two of these buggers (I don't have
such a machine). This driver is a copy of the sparc/alpha esp with a
minimum of changes--after we get it performing a bit more respectably,
we should see about re-normalizing the sources.
- add a missing return; at the end of a case, leading to wrong disassembly
of the next few instructions after fmovem.
- while we're here, correct the same bug in PBcc.
XXX there are a few other dubious fallthroughs in this file (which are
not explicitly marked with /* FALLTHROUGH */), which I didn't yet analyze.
* Fix other FMOVEM interpretation bugs:
- correct printing of FP data register lists if all are used (only FP0
would be mentioned)
- correct printing of FP data register lists in the case the list is reversed
(would have printed nothing)
- correct mapping of fp0-fp7 to register list bits (was reversed)
- correct printing of FP control register lists (this list is never reversed)
- correct printing of FMOVEM with FP control registers (the data direction
was interpreted the wrong way)
* While we're here, enhance the comments in MOVC's list of cpu control
registers
second on Sun4m machines. Although this was in the noise of the unstable
Sun clock crystals before, the discrepancy amounted to about 100 ppm, and
thus made NTP perform poorly. NTP now works happily on my SS20...
- Sync with hp300 version.
Machdep.c:
- Notify the vm-system that kernel-text is read/execute
- Notify the vm-system that page zero isn't mapped
[ Grrr.. How do you cancel a check-in when you find out too late they
should have different comments ]
comment to note that this printf still isn't quite right (possibly
because this is now a pseudodevice), and the autoconf printout when
mounting root on a ramdisk isn't right, either. This should both be
fixed.
- No more distinction between i/o-mapped and memory-mapped
devices. It's all "bus space" now, and space tags
differentiate the space with finer grain than the
bus chipset tag.
- Add memory barrier methods.
- Implement space alloc/free methods.
- Implement region read/write methods (like memcpy to/from
bus space).
This interface provides a better abstraction for dealing with
machine-independent chipset drivers.
VM_PROT_READ|VM_PROT_EXECUTE. The previous default (VM_PROT_ALL)
would cause the following scenario:
- someone attempts to write kernel text (my test was writing
to an offset of /dev/kmem which was known to be in the text
segment, while in single-user mode).
- enter trap() with MMU fault (because of RO pte).
- trap() calls vm_fault(), which looks up vm_map_entry for
fauling address.
- vm_fault interprets write fault and VM_PROT_WRITE (in VM_PROT_ALL)
as COW; new page allocated, data copied to new page, new page
mapped in at trunc_page(<faulting va>).
- wow, look at the fireworks!
Fixes two potential symptoms:
- kernacc() returns TRUE when checking for permission to write
an offset in kernel text, which is bogus, since the text has
been mapped RO by pmap_bootstrap().
- Handling of a stray pointer that attempted to scribble into
kernel text would not be executed properly.
don't do this, kernacc() will bogusly return TRUE for page 0, causing a
NULL pointer dereference in uiomove() when reading /dev/kmem.
Thanks to Scott Reynolds for noticing the problem.
Still untested on -1260/-1230, and hangs when enforcing SFAS_NO_DMA on 2060;
but works with DMA on the latter.
Still untested in a NetBSD-12A environment. (Sorry, don't have the hardware
myself.)
Thanks to Laurent Baroukh for being the guinea pig, and to Jerome Lovy
for forwarding the hardware information Phase V gave him, and to Phase
V for providing it.
jonathan