Aren
/
NetBSD
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Use bitmask_snprintf().

This commit is contained in:
thorpej 1996-11-13 06:13:39 +00:00
parent d3b5fe8492
commit 35c9c776fe
6 changed files with 104 additions and 60 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

11
sys/arch/amiga/amiga/trap.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: trap.c,v 1.51 1996/10/13 03:06:42 christos Exp $ */
/* $NetBSD: trap.c,v 1.52 1996/11/13 06:22:20 thorpej Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@ -311,10 +311,13 @@ trapmmufault(type, code, v, fp, p, sticks)
if (mmudebug && mmutype == MMU_68040) {
#ifdef M68060
if (machineid & AMIGA_68060) {
if (--donomore == 0 || mmudebug & 1)
printf ("68060 access error: pc %x, code %b,"
if (--donomore == 0 || mmudebug & 1) {
char bits[64];
printf ("68060 access error: pc %x, code %s,"
" ea %x\n", fp->f_pc,
code, FSLW_STRING, v);
bitmask_snprintf(code, FSLW_STRING,
bits, sizeof(bits)), v);
}
if (p == oldp && v == oldv && code == oldcode)
panic("Identical fault backtoback!");
if (donomore == 0)

17
sys/arch/sparc/dev/dma.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: dma.c,v 1.34 1996/10/13 02:59:44 christos Exp $ */
/* $NetBSD: dma.c,v 1.35 1996/11/13 06:13:41 thorpej Exp $ */
/*
* Copyright (c) 1994 Paul Kranenburg. All rights reserved.
@ -394,18 +394,20 @@ int
espdmaintr(sc)
struct dma_softc *sc;
{
char bits[64];
int trans, resid;
u_long csr;
csr = DMACSR(sc);
ESP_DMA(("%s: intr: addr %p, csr %b\n", sc->sc_dev.dv_xname,
DMADDR(sc), csr, DMACSRBITS));
ESP_DMA(("%s: intr: addr %p, csr %s\n", sc->sc_dev.dv_xname,
DMADDR(sc), bitmask_snprintf(csr, DMACSRBITS, bits,
sizeof(bits))));
if (csr & D_ERR_PEND) {
DMACSR(sc) &= ~D_EN_DMA; /* Stop DMA */
DMACSR(sc) |= D_INVALIDATE;
printf("%s: error: csr=%b\n", sc->sc_dev.dv_xname,
csr, DMACSRBITS);
printf("%s: error: csr=%s\n", sc->sc_dev.dv_xname,
bitmask_snprintf(csr, DMACSRBITS, bits, sizeof(bits)));
return 0;
}
@ -510,6 +512,7 @@ int
ledmaintr(sc)
struct dma_softc *sc;
{
char bits[64];
u_long csr;
csr = DMACSR(sc);
@ -518,8 +521,8 @@ ledmaintr(sc)
printf("Lance DMA error, see your doctor!\n");
DMACSR(sc) &= ~D_EN_DMA; /* Stop DMA */
DMACSR(sc) |= D_INVALIDATE;
printf("%s: error: csr=%b\n", sc->sc_dev.dv_xname,
(u_int)csr, DMACSRBITS);
printf("%s: error: csr=%s\n", sc->sc_dev.dv_xname,
bitmask_snprintf(csr, DMACSRBITS, bits, sizeof(bits)));
}
return 1;
}

32
sys/arch/sparc/dev/fd.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: fd.c,v 1.39 1996/10/13 02:59:53 christos Exp $ */
/* $NetBSD: fd.c,v 1.40 1996/11/13 06:13:42 thorpej Exp $ */
/*-
* Copyright (c) 1993, 1994, 1995 Charles Hannum.
@ -969,6 +969,7 @@ fdcstatus(dv, n, s)
char *s;
{
struct fdc_softc *fdc = (void *)dv->dv_parent;
char bits[64];
#if 0
/*
* A 82072 seems to return <invalid command> on
@ -991,15 +992,18 @@ fdcstatus(dv, n, s)
printf("\n");
break;
case 2:
printf(" (st0 %b cyl %d)\n",
fdc->sc_status[0], NE7_ST0BITS,
fdc->sc_status[1]);
printf(" (st0 %s cyl %d)\n",
bitmask_snprintf(fdc->sc_status[0], NE7_ST0BITS,
bits, sizeof(bits)), fdc->sc_status[1]);
break;
case 7:
printf(" (st0 %b st1 %b st2 %b cyl %d head %d sec %d)\n",
fdc->sc_status[0], NE7_ST0BITS,
fdc->sc_status[1], NE7_ST1BITS,
fdc->sc_status[2], NE7_ST2BITS,
printf(" (st0 %s", bitmask_snprintf(fdc->sc_status[0],
NE7_ST0BITS, bits, sizeof(bits)));
printf(" st1 %s", bitmask_snprintf(fdc->sc_status[1],
NE7_ST1BITS, bits, sizeof(bits)));
printf(" st2 %s", bitmask_snprintf(fdc->sc_status[2],
NE7_ST2BITS, bits, sizeof(bits)));
printf(" cyl %d head %d sec %d)\n",
fdc->sc_status[3], fdc->sc_status[4], fdc->sc_status[5]);
break;
#ifdef DIAGNOSTIC
@ -1467,6 +1471,7 @@ void
fdcretry(fdc)
struct fdc_softc *fdc;
{
char bits[64];
struct fd_softc *fd;
struct buf *bp;
@ -1496,10 +1501,13 @@ fdcretry(fdc)
diskerr(bp, "fd", "hard error", LOG_PRINTF,
fd->sc_skip / FDC_BSIZE, (struct disklabel *)NULL);
printf(" (st0 %b st1 %b st2 %b cyl %d head %d sec %d)\n",
fdc->sc_status[0], NE7_ST0BITS,
fdc->sc_status[1], NE7_ST1BITS,
fdc->sc_status[2], NE7_ST2BITS,
printf(" (st0 %s", bitmask_snprintf(fdc->sc_status[0],
NE7_ST0BITS, bits, sizeof(bits)));
printf(" st1 %s", bitmask_snprintf(fdc->sc_status[1],
NE7_ST1BITS, bits, sizeof(bits)));
printf(" st2 %s", bitmask_snprintf(fdc->sc_status[2],
NE7_ST2BITS, bits, sizeof(bits)));
printf(" cyl %d head %d sec %d)\n",
fdc->sc_status[3], fdc->sc_status[4], fdc->sc_status[5]);
bp->b_flags |= B_ERROR;

8
sys/arch/sparc/dev/si.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: si.c,v 1.28 1996/10/13 03:00:09 christos Exp $ */
/* $NetBSD: si.c,v 1.29 1996/11/13 06:13:44 thorpej Exp $ */
/*
* Copyright (c) 1995 Jason R. Thorpe
@ -328,6 +328,7 @@ si_attach(parent, self, args)
struct confargs *ca = args;
struct romaux *ra = &ca->ca_ra;
struct bootpath *bp;
char bits[64];
int i;
/* Pull in the options flags. */
@ -457,8 +458,9 @@ si_attach(parent, self, args)
}
printf(" pri %d\n", ra->ra_intr[0].int_pri);
if (sc->sc_options) {
printf("%s: options=%b\n", ncr_sc->sc_dev.dv_xname,
sc->sc_options, SI_OPTIONS_BITS);
printf("%s: options=%s\n", ncr_sc->sc_dev.dv_xname,
bitmask_snprintf(sc->sc_options, SI_OPTIONS_BITS,
bits, sizeof(bits)));
}
#ifdef DEBUG
if (si_debug)

67
sys/arch/sparc/sparc/memreg.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: memreg.c,v 1.15 1996/10/13 03:00:39 christos Exp $ */
/* $NetBSD: memreg.c,v 1.16 1996/11/13 06:13:39 thorpej Exp $ */
/*
* Copyright (c) 1992, 1993
@ -129,15 +129,19 @@ memerr(issync, ser, sva, aer, ava)
int issync;
u_int ser, sva, aer, ava;
{
char bits[64];
/* XXX Ugh! Clean up this switch and all the ifdefs! */
switch (cputyp) {
#if defined(SUN4)
case CPU_SUN4:
if (par_err_reg) {
printf("mem err: ser=%b sva=%x\n", ser, SER_BITS, sva);
printf("parity error register = %b\n",
*par_err_reg, PER_BITS);
printf("mem err: ser=%s sva=%x\n",
bitmask_snprintf(ser, SER_BITS, bits,
sizeof(bits)), sva);
printf("parity error register = %s\n",
bitmask_snprintf(*par_err_reg, PER_BITS,
bits, sizeof(bits)));
} else {
printf("mem err: ser=? sva=?\n");
printf("parity error register not mapped yet!\n"); /* XXX */
@ -152,12 +156,15 @@ memerr(issync, ser, sva, aer, ava)
#if defined(SUN4C)
case CPU_SUN4C:
printf("%ssync mem err: ser=%b sva=%x aer=%b ava=%x\n",
issync ? "" : "a", ser, SER_BITS,
sva, aer & 0xff, AER_BITS, ava);
printf("%ssync mem arr: ser=%s sva=%x ",
issync ? "" : "a", bitmask_snprintf(ser, SER_BITS,
bits, sizeof(bits)), sva);
printf("aer=%s ava=%x\n", bitmask_snprintf(aer & 0xff,
AER_BITS, bits, sizeof(bits)), ava);
if (par_err_reg)
printf("parity error register = %b\n",
*par_err_reg, PER_BITS);
printf("parity error register = %s\n",
bitmask_snprintf(*par_err_reg, PER_BITS,
bits, sizeof(bits)));
#ifdef DEBUG
callrom();
#else
@ -192,26 +199,32 @@ hardmemerr4m(issync, fsr, faddr)
int issync;
u_int fsr, faddr;
{
char bits[64];
switch (issync) {
case 1:
if ((fsr & SFSR_FT) == SFSR_FT_NONE)
return;
panic("mem err: sfsr=%b sfaddr=%x", fsr, SFSR_BITS, faddr);
printf("mem err: sfsr=%s sfaddr=%x\n", bitmask_snprintf(fsr,
SFSR_BITS, bits, sizeof(bits)), faddr);
break;
case 0:
if (!(fsr & AFSR_AFO))
return;
panic("async (HS) mem err: afsr=%b afaddr=%x physaddr=%x%x",
fsr, AFSR_BITS, faddr,
(fsr & AFSR_AFA) >> AFSR_AFA_RSHIFT, faddr);
printf("async (HS) mem err: afsr=%s afaddr=%x physaddr=%x%x\n",
bitmask_snprintf(fsr, AFSR_BITS, bits, sizeof(bits)),
faddr, (fsr & AFSR_AFA) >> AFSR_AFA_RSHIFT, faddr);
break;
default: /* unknown; print both decodings*/
panic("Unknown mem err: if sync, fsr=%b fva=%x; if async, fsr"
"=%b fa=%x pa=%x%x", fsr, SFSR_BITS, faddr, fsr,
AFSR_BITS, faddr, (fsr & AFSR_AFA) >> AFSR_AFA_RSHIFT,
faddr);
printf("unknown mem err: if sync, fsr=%s fva=%x; ",
bitmask_snprintf(fsr, SFSR_BITS, bits, sizeof(bits)),
faddr);
printf("if async, fsr=%s fa=%x pa=%x%x", bitmask_snprintf(fsr,
AFSR_BITS, bits, sizeof(bits)), faddr,
(fsr & AFSR_AFA) >> AFSR_AFA_RSHIFT, faddr);
break;
}
panic("hard memory error");
}
/*
@ -234,6 +247,8 @@ memerr4m(type, sfsr, sfva, afsr, afva, tf)
register u_int afva;
register struct trapframe *tf;
{
char bits[64];
if ((afsr & AFSR_AFO) != 0) { /* HS async fault! */
printf("HyperSPARC async cache memory failure at phys 0x%x%x. "
@ -276,9 +291,12 @@ memerr4m(type, sfsr, sfva, afsr, afva, tf)
oldtype = T_DATAFAULT;
} else if (type == 0) { /* NMI */
printf("ERROR: got NMI with sfsr=0x%b, sfva=0x%x, afsr=0x%b, "
"afaddr=0x%x. Retrying...\n",
sfsr,SFSR_BITS,sfva,afsr, AFSR_BITS,afva);
printf("ERROR: got NMI with sfsr=0x%s, sfva=0x%x, ",
bitmask_snprintf(sfsr, SFSR_BITS, bits, sizeof(bits)),
sfva);
printf("afsr=0x%s, afaddr=0x%x. Retrying...\n",
bitmask_snprintf(afsr, AFSR_BITS, bits, sizeof(bits)),
afva);
if (oldtype == 0 || addrold == sfva)
hardmemerr4m(1, sfsr, sfva); /* XXX: async? */
/* NOTREACHED */
@ -286,9 +304,12 @@ memerr4m(type, sfsr, sfva, afsr, afva, tf)
oldtype = 0;
addrold = sfva;
} else /* something we don't know about?!? */ {
panic("memerr4m: unknown fatal memory error. type=%d, sfsr=%b,"
" sfva=%x, afsr=%b, afaddr=%x",
type, sfsr, SFSR_BITS, sfva, afsr, AFSR_BITS, afva);
printf("unknown fatal memory error, type=%d, sfsr=%s, sfva=%x",
type, bitmask_snprintf(sfsr, SFSR_BITS, bits, sizeof(bits)),
sfva);
printf(", afsr=%s, afaddr=%x\n", bitmask_snprintf(afsr,
AFSR_BITS, bits, sizeof(bits)), afva);
panic("memerr4m");
}
return;

29
sys/arch/sparc/sparc/trap.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: trap.c,v 1.47 1996/10/13 03:00:48 christos Exp $ */
/* $NetBSD: trap.c,v 1.48 1996/11/13 06:13:40 thorpej Exp $ */
/*
* Copyright (c) 1996
@ -268,6 +268,7 @@ trap(type, psr, pc, tf)
register struct proc *p;
register struct pcb *pcb;
register int n;
char bits[64];
u_quad_t sticks;
/* This steps the PC over the trap. */
@ -326,8 +327,9 @@ trap(type, psr, pc, tf)
#endif
if (type < 0x80) {
dopanic:
printf("trap type 0x%x: pc=%x npc=%x psr=%b\n",
type, pc, tf->tf_npc, psr, PSR_BITS);
printf("trap type 0x%x: pc=%x npc=%x psr=%s\n",
type, pc, tf->tf_npc, bitmask_snprintf(psr,
PSR_BITS, bits, sizeof(bits)));
panic(type < N_TRAP_TYPES ? trap_type[type] : T);
/* NOTREACHED */
}
@ -640,6 +642,7 @@ mem_access_fault(type, ser, v, pc, psr, tf)
vm_prot_t ftype;
int onfault;
u_quad_t sticks;
char bits[64];
cnt.v_trap++;
if ((p = curproc) == NULL) /* safety check */
@ -665,8 +668,8 @@ mem_access_fault(type, ser, v, pc, psr, tf)
extern char Lfsbail[];
if (type == T_TEXTFAULT) {
(void) splhigh();
printf("text fault: pc=%x ser=%b\n", pc,
ser, SER_BITS);
printf("text fault: pc=%x ser=%s\n", pc,
bitmask_snprintf(ser, SER_BITS, bits, sizeof(bits)));
panic("kernel fault");
/* NOTREACHED */
}
@ -744,8 +747,9 @@ kfault:
(int)p->p_addr->u_pcb.pcb_onfault : 0;
if (!onfault) {
(void) splhigh();
printf("data fault: pc=%x addr=%x ser=%b\n",
pc, v, ser, SER_BITS);
printf("data fault: pc=%x addr=%x ser=%s\n",
pc, v, bitmask_snprintf(ser, SER_BITS,
bits, sizeof(bits)));
panic("kernel fault");
/* NOTREACHED */
}
@ -788,6 +792,7 @@ mem_access_fault4m(type, sfsr, sfva, afsr, afva, tf)
vm_prot_t ftype;
int onfault;
u_quad_t sticks;
char bits[64];
#if DEBUG
static int lastdouble;
#endif
@ -941,8 +946,9 @@ static int lastdouble;
extern char Lfsbail[];
if (sfsr & SFSR_AT_TEXT || type == T_TEXTFAULT) {
(void) splhigh();
printf("text fault: pc=%x sfsr=%b sfva=%x\n", pc,
sfsr, SFSR_BITS, sfva);
printf("text fault: pc=%x sfsr=%s sfva=%x\n", pc,
bitmask_snprintf(sfsr, SFSR_BITS, bits,
sizeof(bits)), sfva);
panic("kernel fault");
/* NOTREACHED */
}
@ -1016,8 +1022,9 @@ kfault:
(int)p->p_addr->u_pcb.pcb_onfault : 0;
if (!onfault) {
(void) splhigh();
printf("data fault: pc=%x addr=%x sfsr=%b\n",
pc, sfva, sfsr, SFSR_BITS);
printf("data fault: pc=%x addr=%x sfsr=%s\n",
pc, sfva, bitmask_snprintf(sfsr, SFSR_BITS,
bits, sizeof(bits)));
panic("kernel fault");
/* NOTREACHED */
}