make eb164 interrupts actually work.
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cgd
parent
8b50c9af38
commit
6d7b2d82a7
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@ -1,4 +1,4 @@
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/* $NetBSD: pci_eb164.c,v 1.3 1996/11/17 02:30:25 cgd Exp $ */
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/* $NetBSD: pci_eb164.c,v 1.4 1996/11/25 03:47:05 cgd Exp $ */
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/*
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* Copyright (c) 1995, 1996 Carnegie-Mellon University.
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@ -77,8 +77,8 @@ bus_space_tag_t eb164_intrgate_iot;
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bus_space_handle_t eb164_intrgate_ioh;
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void eb164_iointr __P((void *framep, unsigned long vec));
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void eb164_enable_intr __P((int irq));
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void eb164_disable_intr __P((int irq));
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extern void eb164_intr_enable __P((int irq)); /* pci_eb164_intr.S */
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extern void eb164_intr_disable __P((int irq)); /* pci_eb164_intr.S */
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void
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pci_eb164_pickintr(ccp)
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@ -99,7 +99,7 @@ pci_eb164_pickintr(ccp)
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&eb164_intrgate_ioh) != 0)
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panic("pci_eb164_pickintr: couldn't map interrupt PLD");
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for (i = 0; i < EB164_MAX_IRQ; i++)
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eb164_disable_intr(i);
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eb164_intr_disable(i);
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eb164_pci_intr = alpha_shared_intr_alloc(EB164_MAX_IRQ);
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for (i = 0; i < EB164_MAX_IRQ; i++)
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@ -108,7 +108,7 @@ pci_eb164_pickintr(ccp)
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#if NSIO
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sio_intr_setup(iot);
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eb164_enable_intr(EB164_SIO_IRQ);
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eb164_intr_enable(EB164_SIO_IRQ);
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#endif
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set_iointr(eb164_iointr);
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@ -147,9 +147,9 @@ dec_eb164_intr_map(ccv, bustag, buspin, line, ihp)
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eb164_irq = 5; /* IDE */
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break;
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case 5:
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case 6:
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case 7:
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case 8:
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case 9:
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switch (buspin) {
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case 1:
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@ -230,7 +230,7 @@ dec_eb164_intr_establish(ccv, ih, level, func, arg)
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level, func, arg, "eb164 irq");
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if (cookie != NULL && alpha_shared_intr_isactive(eb164_pci_intr, ih))
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eb164_enable_intr(ih);
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eb164_intr_enable(ih);
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return (cookie);
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}
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@ -270,7 +270,7 @@ eb164_iointr(framep, vec)
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"eb164 irq");
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if (eb164_pci_intr[irq].intr_nstrays ==
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eb164_pci_intr[irq].intr_maxstrays)
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eb164_disable_intr(irq);
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eb164_intr_disable(irq);
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}
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return;
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}
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@ -283,16 +283,17 @@ eb164_iointr(framep, vec)
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panic("eb164_iointr: weird vec 0x%x\n", vec);
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}
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#if 0 /* THIS DOES NOT WORK! see pci_eb164_intr.S. */
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u_int8_t eb164_intr_mask[3] = { 0xff, 0xff, 0xff };
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void
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eb164_enable_intr(irq)
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eb164_intr_enable(irq)
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int irq;
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{
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int byte = (irq / 8), bit = (irq % 8);
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#if 1
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printf("eb164_enable_intr: enabling %d (%d:%d)\n", irq, byte, bit);
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printf("eb164_intr_enable: enabling %d (%d:%d)\n", irq, byte, bit);
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#endif
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eb164_intr_mask[byte] &= ~(1 << bit);
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@ -301,16 +302,17 @@ eb164_enable_intr(irq)
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}
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void
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eb164_disable_intr(irq)
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eb164_intr_disable(irq)
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int irq;
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{
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int byte = (irq / 8), bit = (irq % 8);
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#if 1
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printf("eb164_disable_intr: disabling %d (%d:%d)\n", irq, byte, bit);
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printf("eb164_intr_disable: disabling %d (%d:%d)\n", irq, byte, bit);
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#endif
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eb164_intr_mask[byte] |= (1 << bit);
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bus_space_write_1(eb164_intrgate_iot, eb164_intrgate_ioh, byte,
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eb164_intr_mask[byte]);
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}
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#endif
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@ -0,0 +1,62 @@
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/* $NetBSD: pci_eb164_intr.s,v 1.1 1996/11/25 03:47:07 cgd Exp $ */
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/*
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* Copyright (c) 1996 Carnegie-Mellon University.
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* All rights reserved.
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*
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* Author: Chris G. Demetriou
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*
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* Permission to use, copy, modify and distribute this software and
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* its documentation is hereby granted, provided that both the copyright
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* notice and this permission notice appear in all copies of the
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* software, derivative works or modified versions, and any portions
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* thereof, and that both notices appear in supporting documentation.
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*
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* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
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* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
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* FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
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*
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* Carnegie Mellon requests users of this software to return to
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*
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* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
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* School of Computer Science
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* Carnegie Mellon University
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* Pittsburgh PA 15213-3890
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*
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* any improvements or extensions that they make and grant Carnegie the
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* rights to redistribute these changes.
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*/
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/*
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* The description of how to enable and disable interrupts in the
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* AlphaPC 164 motherboard technical reference manual is incorrect,
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* at least for the OSF/1 PALcode.
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*
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* These functions were written by disassembling a Digital UNIX kernel's
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* eb164_intrdsabl and eb164_intrenabl functions (because they had
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* interesting names), and then playing with them to see how to call
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* them correctly.
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*
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* It looks like the right thing to do is to call them with the interrupt
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* request that you want to enable or disable (presumably in the range
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* 0 -> 23, since there are 3 8-bit interrupt-enable bits in the
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* interrupt mask PLD).
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*/
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#include <machine/asm.h>
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.text
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LEAF(eb164_intr_enable,1)
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mov a0, a1
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ldiq a0, 0x34
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call_pal PAL_cserve
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RET
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END(eb164_intr_enable)
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.text
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LEAF(eb164_intr_disable,1)
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mov a0, a1
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ldiq a0, 0x35
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call_pal PAL_cserve
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RET
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END(eb164_intr_enable)
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