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159 Commits

Author SHA1 Message Date
Richard Henderson
3887c0388d target/arm: Implement SVE Floating Point Unary Operations - Unpredicated Group 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180627043328.11531-21-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2018-06-29 15:11:09 +01:00
Richard Henderson
23fbe79faa target/arm: Implement SVE FP Fast Reduction Group 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180627043328.11531-20-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2018-06-29 15:11:08 +01:00
Richard Henderson
ca40a6e6e3 target/arm: Implement SVE Floating Point Multiply Indexed Group 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180627043328.11531-19-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2018-06-29 15:11:08 +01:00
Richard Henderson
cc48affe83 target/arm: Implement SVE floating-point arithmetic with immediate 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180627043328.11531-18-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2018-06-29 15:11:08 +01:00
Richard Henderson
abfdefd5bd target/arm: Implement SVE floating-point compare vectors 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180627043328.11531-17-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2018-06-29 15:11:07 +01:00
Richard Henderson
408ecde97b target/arm: Implement SVE scatter store vector immediate 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180627043328.11531-16-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2018-06-29 15:11:07 +01:00
Richard Henderson
673e9fa6c2 target/arm: Implement SVE gather loads 
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 20180627043328.11531-14-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2018-06-29 15:11:06 +01:00
Richard Henderson
dec6cf6b43 target/arm: Implement SVE prefetches 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180627043328.11531-13-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2018-06-29 15:11:06 +01:00
Richard Henderson
f6dbf62a7e target/arm: Implement SVE scatter stores 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180627043328.11531-12-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2018-06-29 15:11:05 +01:00
Richard Henderson
5047c204d0 target/arm: Implement SVE store vector/predicate register 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180627043328.11531-11-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2018-06-29 15:11:05 +01:00
Richard Henderson
684598640d target/arm: Implement SVE load and broadcast element 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180627043328.11531-10-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2018-06-29 15:11:05 +01:00
Richard Henderson
7f9ddf64d5 target/arm: Implement SVE Floating Point Accumulating Reduction Group 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180627043328.11531-9-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2018-06-29 15:11:04 +01:00
Richard Henderson
6ceabaad11 target/arm: Implement SVE FP Multiply-Add Group 
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 20180627043328.11531-8-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2018-06-29 15:11:04 +01:00
Richard Henderson
ec3b87c28e target/arm: Implement SVE floating-point arithmetic (predicated) 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180627043328.11531-7-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2018-06-29 15:11:04 +01:00
Richard Henderson
8092c6a314 target/arm: Implement SVE integer convert to floating-point 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
[PMM: fixed typo]
Message-id: 20180627043328.11531-6-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2018-06-29 15:11:03 +01:00
Richard Henderson
05abe304be target/arm: Implement SVE load and broadcast quadword 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180627043328.11531-5-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2018-06-29 15:11:03 +01:00
Richard Henderson
1a039c7e58 target/arm: Implement SVE Memory Contiguous Store Group 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180627043328.11531-4-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2018-06-29 15:11:03 +01:00
Richard Henderson
e2654d7575 target/arm: Implement SVE Contiguous Load, first-fault and no-fault 
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Tested-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 20180627043328.11531-3-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2018-06-29 15:11:02 +01:00
Richard Henderson
c4e7c493da target/arm: Implement SVE Memory Contiguous Load Group 
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180627043328.11531-2-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2018-06-29 15:11:02 +01:00
Richard Henderson
29b80469dc target/arm: Implement SVE Floating Point Arithmetic - Unpredicated Group 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180613015641.5667-19-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2018-06-15 15:23:34 +01:00
Richard Henderson
6e6a157d68 target/arm: Implement SVE Integer Wide Immediate - Unpredicated Group 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180613015641.5667-18-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2018-06-15 15:23:34 +01:00
Richard Henderson
ed49196125 target/arm: Implement FDUP/DUP 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180613015641.5667-17-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2018-06-15 15:23:34 +01:00
Richard Henderson
caf1cefc72 target/arm: Implement SVE Integer Compare - Scalars Group 
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180613015641.5667-16-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2018-06-15 15:23:34 +01:00
Richard Henderson
9ee3a611de target/arm: Implement SVE Predicate Count Group 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180613015641.5667-15-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2018-06-15 15:23:34 +01:00
Richard Henderson
35da316f5e target/arm: Implement SVE Partition Break Group 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180613015641.5667-14-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2018-06-15 15:23:34 +01:00
Richard Henderson
38cadeba0d target/arm: Implement SVE Integer Compare - Immediate Group 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180613015641.5667-13-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2018-06-15 15:23:34 +01:00
Richard Henderson
757f9cff1b target/arm: Implement SVE Integer Compare - Vectors Group 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180613015641.5667-12-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2018-06-15 15:23:34 +01:00
Richard Henderson
d3fe4a29d7 target/arm: Implement SVE Select Vectors Group 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180613015641.5667-11-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2018-06-15 15:23:34 +01:00
Richard Henderson
b48ff24098 target/arm: Implement SVE vector splice (predicated) 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180613015641.5667-10-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2018-06-15 15:23:34 +01:00
Richard Henderson
dae8fb9019 target/arm: Implement SVE reverse within elements 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180613015641.5667-9-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2018-06-15 15:23:34 +01:00
Richard Henderson
792a557847 target/arm: Implement SVE copy to vector (predicated) 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180613015641.5667-8-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2018-06-15 15:23:34 +01:00
Richard Henderson
ef23cb726d target/arm: Implement SVE conditionally broadcast/extract element 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180613015641.5667-7-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2018-06-15 15:23:34 +01:00
Richard Henderson
3ca879aeb3 target/arm: Implement SVE compress active elements 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180613015641.5667-6-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2018-06-15 15:23:34 +01:00
Richard Henderson
234b48e9c6 target/arm: Implement SVE Permute - Interleaving Group 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180613015641.5667-5-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2018-06-15 15:23:34 +01:00
Richard Henderson
d731d8cb3c target/arm: Implement SVE Permute - Predicates Group 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180613015641.5667-4-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2018-06-15 15:23:34 +01:00
Richard Henderson
30562ab716 target/arm: Implement SVE Permute - Unpredicated Group 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180613015641.5667-3-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2018-06-15 15:23:34 +01:00
Richard Henderson
b94f8f60bd target/arm: Implement SVE Permute - Extract Group 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180516223007.10256-26-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2018-05-18 17:48:09 +01:00
Richard Henderson
f25a236153 target/arm: Implement SVE Integer Wide Immediate - Predicated Group 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180516223007.10256-25-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2018-05-18 17:48:09 +01:00
Richard Henderson
e1fa1164f3 target/arm: Implement SVE Bitwise Immediate Group 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180516223007.10256-24-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2018-05-18 17:48:09 +01:00
Richard Henderson
24e82e6834 target/arm: Implement SVE Element Count Group 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180516223007.10256-23-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2018-05-18 17:48:09 +01:00
Richard Henderson
a1f233f25f target/arm: Implement SVE floating-point trig select coefficient 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180516223007.10256-22-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2018-05-18 17:48:09 +01:00
Richard Henderson
0762cd428f target/arm: Implement SVE floating-point exponential accelerator 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180516223007.10256-21-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2018-05-18 17:48:09 +01:00
Richard Henderson
4b242d9c1b target/arm: Implement SVE Compute Vector Address Group 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180516223007.10256-20-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2018-05-18 17:48:09 +01:00
Richard Henderson
d9d78dccc8 target/arm: Implement SVE Bitwise Shift - Unpredicated Group 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180516223007.10256-19-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2018-05-18 17:48:09 +01:00
Richard Henderson
96f922cccc target/arm: Implement SVE Stack Allocation Group 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180516223007.10256-18-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2018-05-18 17:48:09 +01:00
Richard Henderson
9a56c9c3a9 target/arm: Implement SVE Index Generation Group 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180516223007.10256-17-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2018-05-18 17:48:09 +01:00
Richard Henderson
fea98f9c30 target/arm: Implement SVE Integer Arithmetic - Unpredicated Group 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180516223007.10256-16-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2018-05-18 17:48:09 +01:00
Richard Henderson
96a36e4a44 target/arm: Implement SVE Integer Multiply-Add Group 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180516223007.10256-15-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2018-05-18 17:48:08 +01:00
Richard Henderson
afac6d0467 target/arm: Implement SVE Integer Arithmetic - Unary Predicated Group 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180516223007.10256-14-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2018-05-18 17:48:08 +01:00
Richard Henderson
fe7f8dfb2d target/arm: Implement SVE bitwise shift by wide elements (predicated) 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180516223007.10256-13-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2018-05-18 17:48:08 +01:00
Richard Henderson
27721dbb7a target/arm: Implement SVE bitwise shift by vector (predicated) 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180516223007.10256-12-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2018-05-18 17:48:08 +01:00
Richard Henderson
ccd841c3d7 target/arm: Implement SVE bitwise shift by immediate (predicated) 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180516223007.10256-11-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2018-05-18 17:48:08 +01:00
Richard Henderson
047cec971d target/arm: Implement SVE Integer Reduction Group 
Excepting MOVPRFX, which isn't a reduction.  Presumably it is
placed within the group because of its encoding.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180516223007.10256-10-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2018-05-18 17:48:08 +01:00
Richard Henderson
f97cfd596e target/arm: Implement SVE Integer Binary Arithmetic - Predicated Group 
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180516223007.10256-9-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2018-05-18 17:48:08 +01:00
Richard Henderson
028e2a7b87 target/arm: Implement SVE Predicate Misc Group 
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180516223007.10256-8-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2018-05-18 17:48:08 +01:00
Richard Henderson
516e246a1a target/arm: Implement SVE Predicate Logical Operations Group 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180516223007.10256-7-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2018-05-18 17:48:08 +01:00
Richard Henderson
9e18d7a67f target/arm: Implement SVE predicate test 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180516223007.10256-6-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2018-05-18 17:48:08 +01:00
Richard Henderson
d1822297f6 target/arm: Implement SVE load vector/predicate 
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180516223007.10256-5-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2018-05-18 17:48:08 +01:00
Richard Henderson
38388f7ee3 target/arm: Add SVE decode skeleton 
Including only 4, as-yet unimplemented, instruction patterns
so that the whole thing compiles.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180516223007.10256-3-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2018-05-18 17:48:08 +01:00