Commit Graph

173 Commits

Author SHA1 Message Date
Stanislav Shwartsman
f6ed95785f added cpu state param - for future use and for dbg info
started to move debugger to info bx_param interface -> info sse and info mmx commands modified
2007-10-11 18:12:00 +00:00
Stanislav Shwartsman
82b7eaabd5 CLFLUSH do not fault when checking execute only segment 2007-10-10 21:48:46 +00:00
Stanislav Shwartsman
071c5c1a26 A lot of changes but everything is really trivial.
Make save/restore default feature, the configure option for save/restore removed from configure script and save/restore made available forever. All code now assume it is exists. Bochs save/restore tree previosly called "save_restore" renamed to "bochs" tree and it will be havily used everywhere, starting from save/restore and ending by various bochs debugger functions. I am going to rework debugger code to get rid of debug CPU access functions and use this "bochs" param tree instead
2007-09-28 19:52:08 +00:00
Stanislav Shwartsman
e812f81e7b Fixes in zero upper ECX 2007-09-25 16:11:32 +00:00
Stanislav Shwartsman
91e6ca8d5c Implemented MTRR support
Fixes in #PF exception priority
2007-09-20 17:33:35 +00:00
Stanislav Shwartsman
70f513b07b Make efer control MSR separate register 2007-09-10 20:47:08 +00:00
Stanislav Shwartsman
895891b673 Implemented #AC check under configure option
Fixes in misaligned SSE support
2007-07-31 20:25:52 +00:00
Stanislav Shwartsman
38d1f39c77 Converted CR0 bits to one register similar to CR4 - a bit slower but helps with other features implemntation 2007-07-09 15:16:14 +00:00
Stanislav Shwartsman
7c6c2bb520 Removed PANIC message 2007-06-08 09:25:30 +00:00
Stanislav Shwartsman
65a99eb736 Change BX_ERROR to BX_DEBUG 2007-04-25 20:14:15 +00:00
Stanislav Shwartsman
6c139a9c8c Define LIN and PHY address size in config.h 2007-04-14 10:05:30 +00:00
Stanislav Shwartsman
d3252fbc1c Removed unneeded invalidate_prefetch_q from RDMSR instruction 2007-02-23 22:08:43 +00:00
Stanislav Shwartsman
c24627c00f Implemented CLFLUSH instruction
Set of minor fixes for correctness
2007-01-28 21:27:31 +00:00
Stanislav Shwartsman
6c63e84d23 Fixed CR3 masking in long mode
Added PANIC assertion of 32-bit physical address in PAE mode
cleanup
2006-10-04 19:08:40 +00:00
Stanislav Shwartsman
02c2fc9e89 Fixed priveledge level checks 2006-09-10 16:56:55 +00:00
Stanislav Shwartsman
fdac9efa9b Fixed ton of code duplication.
Do not save/restore XMM8-XMM15 not in 64-bit mode
2006-08-31 18:18:17 +00:00
Stanislav Shwartsman
65082e4a4f Handle granularity field for LDT
Next step - fix code duplication with TSS
2006-08-25 19:56:03 +00:00
Stanislav Shwartsman
3ce7764fce Fixes in 64-bit decoding 2006-08-11 17:23:36 +00:00
Stanislav Shwartsman
45353d5e6f Fixed DR registers handling in x86-64 mode 2006-06-26 21:07:44 +00:00
Stanislav Shwartsman
9269288319 Fix SR macros mis-use. Need to add assertion into bxlist_c and check that it has no 2 params with same name inside ! 2006-06-14 16:44:33 +00:00
Stanislav Shwartsman
49d7b4614f Fixed another bug generator - duplication between descriptor type field and four descriptor cache bits 2006-06-12 16:58:27 +00:00
Stanislav Shwartsman
308521e7ce Fixes in SYSCALL/SYSRET instructions
Use parse_selector to avoid code duplication
2006-06-11 21:37:22 +00:00
Stanislav Shwartsman
6c3420a18b Add debug prints before any #GP excepion which only possible to be generated 2006-06-09 22:29:07 +00:00
Stanislav Shwartsman
8b55085c76 Merge tss286 and tss386 segment descriptor cache fields to one structure 2006-05-21 20:41:48 +00:00
Stanislav Shwartsman
f4c7b4074e Support for x86-64 in x86 debugger (DR0-DR7) 2006-05-13 12:49:45 +00:00
Stanislav Shwartsman
9a32d0e98f Optimize debug registers handling 2006-05-13 12:29:12 +00:00
Stanislav Shwartsman
63dc4d4e10 Fixed CR4 GP(0) condition (patch by no_mayl in mailing list) 2006-04-23 16:11:16 +00:00
Stanislav Shwartsman
d972e4a4b7 Fixed CR3 restore in RSM instruction
Added HALT state indication (actually make existant one working for single CPU)
2006-04-10 19:05:21 +00:00
Stanislav Shwartsman
45f30f0a4c some code written to enter CPU to shutdown state.
finally the shutdown handling should be done exactly as in VmWare - the GUI should ask user if the CPU should reset and go to HLT/IF=0 if user choosed to stay in shutdown mode.
CPU configure option reset-on-triple-failt should be extended to shutdown-reset=0|1
small code cleanups and fixes
2006-04-07 20:47:32 +00:00
Stanislav Shwartsman
f8c3968d42 Changes list made after CVS service crash:
- Fixed critical bug in CPU code added with one of the prev commits
  - Disasm support for SSE4
  - Rename PNI->SSE3 everywhere in the code
  - Correctly decode, disassemble and execute 'XCHG R8, rAX' x86-64 instruction
  - Correctly decode, disassemble and execute multi-byte NOP 0F F1 opcode
  - Fixed ENTER and LEAVE instructions in x86-64 mode
  - Added ability to turn ON instruction trace, only GUI support is missed.
    Instruction trace could be enabled if Bochs was compiled with disasm
  - More changes Bit32u -> bx_phy_address
  - Complete preliminary implementation of SMM in Bochs, SMI is still PANICs but if you press 'continue' everything should work OK
  - Small code cleanup
  - Update CHANGES and user docs
2006-04-05 17:31:35 +00:00
Stanislav Shwartsman
da3d26d7f4 Preliminary implemntation of SMM save statei
Fixed fetchModeMask for load32bitOsStack
2006-03-27 18:02:07 +00:00
Stanislav Shwartsman
f347ab97bf Fixed CALL/JMP far through call gate 64
Decode SWAPGS and RDTSCP instructions
Indent changes in fetchdecode
2006-03-22 20:47:11 +00:00
Stanislav Shwartsman
a64b16391d Remove unused vars 2006-03-15 17:57:11 +00:00
Stanislav Shwartsman
e85a90a720 Remove cpu.h -> devices.cc dependancy, kill_bochs_request moved from CPU to bx_pc_system
Small Icache simplification and speedup
2006-03-14 18:11:22 +00:00
Stanislav Shwartsman
7b6c2587a9 Now devices could be compiled separatelly from CPU
Averything that required cpu.h include now has it explicitly and there are a lot of files not dependant by CPU at all which will compile a lot faster now ...
2006-03-06 22:03:16 +00:00
Stanislav Shwartsman
324d75e749 Fix another broking change 2006-03-04 09:22:55 +00:00
Stanislav Shwartsman
5fad793989 move local apic handling to the access_linear function for the memory class.
speedup the whole simulation by 2% !
2006-03-01 22:32:24 +00:00
Stanislav Shwartsman
a527b2cfca first smm - implement cpu state when switching to SMM
smm coming soon
fixed code duplication in init.cc
2006-02-28 19:50:08 +00:00
Stanislav Shwartsman
55ceecf79b Small optimization in icache page-write-stamp 2006-02-28 17:47:33 +00:00
Stanislav Shwartsman
024ce249bf Define SMM mode for future implementation.
I would like all next commits be aware of SMM mode.
It can't be implemented right now (too many questions w/o answers) but it will be done till next major release definitelly.
2006-02-14 19:00:08 +00:00
Stanislav Shwartsman
9b451f43e2 Save/restore RIP/RSP only on FAULT type exceptions, not on traps 2006-02-11 09:08:02 +00:00
Stanislav Shwartsman
9a15f59e05 Fixed bug in SYSRET legacy mode 2006-02-02 17:55:48 +00:00
Stanislav Shwartsman
9df8079206 Write to MSR_TSC implemented (patch by Bryce) 2006-01-21 12:06:03 +00:00
Stanislav Shwartsman
7bf51e48db Print FS_MSR_BASE and GS_MSR_BASE to debug registers dump (requested in bug report [ 1406387 ] JMP instruction should display absolute address)
Fixed fetch mode mask initialization (bug report 1400027  Boundary instruction cache error for uninitialized memory)
For safety only - everytime when changing CS register update fetch mode mask.
Actually it need to be updated everytime when there is a chance for execute mode change or 16/32 bit mode change.
2006-01-16 19:22:28 +00:00
Stanislav Shwartsman
a74b63eb3d Allow writing PCE to CR4 2006-01-13 11:11:29 +00:00
Stanislav Shwartsman
393a653fb4 Fix typo 2006-01-05 21:40:07 +00:00
Stanislav Shwartsman
70cc5a7fb0 Fix incorrect commit 2005-12-12 19:54:48 +00:00
Stanislav Shwartsman
f863d1e902 Generate #GP exception instead of #TS when TSS selector points to bad TSS 2005-12-12 19:44:06 +00:00
Stanislav Shwartsman
fe02ecab65 Do not flood log with WBINVD/INVD messages 2005-11-27 18:36:19 +00:00
Stanislav Shwartsman
8c91790680 Redefine registers accessors in cpu.h
Change BxSupportPAE and BxSupportGlobalPages macros to Bochs style names
Set bx_cpu_id in BX_CPU_C constructor (safe way)
Backup cpu-level check for paging features at compile time (already checked in configure)
Some warnings and indent fixes
speed up get_segment_base method for x86-64 case
2005-11-26 21:36:51 +00:00