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63 Commits

Author SHA1 Message Date
Stanislav Shwartsman
7f7c249934 disasm and some cpuid code according to recently published AVX_319433-007.pdf document 2010-07-22 15:12:08 +00:00
Stanislav Shwartsman
6e1204cb84 Merged X2APIC + X2APIC virtualization 2010-04-08 15:50:39 +00:00
Stanislav Shwartsman
69517f9143 Fix PEXTRB/PEXTRW/PEXTRD/EXTRACTPS 2010-04-02 19:01:17 +00:00
Stanislav Shwartsman
2efb11f2bc fixes 2010-03-30 18:12:19 +00:00
Stanislav Shwartsman
cceb0a5a17 invept/invvpid disasm 2010-03-26 10:39:40 +00:00
Stanislav Shwartsman
9147ac4b63 MOVMSKPD/PS fix 2010-03-19 14:43:13 +00:00
Stanislav Shwartsman
0ead9fe8ae new opcode grp 2010-03-07 08:08:40 +00:00
Stanislav Shwartsman
70dc124b3a 1st step of moving CPU options to runtime 2010-02-24 19:27:51 +00:00
Stanislav Shwartsman
26c7abf988 decode tables opt 2010-02-01 07:59:22 +00:00
Stanislav Shwartsman
eae084920a optimized decode tables 2010-01-31 09:45:27 +00:00
Stanislav Shwartsman
fe687fd1a6 disasm displacements and offsets by default now printed as "relative" signed integers and not as unsigned offsets could toggle it back with disasm command. 
help disasm in debugger
 2009-12-28 13:52:40 +00:00
Stanislav Shwartsman
069ea6228e disasm displacements and offsets by default now printed as "relative" signed integers and not as unsigned offsets 
could toggle it back with disasm command.
help disasm in debugger
 2009-12-28 13:44:32 +00:00
Stanislav Shwartsman
db8ecc535e added mclmulqdq disasm 2009-12-17 09:13:35 +00:00
Stanislav Shwartsman
7254ea36a1 copyright fixes + small optimization 2009-10-14 20:45:29 +00:00
Stanislav Shwartsman
8a4ac11700 more verbose maskmov disasm 2009-08-21 13:45:38 +00:00
Stanislav Shwartsman
d9003c946c disasm fixes 2009-05-15 18:47:34 +00:00
Stanislav Shwartsman
db098a1205 Fix dependencies of CPU code from disasm library 
Regent Makefile.in for CPU
 2009-01-19 19:01:03 +00:00
Stanislav Shwartsman
c09e2b6418 Fixes in disasm 2008-10-01 09:10:54 +00:00
Stanislav Shwartsman
87103c2437 Support for disasm of MOVBE Intel Atom(R) instruction 2008-08-11 17:55:57 +00:00
Stanislav Shwartsman
a85dfc7617 Added disasm for AES instructions 2008-05-25 15:42:26 +00:00
Stanislav Shwartsman
98f1930a80 Fixed compilation issue (patch by Eugene Toder) 2008-04-27 19:47:12 +00:00
Stanislav Shwartsman
671cd93966 Add CPU flags for future use 2008-04-04 12:23:45 +00:00
Stanislav Shwartsman
8615022962 Added first stubs for XSAVE/XRESTOR implementation 
Disassemble XSAVE/XRSTOR instructions (4 instructions)
Update CHANGES - a bit speculatively
 2008-02-12 22:41:39 +00:00
Stanislav Shwartsman
eebd96e2d7 another whitespace cleanup by Sebastien 2008-02-05 22:33:35 +00:00
Stanislav Shwartsman
dfb3685c46 Fixed memory bug in disasm code 2007-11-18 21:29:17 +00:00
Stanislav Shwartsman
c0d5b9040c Prepare for 4-arg instructions (will be needed for AMD SSE5) 2007-10-09 20:24:42 +00:00
Stanislav Shwartsman
0dc4badfbb Added SSE4A and SSE4_2 to disassembler 
Implemented POPCNT instruction
 2007-09-19 19:38:10 +00:00
Stanislav Shwartsman
016660698e just code cleanup, preparation for future 2007-08-31 18:09:34 +00:00
Stanislav Shwartsman
b64fc08c54 implement prefetch hint opcodes 2007-08-23 16:47:51 +00:00
Stanislav Shwartsman
5189cfbf10 SSE4 support 2007-04-19 16:12:21 +00:00
Stanislav Shwartsman
2d47748f52 Added instruction set field for opcodes table + few bugfixes 2007-04-02 10:47:48 +00:00
Stanislav Shwartsman
4f166369a6 Fixes for VMX disasm 2007-03-23 22:07:49 +00:00
Stanislav Shwartsman
dd00bc66d0 Fixed disasm in 64bit mode, added new accessor for printing 64bit values 2007-01-13 10:43:31 +00:00
Stanislav Shwartsman
f8c3968d42 Changes list made after CVS service crash: 
- Fixed critical bug in CPU code added with one of the prev commits
  - Disasm support for SSE4
  - Rename PNI->SSE3 everywhere in the code
  - Correctly decode, disassemble and execute 'XCHG R8, rAX' x86-64 instruction
  - Correctly decode, disassemble and execute multi-byte NOP 0F F1 opcode
  - Fixed ENTER and LEAVE instructions in x86-64 mode
  - Added ability to turn ON instruction trace, only GUI support is missed.
    Instruction trace could be enabled if Bochs was compiled with disasm
  - More changes Bit32u -> bx_phy_address
  - Complete preliminary implementation of SMM in Bochs, SMI is still PANICs but if you press 'continue' everything should work OK
  - Small code cleanup
  - Update CHANGES and user docs
 2006-04-05 17:31:35 +00:00
Stanislav Shwartsman
bc4ca51055 Fixed disasm of 'enter' instruction in AT&T mode 2006-03-23 17:43:39 +00:00
Stanislav Shwartsman
2dc81b172a Fixed several disasm bugs 2006-02-17 13:33:05 +00:00
Stanislav Shwartsman
5a65e1065e Decoding functionality for Bochs disassembler. 
Fixed 'step over' debugger command using bx_dbg_read_linear method.
Small debugger fix in cpu.cc
 2006-02-05 19:48:29 +00:00
Stanislav Shwartsman
24d4de03a1 - Fixed bug with missed ES segment override prefix 
- Correctly disassemble x86-64 opcodes

	Ia_cvttsd2si_Gq_Wsd
	Ia_cvttss2si_Gq_Wss
	Ia_cvtsd2si_Gq_Wsd
	Ia_cvtss2si_Gq_Wss
	Ia_movq_Pq_Eq
	Ia_movq_Vdq_Eq
	Ia_movq_Eq_Pq
	Ia_movq_Eq_Vq

- Correctly disassemble Intel SSE3 opcodes (not supported by Bochs)
	Ia_monitor
	Ia_mwait
 2006-01-31 17:42:31 +00:00
Stanislav Shwartsman
cb58d08c11 Fix MSVC warning 2006-01-28 14:48:40 +00:00
Stanislav Shwartsman
557c15699f New function - toggle syntax mode 2006-01-24 21:34:39 +00:00
Stanislav Shwartsman
276c006129 Merge new disasm module with x96-64 support 2005-12-23 14:15:13 +00:00
Stanislav Shwartsman
7b7ac565f9 Getting ready for long mode disasm support, patch will posted soon 2005-11-14 18:09:22 +00:00
Stanislav Shwartsman
5af5d80602 Small disasm fixes 2005-10-23 20:43:32 +00:00
Stanislav Shwartsman
7f26baeb94 small optimization in disasm code 2004-12-15 17:15:43 +00:00
Stanislav Shwartsman
757188d93b Fix disasm error caused by last commit 2004-12-13 22:04:31 +00:00
Stanislav Shwartsman
f375203fdb preparations for x86-64 support in disasm 2004-12-12 22:12:43 +00:00
Stanislav Shwartsman
8ac3790ab3 Added experimental support of AT&T syntax to disasm 
Fixed operand for CMPXCHG8B instruction

Feature request to somebidy who understand Bochs debugger code
  - to add Bochs debugger command which will switch between
    Intel and AT&T style for disassembler.
 2004-12-10 14:04:57 +00:00
Stanislav Shwartsman
a0efe5e577 small cleanup disasm code 
implement branch taken/not taken indication for conditional Jcc insructions
 2004-12-09 23:19:48 +00:00
Stanislav Shwartsman
139baaebf5 Fix OP_X and OP_Y methods for disasm 2004-12-09 20:01:00 +00:00
Stanislav Shwartsman
9d1b401512 Fixed several disassembler bugs 
Prepared for AT&T style support in Bochs disassembler
 - it already supports all AT&T style except opcode name suffixes
 - AT&T support in future will be possible to enable from bx_debugger
 2004-12-08 18:54:15 +00:00