Stanislav Shwartsman
0f39ce58be
fixed compilation warnings and errors with MSVCPP
2014-07-09 16:08:16 +00:00
Stanislav Shwartsman
8fbf673295
fixed compilation errors with FPU off
2014-04-29 18:49:38 +00:00
Stanislav Shwartsman
5ab2bb363c
fix of compilation err
2014-02-17 16:19:43 +00:00
Stanislav Shwartsman
d257bf3e7d
cover some more opcodes with compressed displ
2014-02-10 21:34:26 +00:00
Stanislav Shwartsman
9613e4b402
implementation of AVX-512 compressed displacement feature which is required for AVX-512 emu correctness (first step). todo: fix rest of EVEX opcodes
2014-02-10 21:12:08 +00:00
Stanislav Shwartsman
3798ed66b5
new function for disasm. todo: support it independently of CPU
2014-01-26 20:01:50 +00:00
Stanislav Shwartsman
d20c81417c
Implemented VSHUFF32x4/64x2, VSHUFI32x4/64x2 AVX512 instructions
...
Implemented AVX512 blend instructions
Do not allow setting of EVEX.b in reg form when no floating point exceptions could be generated by instruction
2013-12-09 19:09:37 +00:00
Stanislav Shwartsman
8836d1aa2d
added mask destination to disasm
2013-12-08 17:01:30 +00:00
Stanislav Shwartsman
6d9b16e0f7
Implemented VCMPPS/PD/SS/SD AVX512 instructions
...
Implemented AVX512 shift/rotate instructions
2013-12-03 15:44:23 +00:00
Stanislav Shwartsman
a85a9081b7
use shorter opcode names in the debug prints (skip the BX_IA_ prefix)
2013-12-02 20:06:59 +00:00
Stanislav Shwartsman
b820b7af57
fixed zmm reg name in disasm
2013-11-29 20:52:34 +00:00
Stanislav Shwartsman
61deec2689
fixed zmm reg name in disasm
2013-11-29 20:48:31 +00:00
Stanislav Shwartsman
1a735e9fdf
bugfix for decoding segment prefix with EVEX
2013-11-28 21:28:50 +00:00
Stanislav Shwartsman
3be7e5884b
added lock prefix used info into bx_Instriction_c and use it in disasm
2013-11-08 21:43:21 +00:00
Stanislav Shwartsman
940c2a1c8e
fixes for disasm
2013-10-15 17:19:18 +00:00
Stanislav Shwartsman
0b2e533a55
more avx512 instructions done
2013-10-09 19:45:36 +00:00
Stanislav Shwartsman
09254eb474
avx512 implementation fixes and next steps
2013-10-08 18:31:18 +00:00
Stanislav Shwartsman
8446685ba2
fixed FPU and MMX disasm
2013-10-07 20:55:43 +00:00
Stanislav Shwartsman
059769e2a6
disasm bug fixes
2013-10-06 20:42:13 +00:00
Stanislav Shwartsman
f0b917ca15
disasm fixes
2013-10-06 19:27:40 +00:00
Stanislav Shwartsman
e55611df21
disasm fixes
2013-10-06 19:04:52 +00:00
Stanislav Shwartsman
add8eea761
disasm bug fixes
2013-10-06 18:37:56 +00:00
Stanislav Shwartsman
f1f35a236c
disasm: Id form in 32-bit should be sign-extended to 64-bit
2013-10-06 18:10:58 +00:00
Stanislav Shwartsman
fd370a4d41
fixes in disasm, added example of using bxInstruction_c disasm into dbg_main.cc (commented out for now)
2013-10-05 19:32:09 +00:00
Stanislav Shwartsman
b1d703e47c
fixed compilation with x86-64 off
2013-10-05 18:51:28 +00:00
Stanislav Shwartsman
67bce7af97
fixed memref disasm
2013-10-05 11:00:31 +00:00
Stanislav Shwartsman
d4bfbffdbb
disasm fixes
2013-10-05 08:34:09 +00:00
Stanislav Shwartsman
c9a1f259cb
fixed compilation error in new disasm module under SMP config
2013-10-04 18:14:54 +00:00
Stanislav Shwartsman
ba1249ed15
disasm fixes
2013-10-04 17:26:56 +00:00
Stanislav Shwartsman
85b0402668
fixes for disasm
2013-10-02 19:23:34 +00:00
Stanislav Shwartsman
8c60799e72
fix for new disasm interface
2013-10-01 20:17:21 +00:00
Stanislav Shwartsman
e592f81209
updates to internal disasm
2013-10-01 18:47:55 +00:00
Stanislav Shwartsman
147d788022
few fixes in new disasm module
2013-09-30 20:16:52 +00:00
Stanislav Shwartsman
fd383435f0
- Initial code for bx_Instruction_c disassembler which (together with Bochs decoder) will replace Bochs disasm module someday (very soon).
...
The code already knows to disasm most of the opcodes with their operands.
- Split according to OSIZE opcodes RDFSBASE/WRFSBASE / RDGSBASE/WRGSBASE both for disasm and performance
- Minimize amount of opcode forms in ia_opcodes.h again.
For example Udq means the same as Wdq but with no memory form.
2013-09-30 19:01:42 +00:00
