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68 Commits

Author SHA1 Message Date
Stanislav Shwartsman
5439647254 small change to extract ia_opcodes.h from instr.h to dedicated file. this would remove compilation dep of all files on ia_opcodes.h (now called ia_opcdes.def). regenerating dep ober all files in Makefiles.in 2017-10-19 21:27:25 +00:00
Stanislav Shwartsman
ac442009aa lazy flags code small refactoring 2017-10-15 22:01:32 +00:00
Stanislav Shwartsman
a51eb1cc39 added more debug info for TLB through param tree, update year in the (c) 2017-03-31 07:34:08 +00:00
Stanislav Shwartsman
a6e7ffb284 implemented undefined flags behavior for SHRD instruction matching HW 2017-03-30 22:03:38 +00:00
Stanislav Shwartsman
097310cd00 fixed integer overflow while computing shift flags, avoid using bx_bool while working with flags for more robust code 2017-03-30 21:53:39 +00:00
Stanislav Shwartsman
b468316250 re-style old resolve macros after resolve function inlining 2015-05-16 21:06:59 +00:00
Stanislav Shwartsman
9f18573740 Rename BX_CPU_CALL_METHODR to BX_CPU_RESOLVE_ADDR and introduce special cases BX_CPU_RESOLVE_ADDR_64 (for 64-bit mode only) and BX_CPU_RESOLVE_ADDR_32 (for 32-bit mode only) 2015-05-11 19:23:09 +00:00
Stanislav Shwartsman
5e6955c5e7 Major rewrite of memory access methods to avoid massive code duplication and enable inlining of memory access methods 2015-01-25 20:55:10 +00:00
Stanislav Shwartsman
0386f49e03 fixed comments for SHLD/SHRD instructrions and make code a little more clear 2012-09-09 17:44:42 +00:00
Stanislav Shwartsman
cc694377b9 Standartization of Bochs instruction handlers. 
Bochs instruction emulation handlers won't refer to direct fields of instructions like MODRM.NNN or MODRM.RM anymore.
Use generic source/destination indications like SRC1, SRC2 and DST.
All handlers are modified to support new notation. In addition fetchDecode module was modified to assign sources to instructions properly.

Immediate benefits:
- Removal of several duplicated handlers (FMA3 duplicated with FMA4 is a trivial example)
- Simpler to understand fetch-decode code

Future benefits:
- Integration of disassembler into Bochs CPU module, ability to disasm bx_instruction_c instance (planned)

Huge patch. Almost all source files wre modified.
 2012-08-05 13:52:40 +00:00
Stanislav Shwartsman
f01e5f3e11 removed b1() from shift methods in CPU - lead to removal of b1() field from bxInstruction_c 2012-05-08 16:42:15 +00:00
Stanislav Shwartsman
002c86660a reword all the CPU code in preparation for future CPU speedup implementation. 
Bochs emulation can be another 10-15% faster using technique described in paper
"Fast Microcode Interpretation with Transactional Commit/Abort"
http://amas-bt.cs.virginia.edu/2011proceedings/amasbt2011-p3.pdf
 2011-07-06 20:01:18 +00:00
Stanislav Shwartsman
69b829a935 small fixes 2011-04-12 06:05:31 +00:00
Stanislav Shwartsman
7d80a6ebe0 Adding Id and Rev property to all files 2011-02-24 21:54:04 +00:00
Stanislav Shwartsman
3dfcfd0ccd Split shift opcodes | optimize SAR opcode 2010-05-18 07:28:05 +00:00
Stanislav Shwartsman
fd0f428263 optimization 2010-02-26 23:09:30 +00:00
Stanislav Shwartsman
bd60e0264c change Copyright to Bochs Project 2009-12-04 16:53:12 +00:00
Stanislav Shwartsman
2a8b7e04ba bugfix 2009-10-13 15:28:16 +00:00
Stanislav Shwartsman
cfa3611a5f bugfixes, comment fixes, compilation fix in VMX 2009-06-20 20:39:51 +00:00
Stanislav Shwartsman
61cb00c149 Fixed shift flags (thanks Darek for showing the bug) 2009-06-20 09:10:48 +00:00
Stanislav Shwartsman
9929e6ed78 - updated FSF address 2009-01-16 18:18:59 +00:00
Stanislav Shwartsman
5dd02b26e3 Make even more efficient RmAddr calculation - good optimizing compiler could make more efficient code than it was before 2008-08-08 09:22:49 +00:00
Stanislav Shwartsman
1bdddc1f78 Split SHRD/SHLD instructions 2008-04-05 19:08:01 +00:00
Stanislav Shwartsman
5826e2843a Inline pop/push functions 
Store only single byte of opcode in b1() - speedup shift instructions
Code cleanups
 2008-04-05 17:51:55 +00:00
Stanislav Shwartsman
167c7075fb Use fastcall gcc attribute for all cpu execution functions - this pure "compiler helper" optimization brings additional 2% speedup to Bochs code 2008-03-22 21:29:41 +00:00
Stanislav Shwartsman
a2897933a3 white space cleanup 2008-02-02 21:46:54 +00:00
Stanislav Shwartsman
37fbb82baa Cleanups. Move bxInstruction_c definition to separate file instr.h 2008-01-29 17:13:10 +00:00
Stanislav Shwartsman
d9984bb3a1 Eliminate BxResolve call from the heart of cpu loop and move into instructions that really require this calculation. Yes, it blows the code of EVERY CPU method but it has >15% speedup ! 2008-01-10 19:37:56 +00:00
Stanislav Shwartsman
eee1a9030d a bit simplify and optimize shift instructions 
print failed segment info in check_cs - more debug info
 2007-12-30 20:16:35 +00:00
Stanislav Shwartsman
5d4e32b8da Avoid pointer params for every read_virtual_* except 16-byte SSE and 10-byte x87 reads 2007-12-20 20:58:38 +00:00
Stanislav Shwartsman
6fcc7d34ab Next step in lazy flags optimization by Darek MihockA - 
get rid of shifts from lazy flags code
 2007-12-06 20:39:11 +00:00
Stanislav Shwartsman
d739cca282 small cleanup 2007-12-06 18:35:33 +00:00
Stanislav Shwartsman
d54d537f81 One more step for lazy flags optimization 2007-12-06 16:57:59 +00:00
Stanislav Shwartsman
506dc3d963 Optimize 64-bit fetchdecode prefix handling 
Deparecated set_FLAG() method, setB_FLAG() method was used everywhere
Rename setB_FLAG to set_FLAG, so set_FLAG() will must receive 0/1 inly
 2007-11-20 23:00:44 +00:00
Stanislav Shwartsman
5ec15df46d Split more opcodes EbIb opcodes 2007-11-17 18:08:46 +00:00
Stanislav Shwartsman
42fdd8a3a1 During Bochs benchmarking I figured out that hostasm actually slow down the emulation ... so remove this ugly code which also doesn't help :) 
speedup flags update for some instructions - idea was taken from DT patch by h.johansson
 2007-10-21 22:07:33 +00:00
Stanislav Shwartsman
5c3fba4399 Support access to SMRAM in memory object 
Cleanup in CPU code
 2006-03-26 18:58:01 +00:00
Stanislav Shwartsman
7b6c2587a9 Now devices could be compiled separatelly from CPU 
Averything that required cpu.h include now has it explicitly and there are a lot of files not dependant by CPU at all which will compile a lot faster now ...
 2006-03-06 22:03:16 +00:00
Stanislav Shwartsman
5a5854c684 Missed ; 2006-01-22 18:18:19 +00:00
Stanislav Shwartsman
de9be40256 Fixed ROL/ROR flags anomaly (h.johansson) 2006-01-22 18:17:27 +00:00
Stanislav Shwartsman
7c1374a2ec support lazy flags for SHRD instruction 2005-10-13 20:21:35 +00:00
Stanislav Shwartsman
7022be46f5 Fix undefined flags handling for ROR and RCR instructions 2005-10-13 19:28:10 +00:00
Stanislav Shwartsman
2bfc842c09 CPU fixes by Kevin Lawton 2005-02-16 21:27:21 +00:00
Stanislav Shwartsman
d142f23242 Fixed undocumented flags handling for SHLD instruction 
Added lazy flags for SHLD instruction
Bugfix and speedup in SHLD and SHRD instructions
 2004-12-24 22:44:13 +00:00
Stanislav Shwartsman
3916754e30 speedup and cleanup 2004-09-04 19:37:37 +00:00
Stanislav Shwartsman
8953bfaffb Fixed flags handling for SHLD and rotate instrructions 2004-08-27 20:13:32 +00:00
Stanislav Shwartsman
c2b7f183af more correct implementation 2004-08-15 20:31:27 +00:00
Stanislav Shwartsman
eefdcece6f Speed-up BTC instruction 
Speed-up SAR instruction with implementing lazy-flags for it
 2004-08-15 20:12:05 +00:00
Stanislav Shwartsman
a1f830d429 Implemented FAST lazy flags version for logic instructions. 
Small code cleanup/simplification for others.
 2004-08-13 20:00:03 +00:00
Stanislav Shwartsman
8f0cf91fff This commit is the first commit in long series of changes the have several purposes: 
1. Review and commit patch

	[ 896733 ] Lazy flags, for more instructions, only 1 src op

   May be partially, but I hope to get all ideas from patch in

2. Get Bochs speedup after lazy flags optimization

3. Most important for me: improve correctness of emulation by handling several
   undocumented EFLAGS modifications. And finally pass

	UFLAGS - Undefined Flags Test v 3.0
	Copyright (C) Potemkin's Hackers Group (PHG) 1989,1995

   The test still fails on > 50% of its checks.
 2004-08-09 21:28:47 +00:00