mirrors/Bochs
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity
6,867 Commits 11 Branches 185 Tags 48 MiB
c8f870c9ac
Commit Graph

230 Commits

Author SHA1 Message Date
Stanislav Shwartsman
d3528cccd6 Style fixes - name convention for push to new stack methods 2008-05-10 20:35:03 +00:00
Stanislav Shwartsman
ebc4bf0cff Check RIP for canonical boundaries in 64-bit mode 2008-05-10 15:02:42 +00:00
Stanislav Shwartsman
6ebae41ad7 print physcial address with special format - preparations for 64-bit physical address emu 2008-05-09 22:33:37 +00:00
Stanislav Shwartsman
06e3615239 Reduce trace cache memory footprint using naive memory pool trace allocation 2008-05-04 05:37:36 +00:00
Stanislav Shwartsman
f5780a5f5c Hide some BX_MEM_C variables 
Optimize resolve16 methods - by reducing their amount again - reduce chance for misspredictin
 2008-05-01 20:08:37 +00:00
Stanislav Shwartsman
67e534832b Remove from CPU reference to MEM object - it is only one and could be static 2008-04-27 19:49:02 +00:00
Stanislav Shwartsman
359eb92c73 More fixes for CPU emulation 2008-04-19 20:00:28 +00:00
Stanislav Shwartsman
4ee1bf4b68 Fixed paging permissions for code fetch 2008-04-18 13:51:09 +00:00
Stanislav Shwartsman
5993ca527c - fixed 286 tss handling (descriptor wasn't parsed correctly) 
- fixed timing of faulted instructions
- fixed PANIC message in interrupt through incorrect task gate
 2008-04-18 10:19:33 +00:00
Stanislav Shwartsman
892fa99c6f - prefetch hint should be NOP when use in register mode 
- #GP when trying to set reserved bits of CR4_HI in 64-bit mode
- #GP when trying to set reserved bits of EFER MSR
- clear upper part of RSI/RDI when executing rep instructions with 32-bit asize
  even if no repeat iterations were executed (because of RCX=0 for example)
- write SYSENTER_EIP_MSR and SYSENTER_ESP_MSR as 64-bit when x86_64 supported
- set MSR_FMASK reset value
- MSR_FMASK should be 32-bit only
- check for fetch permissions when doing ITLB lookup
- #GP when trying to write non-canonical address to MSR_CSTAR or MSR_LSTAR
- correct repeat instructions timing
- mark TSS busy in TR after it is loaded
 2008-04-16 16:44:06 +00:00
Stanislav Shwartsman
a851cfd8f0 Re-implemented modebp debugger function in simple and more clean way 2008-04-07 19:59:53 +00:00
Stanislav Shwartsman
44f04a93da Fixed compilation issue 2008-04-07 19:00:30 +00:00
Stanislav Shwartsman
fea49bb270 Fixed linear address wrap in legacy (not long64) mode 2008-04-07 18:39:17 +00:00
Stanislav Shwartsman
1b622661d7 Cleanup 2008-04-05 20:49:21 +00:00
Stanislav Shwartsman
90f1973bef Removed BX_USE_TLB - TLB is always used, only Guest2HostTLB is optional feature 
Use Guest2HostTLB in prefetch code for IFETCHES - speedup above 3%
 2008-04-05 20:41:00 +00:00
Stanislav Shwartsman
3f2487a0af Enabled tracing cross repeated instructions 2008-03-31 18:53:08 +00:00
Stanislav Shwartsman
231056fff4 small cleanups 2008-03-29 21:51:42 +00:00
Stanislav Shwartsman
08f958f458 Fixed pageWriteStampTable to handle BIOS code as well - increased the table to all 4G instead of allocated memory size 
Avoid checking of pageWriteStamp in the heart of cpu loop with trace cache - now decWriteStamp will post stopTraceExecution event if it hits code page
 2008-03-29 21:01:25 +00:00
Stanislav Shwartsman
167c7075fb Use fastcall gcc attribute for all cpu execution functions - this pure "compiler helper" optimization brings additional 2% speedup to Bochs code 2008-03-22 21:29:41 +00:00
Stanislav Shwartsman
64bfbb32b5 Inline icache lookup code - speedup of 3% according to my measurements 2008-03-06 20:22:24 +00:00
Stanislav Shwartsman
946b7a369d Added const to fetchPtr in cpu functions 2008-03-03 15:16:46 +00:00
Stanislav Shwartsman
2172e96654 small trace/iacache cleanups, always allow speculative tracing for trace cache 2008-03-03 14:35:36 +00:00
Stanislav Shwartsman
5e7218b8c3 Fixed problem introduced by prev checkin 
+
Fix beak to debugger when executing HLT instruction
 2008-02-29 05:39:40 +00:00
Stanislav Shwartsman
a459a64f3e whispace, tab2space, indent, dos2unix and other cleanups 2008-02-15 22:05:43 +00:00
Stanislav Shwartsman
a2897933a3 white space cleanup 2008-02-02 21:46:54 +00:00
Stanislav Shwartsman
8653095520 small optimization in cpu_loop with trace cache 2008-01-28 20:09:40 +00:00
Stanislav Shwartsman
9ec2c87aaa cleanups and optimizations 2008-01-22 16:20:30 +00:00
Stanislav Shwartsman
192f398b46 removed --enable-magic-breakpoint configure option - it is enabled by default if Bochs internal debugger compiled in. Also it always possible to switch magic break off by .bochsrc option 2008-01-21 21:36:58 +00:00
Stanislav Shwartsman
88a4776244 taking all CPU icache/trace cache related stuff into separate source file from cpu.cc 2008-01-17 21:15:23 +00:00
Stanislav Shwartsman
77b4b70b9b oops, revert incorrectly merged change 2008-01-10 20:32:23 +00:00
Stanislav Shwartsman
1f4608cd84 Fix for implemened 3dnow instuctions (most of them are not implemented) 2008-01-10 20:26:49 +00:00
Stanislav Shwartsman
d9984bb3a1 Eliminate BxResolve call from the heart of cpu loop and move into instructions that really require this calculation. Yes, it blows the code of EVERY CPU method but it has >15% speedup ! 2008-01-10 19:37:56 +00:00
Stanislav Shwartsman
e7a45770fd More optimization for short traces 2008-01-05 10:45:05 +00:00
Stanislav Shwartsman
a9e001bd30 Optimize short traces 2008-01-05 10:21:25 +00:00
Stanislav Shwartsman
d891f0d8ec Fixed more VC2008 warnings - hopefully last ones 2007-12-30 17:53:12 +00:00
Stanislav Shwartsman
fc159e3bcf small cleanup 2007-12-25 21:42:38 +00:00
Stanislav Shwartsman
838fb2a048 Fixing V2008 warnings - they found a bug in sse_pfp.cc ! 2007-12-23 17:21:28 +00:00
Stanislav Shwartsman
c3c9c40674 Move MaxFetch calculation into fetchdecode - simplify the logic 2007-12-22 17:17:40 +00:00
Stanislav Shwartsman
0e5859302b Avoid 64-bit calculations when checking remainingInPage bytes 2007-12-22 12:43:17 +00:00
Stanislav Shwartsman
46366b5064 Speedup simulation by eliminating CPL==3 check from read/write_virtual* functions 2007-12-16 21:03:46 +00:00
Stanislav Shwartsman
d9a59c7a1f Added ability to merge traces cross JCC branch instructions 
Makes traces longer -> emulation faster in average
 2007-12-14 20:41:09 +00:00
Stanislav Shwartsman
db69a25c36 Trace cache instrumentation methods 
Next step will be tracing cross non-taken branches
 2007-12-14 11:27:44 +00:00
Stanislav Shwartsman
adda3befd3 Trace cache optimization merged 2007-12-09 18:36:05 +00:00
Stanislav Shwartsman
29267577f0 Fixed HLT problem in SMP binary which runs with single processor only 2007-12-08 09:26:13 +00:00
Stanislav Shwartsman
88899cf617 Changes for lazy flags handling -> 1st stap in transition to new lazy flags handling by Darek Mihocka (www.emulators.com) 2007-12-04 19:27:23 +00:00
Stanislav Shwartsman
91e0db63c4 no need to invalidate prefetch queue for RDMSR/WRMSR 2007-12-03 21:43:14 +00:00
Stanislav Shwartsman
8cfd17202a some simple SSE code optimizations 2007-11-27 22:12:45 +00:00
Stanislav Shwartsman
e51184c8cf Eliminate saving of RSP from heart of cpu_loop 
Now save RSP only where it is really required
 2007-11-24 14:22:34 +00:00
Stanislav Shwartsman
83f6eb6945 Changes copyrights for the files I wrote :) 
Also split EqId G1 group for x86-64
 2007-11-17 23:28:33 +00:00
Stanislav Shwartsman
0fa82afe1f Bugfix and optimize BxResolve calls - bugfix in 64-bit mode 2007-11-13 17:30:54 +00:00