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74 Commits

Author SHA1 Message Date
Stanislav Shwartsman
cc694377b9 Standartization of Bochs instruction handlers. 
Bochs instruction emulation handlers won't refer to direct fields of instructions like MODRM.NNN or MODRM.RM anymore.
Use generic source/destination indications like SRC1, SRC2 and DST.
All handlers are modified to support new notation. In addition fetchDecode module was modified to assign sources to instructions properly.

Immediate benefits:
- Removal of several duplicated handlers (FMA3 duplicated with FMA4 is a trivial example)
- Simpler to understand fetch-decode code

Future benefits:
- Integration of disassembler into Bochs CPU module, ability to disasm bx_instruction_c instance (planned)

Huge patch. Almost all source files wre modified.
 2012-08-05 13:52:40 +00:00
Stanislav Shwartsman
e7ed8aca5c move inhibit interrrupts functionality to icount interface 2011-12-21 06:17:45 +00:00
Stanislav Shwartsman
002c86660a reword all the CPU code in preparation for future CPU speedup implementation. 
Bochs emulation can be another 10-15% faster using technique described in paper
"Fast Microcode Interpretation with Transactional Commit/Abort"
http://amas-bt.cs.virginia.edu/2011proceedings/amasbt2011-p3.pdf
 2011-07-06 20:01:18 +00:00
Stanislav Shwartsman
7d80a6ebe0 Adding Id and Rev property to all files 2011-02-24 21:54:04 +00:00
Stanislav Shwartsman
d60b7c0919 rename accessor for opcodeReg() in instruction 2010-12-06 21:45:56 +00:00
Stanislav Shwartsman
0478b326c3 remove ome ifdefs 2010-05-02 15:11:39 +00:00
Stanislav Shwartsman
cffe32dd2c remove unused param from exception() call 2010-03-14 15:51:27 +00:00
Stanislav Shwartsman
927c3594d6 enable compilation with CPU_LEVEL <= 6 
converted SEP to runtime option as well
 2010-02-26 11:44:50 +00:00
Stanislav Shwartsman
bd60e0264c change Copyright to Bochs Project 2009-12-04 16:53:12 +00:00
Stanislav Shwartsman
efc413d2b4 VMX fixes 2009-05-21 10:39:40 +00:00
Stanislav Shwartsman
9929e6ed78 - updated FSF address 2009-01-16 18:18:59 +00:00
Stanislav Shwartsman
a95c24b019 Some functions could be called only from 32 bit 2008-09-06 21:18:08 +00:00
Stanislav Shwartsman
0d90ab0478 Completely new way to handle LD+OP cases - allows to significantly reduce number of BX_CPU_C methods 2008-08-09 21:05:07 +00:00
Stanislav Shwartsman
5dd02b26e3 Make even more efficient RmAddr calculation - good optimizing compiler could make more efficient code than it was before 2008-08-08 09:22:49 +00:00
Stanislav Shwartsman
709d74728d Call #UD exception directly instead of UndefinedOpcode function - for future use 2008-07-13 15:35:10 +00:00
Stanislav Shwartsman
3f5efb6475 Remove more duplicated methods 2008-07-13 10:06:07 +00:00
Stanislav Shwartsman
167c7075fb Use fastcall gcc attribute for all cpu execution functions - this pure "compiler helper" optimization brings additional 2% speedup to Bochs code 2008-03-22 21:29:41 +00:00
Stanislav Shwartsman
eebd96e2d7 another whitespace cleanup by Sebastien 2008-02-05 22:33:35 +00:00
Stanislav Shwartsman
37fbb82baa Cleanups. Move bxInstruction_c definition to separate file instr.h 2008-01-29 17:13:10 +00:00
Stanislav Shwartsman
7b80c5f481 I merged and succeded to remove some similar execution functions - less code, less chance for branch misprediction 2008-01-25 19:34:30 +00:00
Stanislav Shwartsman
192f398b46 removed --enable-magic-breakpoint configure option - it is enabled by default if Bochs internal debugger compiled in. Also it always possible to switch magic break off by .bochsrc option 2008-01-21 21:36:58 +00:00
Stanislav Shwartsman
d9984bb3a1 Eliminate BxResolve call from the heart of cpu loop and move into instructions that really require this calculation. Yes, it blows the code of EVERY CPU method but it has >15% speedup ! 2008-01-10 19:37:56 +00:00
Stanislav Shwartsman
e9a148f9c4 lmost last instruction split -> CMOV in 16/32 bit modes 2007-12-21 18:24:19 +00:00
Stanislav Shwartsman
d830c301cf Fixed 64-bit versions of LOOP instructions, some cleanups 2007-12-21 17:30:49 +00:00
Stanislav Shwartsman
5d4e32b8da Avoid pointer params for every read_virtual_* except 16-byte SSE and 10-byte x87 reads 2007-12-20 20:58:38 +00:00
Stanislav Shwartsman
b516589e4e Changes in write_virtual_* and pop_* functions -> avoid moving parameteres by pointer 2007-12-20 18:29:42 +00:00
Stanislav Shwartsman
7ca78b88e9 configure/compile changes + small optimizations 2007-12-01 16:45:17 +00:00
Stanislav Shwartsman
0a1063ad77 Split GvEv opcode groups 2007-11-21 22:36:02 +00:00
Stanislav Shwartsman
cdc9a09090 Split more opcodes 2007-11-18 18:24:46 +00:00
Stanislav Shwartsman
613bad34ee split MOVZX/MOVSX opcodes 2007-11-17 18:29:00 +00:00
Stanislav Shwartsman
5ec15df46d Split more opcodes EbIb opcodes 2007-11-17 18:08:46 +00:00
Stanislav Shwartsman
d9e58bd598 split11b on opcode tables level - split almost eevery splittable instruction 
will be continued
 2007-11-17 12:44:10 +00:00
Stanislav Shwartsman
351244d1ea Rename splitmod11b methods 2007-11-16 08:30:22 +00:00
Stanislav Shwartsman
0dc4badfbb Added SSE4A and SSE4_2 to disassembler 
Implemented POPCNT instruction
 2007-09-19 19:38:10 +00:00
Stanislav Shwartsman
9db896d100 minor x86_64 fixes and cleanups 2007-01-12 22:47:21 +00:00
Stanislav Shwartsman
fe644dfcbf - Code cleanup, remove x86-64 code from functions which cannot be called from x86-64 
- Fix PANIC multiple SSE prefix decoding (fetchdecode and disasm)
- More Bit32u -> bx_phy_address convert
- Lazy flags optimization
 2006-05-12 17:04:19 +00:00
Stanislav Shwartsman
5c3fba4399 Support access to SMRAM in memory object 
Cleanup in CPU code
 2006-03-26 18:58:01 +00:00
Stanislav Shwartsman
7b6c2587a9 Now devices could be compiled separatelly from CPU 
Averything that required cpu.h include now has it explicitly and there are a lot of files not dependant by CPU at all which will compile a lot faster now ...
 2006-03-06 22:03:16 +00:00
Stanislav Shwartsman
fc0894bbe1 Enable A20 after system reset 2006-03-04 16:58:10 +00:00
Stanislav Shwartsman
d1c722211e Fix duplicate opcodes, fix opcode names and disasm bugs 2005-09-23 16:45:41 +00:00
Stanislav Shwartsman
ce8f1ade07 Some not really significant speedups 2005-06-21 17:01:21 +00:00
Stanislav Shwartsman
c026a90779 Unify coding style in CPU methods 
NO AFFECT ON EMULATION RESULTS
 2005-05-20 20:06:50 +00:00
Stanislav Shwartsman
5213e903bd mov duplicate opcode groups from fectchdecode*.cc to .h 
use common register accessor macroses instead of direct register file structure access
 2004-11-26 20:21:28 +00:00
Stanislav Shwartsman
a1f830d429 Implemented FAST lazy flags version for logic instructions. 
Small code cleanup/simplification for others.
 2004-08-13 20:00:03 +00:00
Stanislav Shwartsman
5c5b556f24 Merge softfloat-fpu-implementation_ver4_branch branch 2004-06-18 14:11:11 +00:00
Stanislav Shwartsman
3274e0dd12 Commit patch 
[ 950905 ] Do not PANIC on rare, bad input from user-mode
by h.johansson
with little changes and fixes
 2004-05-10 21:05:51 +00:00
Stanislav Shwartsman
3f7c794b26 commit patch 
899972 data xfer performance patch V 2.0.4   2004-02-18 15:38 nobody psychosmur
 2004-02-26 19:17:40 +00:00
Michael Brown
d1922bc835 Changed #ifdef MAGIC_BREAKPOINT to #if BX_MAGIC_BREAKPOINT and added a 
configure script option --enable-magic-breakpoints (enabled by default).

Documented the instruction required to trigger the magic breakpoint
(xchgw %bx,%bx).
 2004-01-29 17:49:03 +00:00
Stanislav Shwartsman
cdb68ff8c8 Reverting back the changes in data_xfer16.cc 
Add/Fix bx_info messages in proc_ctrl.cc
 2003-11-13 21:57:13 +00:00
Stanislav Shwartsman
d51aece0c1 Change BX_PANIC messages to BX_INFO when behaviour is accepted with Intel/AMD docs. 
Instructions MOV_CxRx and MOV_RxCx are not supported in v8086 mode according to Intel manuals.
Also these instructions are treated as register-to-register regardless to MODRM byte fields (according to AMD manuals)
Also commit fix for MOV_EwSw by Kevin
 2003-11-13 21:17:31 +00:00