Stanislav Shwartsman
7af5dccdcf
fixed compilation issue
2011-08-11 19:45:21 +00:00
Stanislav Shwartsman
f15bc6cf75
support for NX outside of x86-64.
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required for Intel Yonah processor which is another interesting CPUID to be added
also found Via C7 CPUID, looking for the way to add it too
2011-08-10 22:04:33 +00:00
Stanislav Shwartsman
1b27438146
cleanups + small code reorg
2011-08-10 20:31:29 +00:00
Stanislav Shwartsman
2ee0029749
extract ffxsr support to separate CPU feature
2011-08-04 19:02:49 +00:00
Stanislav Shwartsman
1d89709e62
Added another CPU to CPUDB: p4_willamette (one more without x86-64 support).
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Reimplemented CPUDB using pure C macros magic.
Fixed compilation errors when compiling with SMP on.
2011-07-31 18:43:46 +00:00
Stanislav Shwartsman
6e6db04b8f
Fixed compilation errors, dos2unix, added missed p3_katmai.txt
2011-07-31 14:56:45 +00:00
Stanislav Shwartsman
5e291e0860
Added Athlon64 Clawhammer CPUID to CPUDB
2011-07-30 21:28:16 +00:00
Stanislav Shwartsman
fefa4d5e5b
added PIII Katmai to CPUDB
2011-07-30 14:30:35 +00:00
Stanislav Shwartsman
4ac67ec386
compilation when cu_level < 4
2011-07-29 15:24:32 +00:00
Stanislav Shwartsman
1a051f9f00
Added several predefined CPUs that can be selected from .bochsrc using new CPU::MODEL option.
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Selecting CPU MODEL from .bochsrc automatically chooses real HW CPUID and also configures Bochs emulator to emulate this specific CPU including all its features only.
Supported CPUs to choose from:
core2_extreme_x9770
corei7_sandy_bridge_2600K
p4_prescott_celeron_336
2011-07-29 15:03:54 +00:00
Stanislav Shwartsman
78327d3e5e
First step toward completely configurable CPU.
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Change CPUID to generic interface which could be chosen from .bochsrc.
Bochs CPU emulation will enable/disable features (like instruction sets) according to CPUID that is selected.
TODO: Add database of CPUID from real hardware CPUs
2011-07-28 16:17:42 +00:00
Stanislav Shwartsman
81f6a283e2
trim cpuid info from save/restore tree
2011-07-27 14:16:51 +00:00
Stanislav Shwartsman
cddd1e3758
MONITOR/MWAIT: Do monitor on cache line granularity only + bugfix with possible TLB caching of monitored line
2011-07-18 21:44:22 +00:00
Stanislav Shwartsman
002c86660a
reword all the CPU code in preparation for future CPU speedup implementation.
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Bochs emulation can be another 10-15% faster using technique described in paper
"Fast Microcode Interpretation with Transactional Commit/Abort"
http://amas-bt.cs.virginia.edu/2011proceedings/amasbt2011-p3.pdf
2011-07-06 20:01:18 +00:00
Stanislav Shwartsman
909e750549
Implemented VMX preemption timer VMEXIT control (patch by Jianan Hao)
2011-07-03 15:59:48 +00:00
Stanislav Shwartsman
beafa7c88b
improved x86 hw code bp handling
2011-06-24 13:38:34 +00:00
Stanislav Shwartsman
024a1ace38
move X2APIC to be .bochsrc option, rework of the cpuid code
2011-04-21 13:27:42 +00:00
Stanislav Shwartsman
7ced718040
implemented AVX instructions support
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many changes - some cleanup will follow
please report ay found bugs !
2011-03-19 20:09:34 +00:00
Stanislav Shwartsman
63fe52f601
accessors for DR6 and DR7 fields
2011-03-15 20:20:15 +00:00
Stanislav Shwartsman
aff763349d
Fixed save/restore of segments in real mode (valid bit was corrupted)
2011-03-12 09:56:43 +00:00
Stanislav Shwartsman
93e152ef1a
no need to read ignore_bad_msrs on every reset
2011-03-05 18:54:23 +00:00
Stanislav Shwartsman
3b8903e19d
there is no need to duplicate ignore_bad_msrs in param tree, this knob is loaded from options anyway
2011-03-05 18:47:48 +00:00
Stanislav Shwartsman
2d1d41e731
CPUID is not available when cpu-level=3
2011-02-25 16:27:01 +00:00
Stanislav Shwartsman
7d80a6ebe0
Adding Id and Rev property to all files
2011-02-24 21:54:04 +00:00
Stanislav Shwartsman
43600f3756
complete rework of SSE code
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next step - split all SSE opcodes by ModC0
2010-12-22 21:16:02 +00:00
Stanislav Shwartsman
c7017b1c05
simplification
2010-12-19 21:41:15 +00:00
Stanislav Shwartsman
4a85a8680e
SSE optimization
2010-12-19 07:06:40 +00:00
Stanislav Shwartsman
1047acb2cc
rename SSE register param - prepare for wide SSE register (AVX)
2010-12-06 21:52:41 +00:00
Stanislav Shwartsman
eaa2e0e0ea
[PATCH] cpu/init.cc: proper CPL restore in after_restore_statE
2010-06-04 20:31:04 +00:00
Stanislav Shwartsman
b2dffd9258
undo incorrect change for ia32_feature_control msr init
2010-05-23 05:32:00 +00:00
Stanislav Shwartsman
b6c26d394c
enable VMX lock bit - required for VMXON
2010-05-22 10:21:31 +00:00
Stanislav Shwartsman
0478b326c3
remove ome ifdefs
2010-05-02 15:11:39 +00:00
Stanislav Shwartsman
b9be4fcd3e
fix
2010-04-19 11:09:35 +00:00
Stanislav Shwartsman
b85791686b
fixed mtrr_deftype reset value
2010-04-10 07:32:48 +00:00
Stanislav Shwartsman
04349e1041
compilation fix for CPU < 6
2010-04-09 07:15:54 +00:00
Stanislav Shwartsman
6e1204cb84
Merged X2APIC + X2APIC virtualization
2010-04-08 15:50:39 +00:00
Stanislav Shwartsman
10505dca81
PDPTR checks fix
2010-04-06 19:26:03 +00:00
Stanislav Shwartsman
21de4f8b8b
remove cr3_masked
2010-04-04 09:04:12 +00:00
Stanislav Shwartsman
d39d485ece
changes variable name to better one
2010-04-03 05:59:07 +00:00
Stanislav Shwartsman
a220edc5bb
compile fixes
2010-03-26 11:09:12 +00:00
Stanislav Shwartsman
64e9ff6aff
add PDPTRS into param tree
2010-03-25 22:04:31 +00:00
Stanislav Shwartsman
f5ce2a7639
split crreg access functions to separate file
2010-03-25 21:33:07 +00:00
Stanislav Shwartsman
79466dffe2
apic virtualization + vmx fixes
2010-03-16 14:51:20 +00:00
Stanislav Shwartsman
5d2c2879a7
IA32_FEATURE_CONTROL_MSR is implemented
2010-03-06 16:59:05 +00:00
Stanislav Shwartsman
189553d702
bugfix
2010-03-05 08:54:07 +00:00
Stanislav Shwartsman
01cfbdccbc
Move MMX to be runtime option
2010-03-01 18:53:53 +00:00
Stanislav Shwartsman
5b6a14656d
Make XSAVE as runtime option
2010-02-26 22:53:43 +00:00
Stanislav Shwartsman
5df864b1f1
Move param_names.h into bochs root folder
2010-02-26 14:18:19 +00:00
Stanislav Shwartsman
927c3594d6
enable compilation with CPU_LEVEL <= 6
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converted SEP to runtime option as well
2010-02-26 11:44:50 +00:00
Stanislav Shwartsman
78a420faa1
first updates
2010-02-25 22:34:56 +00:00
