mirrors/Bochs
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

compile fixes

Browse Source
This commit is contained in:
Stanislav Shwartsman 2010-03-26 11:09:12 +00:00
parent cceb0a5a17
commit a220edc5bb
4 changed files with 15 additions and 16 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

14
bochs/cpu/crregs.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: crregs.cc,v 1.1 2010-03-25 21:33:07 sshwarts Exp $
// $Id: crregs.cc,v 1.2 2010-03-26 11:09:12 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (c) 2010 Stanislav Shwartsman
@ -517,8 +517,6 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_RdCd(bxInstruction_c *i)
#if BX_SUPPORT_X86_64
void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_CqRq(bxInstruction_c *i)
{
BX_ASSERT(protected_mode());
/* NOTES:
* 64bit operands always used
* r/m field specifies general register
@ -607,8 +605,6 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_RqCq(bxInstruction_c *i)
// mov control register data to register
Bit64u val_64 = 0;
BX_ASSERT(protected_mode());
/* NOTES:
* 64bit operands always used
* r/m field specifies general register
@ -893,7 +889,7 @@ bx_bool BX_CPP_AttrRegparmN(1) BX_CPU_C::SetCR0(bx_address val)
}
#if BX_CPU_LEVEL >= 4
bx_address get_cr4_allow_mask(void)
bx_address get_cr4_allow_mask(Bit32u cpuid_features_bitmask)
{
bx_address allowMask = 0;
@ -945,7 +941,7 @@ bx_address get_cr4_allow_mask(void)
allowMask |= (1<<9); /* OSFXSR */
/* OSXMMECPT */
if (BX_CPU_SUPPORT_FEATURE(BX_CPU_SSE))
if (cpuid_features_bitmask & BX_CPU_SSE)
allowMask |= (1<<10);
#endif
@ -959,7 +955,7 @@ bx_address get_cr4_allow_mask(void)
#if BX_CPU_LEVEL >= 6
/* OSXSAVE */
if (BX_CPU_SUPPORT_FEATURE(BX_CPU_XSAVE))
if (cpuid_features_bitmask & BX_CPU_XSAVE)
allowMask |= (1<<18);
#endif
@ -969,7 +965,7 @@ bx_address get_cr4_allow_mask(void)
bx_bool BX_CPP_AttrRegparmN(1) BX_CPU_C::check_CR4(bx_address cr4_val)
{
bx_cr4_t temp_cr4;
bx_address cr4_allow_mask = get_cr4_allow_mask();
bx_address cr4_allow_mask = get_cr4_allow_mask(BX_CPU_THIS_PTR cpuid_features_bitmask);
temp_cr4.val32 = (Bit32u) cr4_val;
#if BX_SUPPORT_X86_64

7
bochs/cpu/crregs.h
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: crregs.h,v 1.23 2010-03-25 21:33:07 sshwarts Exp $
// $Id: crregs.h,v 1.24 2010-03-26 11:09:12 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (c) 2007-2009 Stanislav Shwartsman
@ -101,9 +101,10 @@ struct bx_cr4_t {
BX_CPP_INLINE Bit32u get32() { return val32; }
BX_CPP_INLINE void set32(Bit32u val) { val32 = val; }
};
#endif // #if BX_CPU_LEVEL >= 4
extern bx_address get_cr4_allow_mask(void);
extern bx_address get_cr4_allow_mask(Bit32u);
#endif // #if BX_CPU_LEVEL >= 4
#if BX_SUPPORT_X86_64

4
bochs/cpu/init.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: init.cc,v 1.234 2010-03-25 22:04:31 sshwarts Exp $
// $Id: init.cc,v 1.235 2010-03-26 11:09:12 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001-2009 The Bochs Project
@ -1192,9 +1192,11 @@ void BX_CPU_C::assert_checks(void)
if (! check_CR0(BX_CPU_THIS_PTR cr0.val32))
BX_PANIC(("assert_checks: CR0 consistency checks failed !"));
#if BX_CPU_LEVEL > 3
// check CR4 consistency
if (! check_CR4(BX_CPU_THIS_PTR cr4.val32))
BX_PANIC(("assert_checks: CR4 consistency checks failed !"));
#endif
#if BX_SUPPORT_X86_64
// VM should be OFF in long mode

6
bochs/cpu/vmx.h
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: vmx.h,v 1.15 2010-03-16 14:51:20 sshwarts Exp $
// $Id: vmx.h,v 1.16 2010-03-26 11:09:12 sshwarts Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (c) 2009 Stanislav Shwartsman
@ -881,8 +881,8 @@ enum VMX_Activity_State {
((((Bit64u) VMX_MSR_CR4_FIXED0_HI) << 32) | VMX_MSR_CR4_FIXED0_LO)
// allowed 1-setting in CR0 in VMX mode
#define VMX_MSR_CR4_FIXED1_LO GET32L(get_cr4_allow_mask())
#define VMX_MSR_CR4_FIXED1_HI GET32H(get_cr4_allow_mask())
#define VMX_MSR_CR4_FIXED1_LO GET32L(get_cr4_allow_mask(BX_CPU_THIS_PTR cpuid_features_bitmask))
#define VMX_MSR_CR4_FIXED1_HI GET32H(get_cr4_allow_mask(BX_CPU_THIS_PTR cpuid_features_bitmask))
#define VMX_MSR_CR4_FIXED1 \
((((Bit64u) VMX_MSR_CR4_FIXED1_HI) << 32) | VMX_MSR_CR4_FIXED1_LO)