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65275ffc02
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246 Commits

Author SHA1 Message Date
Stanislav Shwartsman
65275ffc02 Remove repeat speedups from 16-bit address size methods - they not gonna speed up anyway because of segment limit issue 2008-06-25 10:34:21 +00:00
Stanislav Shwartsman
c1f308d80d Push error code if segment violation occurs when pushing arguments into a new stack 2008-06-25 02:28:31 +00:00
Stanislav Shwartsman
b65816a92d Fixed problem in my morning checkin + some more changes 2008-06-23 15:58:22 +00:00
Stanislav Shwartsman
a6fda9a971 Instrumentation code updated, some PANIC messages fixed 2008-06-23 02:56:31 +00:00
Stanislav Shwartsman
fc6671a67b Commented out assertion which doesn't work 2008-06-16 04:49:19 +00:00
Stanislav Shwartsman
9d1bc903d8 Fixed typo in MTRR, added assertions 2008-06-15 20:41:34 +00:00
Stanislav Shwartsman
a0e66d0e4c fixed variable name 2008-06-14 16:55:45 +00:00
Stanislav Shwartsman
92568f7525 Faster 32-bit emulation wwith 64-bit enabled mode. 
~10% speedup byu optimization of 32-bit mem access
 2008-06-12 19:14:40 +00:00
Stanislav Shwartsman
3d3dba7804 - Implemented GD bit in DR7 register 2008-06-02 19:50:40 +00:00
Stanislav Shwartsman
b7480b3e6f - Fixed x86 data breakpoint match when breakpoint length is 8 bytes 
- FIxed x86 data breakpoint in paging disabled mode
 2008-06-02 18:41:08 +00:00
Stanislav Shwartsman
d2ba79abdd Removed PANIC in DqRq function 2008-05-31 21:17:02 +00:00
Stanislav Shwartsman
764756d74a Handle reserved bits of CR8 2008-05-31 09:26:28 +00:00
Stanislav Shwartsman
d295371450 - Correctly handle segment a byte in BIG real mode 2008-05-26 21:46:39 +00:00
Stanislav Shwartsman
3619c0f6b4 Some changes to make x86-debugger feature working back 2008-05-23 17:49:46 +00:00
Stanislav Shwartsman
8118ba1a67 Fixed debug extensions exception priority 2008-05-19 19:59:29 +00:00
Stanislav Shwartsman
bef3450baa Fixes to 64-bit mode 2008-05-11 20:46:11 +00:00
Stanislav Shwartsman
4a76bd2169 Fixed setting of reserved bits in CR3 register 2008-05-11 19:36:06 +00:00
Stanislav Shwartsman
ec1ff39a5f Splitted memory access methods for 32 and 64-bit code. 
The 64-bit code got >10% speedup, the 32-bit code also got about 2% because laddr cacluation optimization
 2008-05-10 18:10:53 +00:00
Stanislav Shwartsman
3634c6f892 Compress FPU tag word 2008-05-10 13:34:47 +00:00
Stanislav Shwartsman
6ebae41ad7 print physcial address with special format - preparations for 64-bit physical address emu 2008-05-09 22:33:37 +00:00
Stanislav Shwartsman
80c9b5fcbe Compilation error fixed 2008-05-09 08:28:00 +00:00
Stanislav Shwartsman
eedf26627f Fixes in CMPXHG8B instruction - slight speedup and correct #AC check 2008-05-05 21:48:07 +00:00
Stanislav Shwartsman
64a80c8a2d - Added canonical check for SYSENTER MSRs in WRMSR 
- Fixed LLDT and LTR instructions in 64-bit mode
- Fixed error code for not 64-bit CS in interrupt from long mode
 2008-05-04 21:25:16 +00:00
Stanislav Shwartsman
50c9674d2e Small optimization in memory access functions 2008-05-03 17:33:30 +00:00
Stanislav Shwartsman
06c6ac0060 - Fixed effective address wrap in 64-bit mode with 32-bit address size 
- Fixed SMSW instruction in 32-bit and 64-bit modes
 2008-04-28 18:18:08 +00:00
Stanislav Shwartsman
67e534832b Remove from CPU reference to MEM object - it is only one and could be static 2008-04-27 19:49:02 +00:00
Stanislav Shwartsman
9047c9be96 Support for reserved bits checking in paging 
Check for page is in DTLB before invalidating by INVLPG
 2008-04-25 20:08:23 +00:00
Stanislav Shwartsman
a647c7e551 Check for old TSS limits in task switching logic 
MSR_GSKERNELBASE should be canonical - added WRMSR check
 2008-04-25 11:39:51 +00:00
Stanislav Shwartsman
24f1507fa9 - sysenter/exit should be supported in v8086 mode as well 
- fixed missed CS.LIMIT check in all far calls/jmps in real/v8086 mode
 2008-04-20 21:44:13 +00:00
Stanislav Shwartsman
280617288c Mode change in SYSENTER/EXIT/CALL/RET could happen only when already in long mode 2008-04-20 18:17:14 +00:00
Stanislav Shwartsman
a91ef4e31b Ignore CS.L bit when EFER.LMA is not set 
Add potentially missed CPU mode change in SYSCALL/RET/ENTER/EXIT
 2008-04-20 18:10:32 +00:00
Stanislav Shwartsman
d9bf2b8453 Small emulation speed optimization 2008-04-19 22:29:44 +00:00
Stanislav Shwartsman
15e9dca062 - support 64-bit write to MSR_TSC using WRMSR instruction 
- fixed save/restore param type for async_event
- fixed setting of reserved bits in upper part of CR4 in 64-bit mode
 2008-04-18 18:32:40 +00:00
Stanislav Shwartsman
892fa99c6f - prefetch hint should be NOP when use in register mode 
- #GP when trying to set reserved bits of CR4_HI in 64-bit mode
- #GP when trying to set reserved bits of EFER MSR
- clear upper part of RSI/RDI when executing rep instructions with 32-bit asize
  even if no repeat iterations were executed (because of RCX=0 for example)
- write SYSENTER_EIP_MSR and SYSENTER_ESP_MSR as 64-bit when x86_64 supported
- set MSR_FMASK reset value
- MSR_FMASK should be 32-bit only
- check for fetch permissions when doing ITLB lookup
- #GP when trying to write non-canonical address to MSR_CSTAR or MSR_LSTAR
- correct repeat instructions timing
- mark TSS busy in TR after it is loaded
 2008-04-16 16:44:06 +00:00
Stanislav Shwartsman
67f02bfa12 Add debugger callback 2008-04-15 21:29:18 +00:00
Stanislav Shwartsman
fab4042cad SYSENTER/SYSEXIT in long mode 2008-04-15 14:41:50 +00:00
Stanislav Shwartsman
a851cfd8f0 Re-implemented modebp debugger function in simple and more clean way 2008-04-07 19:59:53 +00:00
Stanislav Shwartsman
fea49bb270 Fixed linear address wrap in legacy (not long64) mode 2008-04-07 18:39:17 +00:00
Stanislav Shwartsman
5826e2843a Inline pop/push functions 
Store only single byte of opcode in b1() - speedup shift instructions
Code cleanups
 2008-04-05 17:51:55 +00:00
Stanislav Shwartsman
41fe0b3ebb Fix code duplication 2008-04-03 18:59:10 +00:00
Stanislav Shwartsman
e91409704f Convert EFER to val32 register, similar to other control registers 2008-03-31 20:56:27 +00:00
Stanislav Shwartsman
a22160959b HLT callback to Bochs internal debugger 2008-03-23 21:39:01 +00:00
Stanislav Shwartsman
167c7075fb Use fastcall gcc attribute for all cpu execution functions - this pure "compiler helper" optimization brings additional 2% speedup to Bochs code 2008-03-22 21:29:41 +00:00
Stanislav Shwartsman
a459a64f3e whispace, tab2space, indent, dos2unix and other cleanups 2008-02-15 22:05:43 +00:00
Stanislav Shwartsman
cdcd7522aa Added RIP to the GPR register file as lst register 
This allowed to optimize (read - remove) two more BxResolve methods in 64-bit mode
+ Some white space cleanup
 2008-02-15 19:03:54 +00:00
Stanislav Shwartsman
8615022962 Added first stubs for XSAVE/XRESTOR implementation 
Disassemble XSAVE/XRSTOR instructions (4 instructions)
Update CHANGES - a bit speculatively
 2008-02-12 22:41:39 +00:00
Stanislav Shwartsman
8d7410a852 Canonical check have higher priority than #AC check 2008-02-11 20:52:10 +00:00
Stanislav Shwartsman
965568ea88 cleanups 2008-02-07 18:28:50 +00:00
Stanislav Shwartsman
a2897933a3 white space cleanup 2008-02-02 21:46:54 +00:00
Stanislav Shwartsman
032b13047c Minor fix in cpu reset, bug sometimes caused to run on garbage memory after software reset. Some small debug messages fixes 2008-02-01 13:25:23 +00:00