* add a few missing/needed header defines
* show GPU temp in millidegrees C on r600/r700
* evergreen+ support soon
* function may be moved to driver long term once testing done
* add missing chipset ranges
* add a few more older (X1200) PCI ID's (mostly IGP)
* add code to detect and set frame buffer size on old chipsets
* we get to the connector detection currently and fail due to the
lack of legacy support on my X1200 IGP
* evergreen headers are split due to different
header copyrights
* detect and set up evergreen memory controler
* change the way we manage radeon chipsets to
more closely match drm driver as the chipset
model numbers aren't in order and change from
numbers to names.
* check for evergreen when populating frame buffer
information.
* style cleanup
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@43225 a95241bf-73f2-0310-859d-f6bbb57e9c96
There were a large number if incorrect, duplicated, misplaced
registers that were leading to bugs in the code. This is my first
shot at cleaning them up. Luckly as we are using AtomBIOS the number
of registers we need to know about is shrinking.
* remove registers left over from register banging days
* r770 is less then r710, r720 in the drm sources. Fix in code.
* enable newer radeons for testing
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42930 a95241bf-73f2-0310-859d-f6bbb57e9c96
* don't resize the frame buffer after mapping it.. doesn't make sense
* add memory controller code and program the memory controller for r600
* remove unneeded frame_buffer_int
* don't malloc mc_info, waste of time
* fix scaler setting
* vramStart in mc should be 0... get vertical colored lines however when this
this is set properly (everything in mc_info is the MC view of FB BAR)
When vramStart is the FB physical address... i get proper video on some cards
... thoughts?
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42924 a95241bf-73f2-0310-859d-f6bbb57e9c96
* we can now utilize these chipset
flags throughout the driver to better id
cards and features
* remove leftover BIOS size define from intel skel
* no *real* functional change
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42904 a95241bf-73f2-0310-859d-f6bbb57e9c96
* add potential support for IGP chipsets
* igp code is *untested* and should work *in theory*
* potentially resolves#8040 / #8046 ?
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42901 a95241bf-73f2-0310-859d-f6bbb57e9c96
* will fix other var names to match style guidelines
shortly
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42891 a95241bf-73f2-0310-859d-f6bbb57e9c96
base intel_extreme driver long ago
* no functional change
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42880 a95241bf-73f2-0310-859d-f6bbb57e9c96
* correct? color mode setting bug
* fix var naming to match style guidelines
* add a few missing register defines
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42879 a95241bf-73f2-0310-859d-f6bbb57e9c96
(they are actually reversed), so introduce a find_reg() inline function to map
such regs individually instead. Should fix interrupt storms on SandyBridge.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42870 a95241bf-73f2-0310-859d-f6bbb57e9c96
* Also add the definitions and some specifics for IronLake (ILK), but keep the
IDs disabled as at least the one version I can test with doesn't work yet.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42869 a95241bf-73f2-0310-859d-f6bbb57e9c96
* Make the pointer style consistent accross all components, which should make it
easier when working all over the place.
* 80 char limits.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42863 a95241bf-73f2-0310-859d-f6bbb57e9c96
control block. Doesn't matter on (G)MCH (they are the same register block tehre)
but fixes mode setting on PCH again.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42862 a95241bf-73f2-0310-859d-f6bbb57e9c96
register blocks and we encode their block into the register definition. On
register access these blocks are then translated into the final address.
* Set up the register blocks for (G)MCH and PCH variants.
* Remove most SandyBridge code that was actually PCH specific and is now taken
care of automatically.
* This will temporarily break SandyBridge support again until the right
transcoders are actually programmed.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42857 a95241bf-73f2-0310-859d-f6bbb57e9c96
(the one in my new ThinkPad X1). The PLL is still off a bit so it has a few
blurry stripes, but EDID and mode setting basically works.
* Starting with IronLake the north/south bridge or (G)MCH/ICH setup was moved
into a platform control hub (PCH) which means that many registers previously
located in the GMCH are now in the PCH and have a new address.
* I'm committing this mostly because this way the additions are more easy to
follow. It is a bit messy and I'll clean it up more and possibly make it a
bit more generic. Also most of these changes actually apply to IronLake and up
and aren't SandyBridge specific, so a few of those additions will still get a
broader scope and new chips will be added.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42839 a95241bf-73f2-0310-859d-f6bbb57e9c96
* rename decode_* to get_*
* clean up get_* text when unknown connector/encoder
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42717 a95241bf-73f2-0310-859d-f6bbb57e9c96
(.c to keep compatibility with older C accelerants)
* use functions for decoding video_electronics
* thanks for the guidance Axel!
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42668 a95241bf-73f2-0310-859d-f6bbb57e9c96
this seems like it could be useful for more then
just radeon_hd.
* idea from linux drm driver
* feedback / flames welcome
* can move into radeon_hd private defines if requested
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42662 a95241bf-73f2-0310-859d-f6bbb57e9c96
* malloc storage for mc state info
* redo pll range struct
* change to ATOM_ENCODER_MODE for connector info
* redo pll calculations to match AtomBIOS requirements
* some structure changes
* no longer init already posted AtomBIOS as it
causes an infinite loop of AtomBIOS calls
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42644 a95241bf-73f2-0310-859d-f6bbb57e9c96
* when TRACE_ATOM is enabled in bios.c, we dump
each accelerant instance of the AtomBIOS rom
to disk in /boot/common/cache/tmp/ (next to usb
hid descriptors in the same file name format)
* these images can be parsed with the AtomDis application
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42622 a95241bf-73f2-0310-859d-f6bbb57e9c96
* add igp property to pciid map
* add disabled bios pull for r700 and ni cards
* refactor model numbering as >R700 AMD switched
to named card families
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42596 a95241bf-73f2-0310-859d-f6bbb57e9c96
* add missing header for some radeon registers
* begin removing now un-needed direct register calls
* move and refactor crtc functions
* fix function naming to be clearer
* create more AtomBIOS style calls
* this will eat your cat at the moment, don't bother testing
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42582 a95241bf-73f2-0310-859d-f6bbb57e9c96
* implement various methods to pull AtomBIOS from card
* add some missing registers to headers from linux drm driver
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42553 a95241bf-73f2-0310-859d-f6bbb57e9c96
* Point AtomBIOS to PCI rom mapped in memory
* Things no longer crash, but we get an Invalid BIOS Magic error
in the logs.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42543 a95241bf-73f2-0310-859d-f6bbb57e9c96
* Pull pci_rom base address from pci subsystem
* Point AtomBIOS parser to pci rom address
to set up and malloc atom_context
* This is untested! Don't run on an
expensive card until I test it on a cheaper
one!
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42541 a95241bf-73f2-0310-859d-f6bbb57e9c96
* Add missing Idle call for connectors
* Reformulate blanking.. this should match what the
register is after the GTF vesa call
* Set FrameBuffer to card internal address
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42509 a95241bf-73f2-0310-859d-f6bbb57e9c96
into a usable function - this has some coding style issues I did not care to
fix.
* _AddBaseMode() now computes the mode in case it is not present in the list
yet.
* This should help with bug #7787.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42420 a95241bf-73f2-0310-859d-f6bbb57e9c96
* Add crtControl global register
* Add grphUpdate storage
* Do some logical reordering of register writes
* Correct crt final power-on checks
* Enhance tracing
* Disable PLL, it is needed but seems to completely break
the modesetting resulting in black-screen-of-doom.
(fixing PLL set/calibration is now priority one)
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42380 a95241bf-73f2-0310-859d-f6bbb57e9c96
* pass mapped frame buffer area id to accelerant
* remove my temporary hacked together frame buffer memory mapping
* completely rely on PCI BAR for now for aperture size / location instead of
R6XX_CONFIG_FB_BASE reg.
* Remove my temporary AllocateFB function.
* set grphPrimarySurfaceAddr to physical memory frame buffer location (offset 0)
* fix P/N sync setting.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41722 a95241bf-73f2-0310-859d-f6bbb57e9c96
