Add first hints of thermal monitoring on radeon cards
* add a few missing/needed header defines * show GPU temp in millidegrees C on r600/r700 * evergreen+ support soon * function may be moved to driver long term once testing done
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@ -183,4 +183,10 @@
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#define R600_HDMI_CONFIG1 0x7600
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#define R600_HDMI_CONFIG2 0x7a00
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/* Thermal information */
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#define R600_CG_THERMAL_STATUS 0x7F4
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#define R600_ASIC_T(x) ((x) << 0)
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#define R600_ASIC_T_MASK 0x1FF
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#define R600_ASIC_T_SHIFT 0
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#endif
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@ -121,25 +121,25 @@
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#define CMDFIFO_AVAIL_MASK 0x0000000F
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#define GUI_ACTIVE (1<<31)
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#define GRBM_STATUS2 0x8014
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#define CG_MULT_THERMAL_STATUS 0x740
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#define ASIC_T(x) ((x) << 16)
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#define ASIC_T_MASK 0x3FF0000
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#define ASIC_T_SHIFT 16
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#endif
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#define HDP_HOST_PATH_CNTL 0x2C00
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#define HDP_NONSURFACE_BASE 0x2C04
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#define HDP_NONSURFACE_INFO 0x2C08
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#define HDP_NONSURFACE_SIZE 0x2C0C
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#define HDP_REG_COHERENCY_FLUSH_CNTL 0x54A0
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#define HDP_TILING_CONFIG 0x2F3C
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#define HDP_DEBUG1 0x2F34
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#define R700_CG_MULT_THERMAL_STATUS 0x740
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#define R700_ASIC_T(x) ((x) << 16)
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#define R700_ASIC_T_MASK 0x3FF0000
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#define R700_ASIC_T_SHIFT 16
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#define R700_MC_SHARED_CHMAP 0x2004
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#define HDP_HOST_PATH_CNTL 0x2C00
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#define HDP_NONSURFACE_BASE 0x2C04
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#define HDP_NONSURFACE_INFO 0x2C08
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#define HDP_NONSURFACE_SIZE 0x2C0C
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#define HDP_REG_COHERENCY_FLUSH_CNTL 0x54A0
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#define HDP_TILING_CONFIG 0x2F3C
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#define HDP_DEBUG1 0x2F34
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#define R700_MC_SHARED_CHMAP 0x2004
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#define NOOFCHAN_SHIFT 12
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#define NOOFCHAN_MASK 0x00003000
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#define R700_MC_SHARED_CHREMAP 0x2008
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#define R700_MC_SHARED_CHREMAP 0x2008
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#define R700_MC_ARB_RAMCFG 0x2760
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#define NOOFBANK_SHIFT 0
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@ -287,6 +287,9 @@ radeon_init_accelerant(int device)
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radeon_gpu_mc_setup();
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TRACE("%s: Current GPU temperature: %" B_PRId32 " mC\n",
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__func__, radeon_get_temp());
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TRACE("%s done\n", __func__);
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return B_OK;
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}
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@ -774,3 +774,43 @@ radeon_gpu_gpio_setup()
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return B_OK;
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}
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int32
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radeon_get_temp()
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{
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// return GPU temp in millidegrees C
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radeon_shared_info &info = *gInfo->shared_info;
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uint32 rawTemp = 0; // temp
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int32 finalTemp = 0; // actual_temp
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if (info.chipsetID >= RADEON_RV770) {
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rawTemp = (Read32(OUT, R700_CG_MULT_THERMAL_STATUS) & R700_ASIC_T_MASK)
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>> R700_ASIC_T_SHIFT;
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if (rawTemp & 0x400)
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finalTemp = -256;
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else if (rawTemp & 0x200)
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finalTemp = 255;
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else if (rawTemp & 0x100) {
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finalTemp = rawTemp & 0x1ff;
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finalTemp |= ~0x1ff;
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} else
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finalTemp = rawTemp & 0xff;
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return (finalTemp * 1000) / 2;
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} else if (info.chipsetID >= RADEON_R600) {
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rawTemp = (Read32(OUT, R600_CG_THERMAL_STATUS) & R600_ASIC_T_MASK)
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>> R600_ASIC_T_SHIFT;
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finalTemp = rawTemp & 0xff;
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if (rawTemp & 0x100)
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finalTemp -= 256;
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return finalTemp * 1000;
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}
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return -1;
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}
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@ -177,6 +177,7 @@ status_t radeon_gpu_irq_setup();
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status_t radeon_gpu_gpio_setup();
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status_t radeon_gpu_i2c_attach(uint32 id, uint8 hw_line);
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bool radeon_gpu_read_edid(uint32 connector, edid1_info *edid);
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int32 radeon_get_temp();
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#endif
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