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* Add a couple more SandyBridge IDs. They might work, but I can't test them.

Browse Source 
* Also add the definitions and some specifics for IronLake (ILK), but keep the
  IDs disabled as at least the one version I can test with doesn't work yet.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42869 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Michael Lotz 2011-10-16 20:02:56 +00:00
parent 9e2e0d8dac
commit c0cb09baee
6 changed files with 44 additions and 8 deletions
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9
headers/private/graphics/intel_extreme/intel_extreme.h
View File

@ -34,8 +34,10 @@
#define INTEL_TYPE_Gxx (INTEL_TYPE_9xx | 0x0200)
#define INTEL_TYPE_G4x (INTEL_TYPE_9xx | 0x0400)
#define INTEL_TYPE_IGD (INTEL_TYPE_9xx | 0x0800)
#define INTEL_TYPE_SNB (INTEL_TYPE_9xx | 0x1000)
#define INTEL_TYPE_ILK (INTEL_TYPE_9xx | 0x1000)
#define INTEL_TYPE_SNB (INTEL_TYPE_9xx | 0x2000)
// models
#define INTEL_TYPE_SERVER 0x0004
#define INTEL_TYPE_MOBILE 0x0008
#define INTEL_TYPE_915 (INTEL_TYPE_91x)
#define INTEL_TYPE_915M (INTEL_TYPE_91x | INTEL_TYPE_MOBILE)
@ -48,8 +50,11 @@
#define INTEL_TYPE_GM45 (INTEL_TYPE_G4x | INTEL_TYPE_MOBILE)
#define INTEL_TYPE_IGDG (INTEL_TYPE_IGD)
#define INTEL_TYPE_IGDGM (INTEL_TYPE_IGD | INTEL_TYPE_MOBILE)
#define INTEL_TYPE_ILKG (INTEL_TYPE_ILK)
#define INTEL_TYPE_ILKGM (INTEL_TYPE_ILK | INTEL_TYPE_MOBILE)
#define INTEL_TYPE_SNBG (INTEL_TYPE_SNB)
#define INTEL_TYPE_SNBGM (INTEL_TYPE_SNB | INTEL_TYPE_MOBILE)
#define INTEL_TYPE_SNBGS (INTEL_TYPE_SNB | INTEL_TYPE_SERVER)
#define DEVICE_NAME "intel_extreme"
#define INTEL_ACCELERANT_NAME "intel_extreme.accelerant"
@ -122,7 +127,7 @@ struct DeviceType {
bool HasPlatformControlHub() const
{
return InGroup(INTEL_TYPE_SNB);
return InGroup(INTEL_TYPE_ILK) || InGroup(INTEL_TYPE_SNB);
}
};

1
src/add-ons/accelerants/intel_extreme/hooks.cpp
View File

@ -116,6 +116,7 @@ get_accelerant_hook(uint32 feature, void* data)
|| gInfo->shared_info->device_type.IsModel(INTEL_TYPE_965M)
|| gInfo->shared_info->device_type.InGroup(INTEL_TYPE_G4x)
|| gInfo->shared_info->device_type.InGroup(INTEL_TYPE_IGD)
|| gInfo->shared_info->device_type.InGroup(INTEL_TYPE_ILK)
|| gInfo->shared_info->device_type.InGroup(INTEL_TYPE_SNB))
return NULL;

4
src/add-ons/accelerants/intel_extreme/mode.cpp
View File

@ -137,6 +137,7 @@ set_frame_buffer_base()
if (sharedInfo.device_type.InGroup(INTEL_TYPE_96x)
|| sharedInfo.device_type.InGroup(INTEL_TYPE_G4x)
|| sharedInfo.device_type.InGroup(INTEL_TYPE_ILK)
|| sharedInfo.device_type.InGroup(INTEL_TYPE_SNB)) {
write32(baseRegister, mode.v_display_start * sharedInfo.bytes_per_row
+ mode.h_display_start * (sharedInfo.bits_per_pixel + 7) / 8);
@ -239,7 +240,8 @@ get_pll_limits(pll_limits &limits)
// Note, the limits are taken from the X driver; they have not yet been
// tested
if (gInfo->shared_info->device_type.InGroup(INTEL_TYPE_SNB)) {
if (gInfo->shared_info->device_type.InGroup(INTEL_TYPE_ILK)
|| gInfo->shared_info->device_type.InGroup(INTEL_TYPE_SNB)) {
// TODO: support LVDS output limits as well
static const pll_limits kLimits = {
// p, p1, p2, high, n, m, m1, m2

20
src/add-ons/kernel/busses/agp_gart/intel_gart.cpp
View File

@ -81,7 +81,20 @@ const struct supported_device {
{0xa000, 0xa001, INTEL_TYPE_IGDG, "Atom_Dx10"},
{0xa010, 0xa011, INTEL_TYPE_IGDGM, "Atom_N4x0"},
{0x0104, 0x0126, INTEL_TYPE_SNBGM, "SNBGM"},
#if 0
{0x0040, 0x0042, INTEL_TYPE_ILKG, "IronLake Desktop"},
{0x0044, 0x0046, INTEL_TYPE_ILKGM, "IronLake Mobile"},
{0x0062, 0x0046, INTEL_TYPE_ILKGM, "IronLake Mobile"},
{0x006a, 0x0046, INTEL_TYPE_ILKGM, "IronLake Mobile"},
#endif
{0x0100, 0x0102, INTEL_TYPE_SNBG, "SandyBridge Desktop GT1"},
{0x0100, 0x0112, INTEL_TYPE_SNBG, "SandyBridge Desktop GT2"},
{0x0100, 0x0122, INTEL_TYPE_SNBG, "SandyBridge Desktop GT2+"},
{0x0104, 0x0106, INTEL_TYPE_SNBGM, "SandyBridge Mobile GT1"},
{0x0104, 0x0116, INTEL_TYPE_SNBGM, "SandyBridge Mobile GT2"},
{0x0104, 0x0126, INTEL_TYPE_SNBGM, "SandyBridge Mobile GT2+"},
{0x0108, 0x010a, INTEL_TYPE_SNBGS, "SandyBridge Server"}
};
struct intel_info {
@ -164,7 +177,8 @@ determine_memory_sizes(intel_info &info, size_t &gttSize, size_t &stolenSize)
gttSize = 2 << 20;
break;
}
} else if ((info.type & INTEL_TYPE_GROUP_MASK) == INTEL_TYPE_G4x) {
} else if ((info.type & INTEL_TYPE_GROUP_MASK) == INTEL_TYPE_G4x
|| (info.type & INTEL_TYPE_GROUP_MASK) == INTEL_TYPE_ILK) {
switch (memoryConfig & G4X_GTT_MASK) {
case G4X_GTT_NONE:
gttSize = 0;
@ -395,6 +409,7 @@ intel_map(intel_info &info)
if ((info.type & INTEL_TYPE_FAMILY_MASK) == INTEL_TYPE_9xx) {
if ((info.type & INTEL_TYPE_GROUP_MASK) == INTEL_TYPE_G4x
|| (info.type & INTEL_TYPE_GROUP_MASK) == INTEL_TYPE_ILK
|| (info.type & INTEL_TYPE_GROUP_MASK) == INTEL_TYPE_SNB) {
info.gtt_physical_base = info.display.u.h0.base_registers[mmioIndex]
+ (2UL << 20);
@ -601,7 +616,6 @@ intel_init()
sInfo.type = kSupportedDevices[i].type;
found = has_display_device(sInfo.display,
kSupportedDevices[i].display_id);
break;
}
}

13
src/add-ons/kernel/drivers/graphics/intel_extreme/driver.cpp
View File

@ -73,7 +73,18 @@ const struct supported_device {
{0xa001, INTEL_TYPE_IGDG, "Atom_Dx10"},
{0xa011, INTEL_TYPE_IGDGM, "Atom_N4x0"},
{0x0126, INTEL_TYPE_SNBGM, "SNBGM"},
{0x0042, INTEL_TYPE_ILKG, "IronLake Desktop"},
{0x0046, INTEL_TYPE_ILKGM, "IronLake Mobile"},
{0x0046, INTEL_TYPE_ILKGM, "IronLake Mobile"},
{0x0046, INTEL_TYPE_ILKGM, "IronLake Mobile"},
{0x0102, INTEL_TYPE_SNBG, "SandyBridge Desktop GT1"},
{0x0112, INTEL_TYPE_SNBG, "SandyBridge Desktop GT2"},
{0x0122, INTEL_TYPE_SNBG, "SandyBridge Desktop GT2+"},
{0x0106, INTEL_TYPE_SNBGM, "SandyBridge Mobile GT1"},
{0x0116, INTEL_TYPE_SNBGM, "SandyBridge Mobile GT2"},
{0x0126, INTEL_TYPE_SNBGM, "SandyBridge Mobile GT2+"},
{0x010a, INTEL_TYPE_SNBGS, "SandyBridge Server"}
};
int32 api_version = B_CUR_DRIVER_API_VERSION;

5
src/add-ons/kernel/drivers/graphics/intel_extreme/intel_extreme.cpp
View File

@ -302,8 +302,11 @@ intel_extreme_init(intel_info &info)
dprintf("i965GM/i965GME quirk\n");
write32(info, 0x6204, (1L << 29));
} else if (info.device_type.InGroup(INTEL_TYPE_SNB)) {
dprintf("SNB clock gating\n");
dprintf("SandyBridge clock gating\n");
write32(info, 0x42020, (1L << 28) | (1L << 7) | (1L << 5));
} else if (info.device_type.InGroup(INTEL_TYPE_ILK)) {
dprintf("IronLake clock gating\n");
write32(info, 0x42020, (1L << 7) | (1L << 5));
} else if (info.device_type.InGroup(INTEL_TYPE_G4x)) {
dprintf("G4x clock gating\n");
write32(info, 0x6204, 0);