on a patch from fire crow on tech-net with additional bpf & detach fixes,
module support, and a match for 8152 v2.0 devices.
alc0 at pci3 dev 0 function 0: Attansic/Atheros L1C/L2C Ethernet
alc0: ioapic0 pin 17
alc0: Ethernet address 00:26:6c:9e:d4:c1
ukphy0 at alc0 phy 0: L2 10/100 PHY (OUI 0x00c82e, model 0x0002), rev. 5
ukphy0: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, 1000baseT-FDX, auto
Increase the delay between setting the command register and reading the
status register. Reset the smbus controller if it has timed out.
Tested on an IBM eServer x335.
- fix an off-by-one in block size calculation
- add register definitions from HDA034-A2, HDA035-A, HDA036-A
- rename hdaudio_afg_* symbols to hdafg_*
- add experimental HDMI and DisplayPort support code (needs help from DRM)
- don't poll the RIRB unless cold
- add support for unsolicited messages
- 'hdaudioctl graph' works again
- print each assoc's widget tree when boot -x
rev 1.186. This makes the following hardware find its PHY again, and I can't
see how these larger delays could be a problem for other hardware:
wm0 at pci6 dev 7 function 0: Intel i82541GI 1000BASE-T Ethernet, rev. 5
wm0: interrupting at ioapic2 pin 0, event channel 5
wm0: 32-bit 66MHz PCI bus
wm0: 65536 word (16 address bits) SPI EEPROM
wm0: Ethernet address 00:13:72:54:ee:13
igphy0 at wm0 phy 1: Intel IGP01E1000 Gigabit PHY, rev. 0
igphy0: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, 1000baseT, 1000baseT-FDX, auto
factorize offset computation. Inspired from OpenBSD and Intel docs.
Note: agp_i810_bind/unbind_page will now fail with EINVAL if the
physical address is too large for the chipset (instead of silently
truncating it).
ok jmcneill@
as found in the vortex86 SoCs (http://www.vortex86dx.com).
Ported from freebsd.
Not added to amd64's GENERIC because this CPU is 32bit only.
thanks to DM&P Electronics, Inc for providing documentation and sample
devices for this work.
pointer but those don't use alternative MAC address in reality. So we check
whether the broadcast bit is set or not like Intel's e1000 driver.
Fixes PR kern/44072 reported by Jean-Yves Moulin.
Remove extra Warning for newer cards.
resemble its CardBus attachment very, very closely: slightly more than
24 lines are different. Alas, I cannot commit the CardBus part of this
change, yet, because I have to finish my overhaul of CardBus resource
handling, first.
http://www.openbsd.org/cgi-bin/cvsweb/src/sys/dev/pci/if_nfe.c#rev1.97
>> Some nfe(4)/rlphy(4) combos don't work, because the PHY responds to all
>> addresses on the mii bus. As a countereasure, only attach the first PHY we
>> encounter. It is very unlikely we're going to ever see nfe(4) with multiple
>> PHYs. The same is probably true for any modern NIC.
Should suppress bogus ukphy30 noted in PR kern/42950.
No bad side effect on my nfe(4) which didn't get ghosts:
---
nfe0 at pci0 dev 5 function 0: NVIDIA nForce3 Ethernet #4 (rev. 0xa2)
:
rlphy0 at nfe0 phy 1: RTL8201L 10/100 media interface, rev. 1
rlphy0: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, auto
It returns the bus id and allows userland (like Xorg) to create mapping
of ttyE? and bus id. For now only PCI is implemented.
First discussed with macallan@ then public on tech-kern@ and tech-x11@
- Fix register address in ale_phy_reset(). from linux
- Fix mask value in ale_stop_mac().
- Fix multicast handling. from openbsd
- Fix phy reset handling.
- rename to ppb_fix_pcie
- support version PCI-E 2.0
- print version and device/port type information
- use constants from pcireg.h instead of magic numbers
changes:
ppb2 at pci0 dev 21 function 0: vendor 0x15ad product 0x07a0 (rev. 0x01)
ppb2: unsupported PCI Express version
to:
ppb2 at pci0 dev 21 function 0: vendor 0x15ad product 0x07a0 (rev. 0x01)
ppb2: PCI Express 2.0 <Root Port of PCI-E Root Complex>
ifconfig vlan0 create vlan 2 vlanif wm0
ifconfig vlan0 destroy
It pays to avoid a reset because after a reset it can take about 30
seconds before wm0 is back on the net.
The patch garnered no objections on tech-net@.
Sponsored by CoyotePoint Systems Inc.
ehci functions. We can't assume that there will only be one ehci per device.
The existing code could not deal with:
Netmos MCS9990 Quad USB 2.0 Port (USB serial bus, interface 0x10) at pci1 dev 0 function 0 not configured
Netmos MCS9990 Quad USB 2.0 Port (USB serial bus, interface 0x20) at pci1 dev 0 function 1 not configured
Netmos MCS9990 Quad USB 2.0 Port (USB serial bus, interface 0x10) at pci1 dev 0 function 2 not configured
Netmos MCS9990 Quad USB 2.0 Port (USB serial bus, interface 0x20) at pci1 dev 0 function 3 not configured
Netmos MCS9990 Quad USB 2.0 Port (USB serial bus, interface 0x10) at pci1 dev 0 function 4 not configured
Netmos MCS9990 Quad USB 2.0 Port (USB serial bus, interface 0x20) at pci1 dev 0 function 5 not configured
Netmos MCS9990 Quad USB 2.0 Port (USB serial bus, interface 0x10) at pci1 dev 0 function 6 not configured
Netmos MCS9990 Quad USB 2.0 Port (USB serial bus, interface 0x20) at pci1 dev 0 function 7 not configured
The macros for PAGE_SIZE were fixed with the previous patch (if_bnxreg.h
splitting, rev 1.11).
From OpenBSD. Their commit log reads:
bnx(4) is a bit special. The chip itself is capable of swapping endianess
so there is no need for htoleXX calls. The only thing needed is the correct
layout of the DMA-ed structures. Additionally it uses PAGE_SIZE but assumed
that it is always 4k. Fix the macros that failed to respect that so that it
works on 8k PAGE_SIZE systems. This makes bnx(4) work on sparc64.
- if_bnxreg.h: general register values, flags... for bnx(4), that can
be included in other drivers
- if_bnxvar.h: PCI or device specific code (device state data, debug
macros etc.), which should remain private to bnx(4)
No comments, no objections on current-users@.
See discussion:
http://mail-index.netbsd.org/current-users/2010/12/01/msg014926.html
quirk, and use it for the 9690 as well where it's also needed. Patch by me,
problem hunted down by Jiri Novotny and Zdenek Slavet and reported in
PR 44002.
The et(4) driver supports PCI Express Ethernet adapters based on
the Agere/LSI ET1310/ET1301 integrated MAC/PHY.
The et(4) driver was written by Sepherosa Ziehau for DragonFlyBSD,
ported to OpenBSD by Jonathan Gray and subsequently ported to NetBSD
by Kaspar Brand.
consideration and avoid future code duplication.
Ports wanting to enable detachment of controllers with compatibility-mapped
channels will need to supply a pciide_machdep_compat_intr_disestablish()
function.
- use DMA in 28-bit LBA addressing.
- use PIO in 48-bit LBA addressing.
Idea and message are from FreeBSD, and tested on M5229 rev. 0xc3 in
my Sun Netra X1 with 160GB drive.
- A word "mechanism" was accidently separated in to "me" and "chanism"
in comment.
No functional chanage and I found it while reading if_wm.c yesterday.
Make 'physical' element of the struct agp_allocate an uint32_t. This
is similar to what other kernels do (at least Solaris and Linux).
This patch should make xserver work again within an i386 userland in a
64 bits paddr_t world.
Thanks to Iain Hibbert for reporting the break, and providing initial hints.
See http://mail-index.netbsd.org/current-users/2010/09/27/msg014418.html
- fix colour oddities seen occasionally on sparc64
- try to use firmware DAC wiring until we figure out what's wrong
TODO:
- find out why radeonfb gets the DAC wiring ass-backwards on my xvr-100
while Xorg's radeon driver gets it right
- find out why reverse characters aren't drawn in reverse
tested on macppc and sparc64
Instead of specifying a range of supported sample rates based on the lowest
and highest available frequencies, only advertise rates that the codec reports
as working. Let aurateconv take care of the rest.
that no such widget is defined first. On a Dell Latitude 430, widget
0x14 is the beep generator and the original version would replace the
normal speaker output, breaking head phone redirection in the process.
Discussed with jmcneill@
