add a couple more register definitions, mostly from xf86-video-r128
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@ -1,4 +1,4 @@
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/* $NetBSD: r128fbreg.h,v 1.2 2010/09/09 01:22:10 macallan Exp $ */
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/* $NetBSD: r128fbreg.h,v 1.3 2010/09/30 03:14:39 macallan Exp $ */
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/*
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* Copyright 1999, 2000 ATI Technologies Inc., Markham, Ontario,
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@ -141,6 +141,7 @@
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# define R128_DP_SRC_SOURCE_MASK (7 << 24)
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# define R128_DP_SRC_SOURCE_MEMORY (2 << 24)
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# define R128_DP_SRC_SOURCE_HOST_DATA (3 << 24)
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# define R128_DP_SRC_SOURCE_HOST_ALIGN (4 << 24)
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# define R128_GMC_3D_FCN_EN (1 << 27)
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# define R128_GMC_CLR_CMP_CNTL_DIS (1 << 28)
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# define R128_GMC_AUX_CLIP_DIS (1 << 29)
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@ -203,7 +204,15 @@
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#define R128_DP_DATATYPE 0x16c4
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# define R128_HOST_BIG_ENDIAN_EN (1 << 29)
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#define R128_DP_MIX 0x16c8
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# define R128_MIX_SRC_VRAM (2 << 8)
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# define R128_MIX_SRC_HOSTDATA (3 << 8)
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# define R128_MIX_SRC_HOST_BYTEALIGN (4 << 8)
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# define R128_MIX_SRC_ROP3_MASK (0xff << 16)
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#define R128_DP_WRITE_MASK 0x16cc
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#define R128_DP_SRC_BKGD_CLR 0x15dc
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#define R128_DP_SRC_FRGD_CLR 0x15d8
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#define R128_DP_CNTL_XDIR_YDIR_YMAJOR 0x16d0
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# define R128_DST_Y_MAJOR (1 << 2)
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@ -216,11 +225,27 @@
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# define R128_DEFAULT_SC_RIGHT_MAX (0x1fff << 0)
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# define R128_DEFAULT_SC_BOTTOM_MAX (0x1fff << 16)
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#define R128_SC_TOP_LEFT 0x16ec
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/* scissor registers */
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#define R128_SC_BOTTOM 0x164c
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#define R128_SC_BOTTOM_RIGHT 0x16f0
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#define R128_SC_BOTTOM_RIGHT_C 0x1c8c
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#define R128_SC_LEFT 0x1640
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#define R128_SC_RIGHT 0x1644
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#define R128_SC_TOP 0x1648
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#define R128_SC_TOP_LEFT 0x16ec
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#define R128_SC_TOP_LEFT_C 0x1c88
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#define R128_GUI_STAT 0x1740
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# define R128_GUI_FIFOCNT_MASK 0x0fff
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# define R128_GUI_ACTIVE (1 << 31)
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#define R128_HOST_DATA0 0x17c0
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#define R128_HOST_DATA1 0x17c4
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#define R128_HOST_DATA2 0x17c8
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#define R128_HOST_DATA3 0x17cc
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#define R128_HOST_DATA4 0x17d0
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#define R128_HOST_DATA5 0x17d4
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#define R128_HOST_DATA6 0x17d8
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#define R128_HOST_DATA7 0x17dc
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#endif /* R128FB_REG_H */
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