specifically tell a driver that bridges upstream forward PCI I/O (or
memory) transactions to the device." Only bus drivers have any business
modifying these.
SUNIX vendor Id 0x1fd4 and product Id 0x1999. Constants were taken from
Linux open source driver distributed by SUNIX.
The following models should be supported now:
5008 1 parallel port
5016 16 serial ports, only 8 supported right now (PUC_MAX_PORTS limit)
5027 1 serial port
5037 2 serial ports
5056 4 serial ports
5066 8 serial ports, this model is the only one that was actually tested.
5069 1 serial port and 1 parallel port
5079 2 serial ports and 1 parallel port
5099 4 serial ports and 1 parallel port
handled):
- export bge(4) and bnx(4) CHIP ID and PHY flags to brgphy(4). Move to
"unsigned int" rather than "int", and reuse the same softc members for
chipid and phyflags (behavior controlled by the sc_isbge/isbnx boolean).
- apply bug fix for revisions A and B, so that autonegotiation can
complete (from OpenBSD).
Bug reported by Rivo Nurges via private mail, patch tested and
confirmed working by him (with thanks!)
- call vte_rxfilter() after starting transmit/receive; this seems to
fix some IPv6-related multicast issues for me
- when the MCR0_BROADCAST bit is set broadcast receive is disabled.
Rename it to MCR0_BROADCAST_DIS to reflect its function, and fix usage.
- Fix loop over multicast addresses to not set the same address in the
3 perfect filter slots.
Our driver initializes the Broadcom hardware to peform a tcp and udp
checksum on only the payload of the tcp or udp packet, rather than the
entire packet. The FreeBSD, OpenBSD and Linux drivers instruct the hardware to compute
the checksum for the entire packet. I believe the bug is that some revisions
of the BCM hardware, under certain circumstances, revert to doing the
complete checksum calculation, as the FreeBSD, OpenBSD and Linux drivers
request, while things are running. As
a result, when we pull the computed checksum from the hardware and pass it
up to the upper layers, we assume the checksum is the more minimal
one, and the upper layers perform the appropriate checks, which, when this
happens, cause the packet to be rejected because the resultant checksum is
decidedly incorrect.
This patch changes the driver to instruct the hardware to perform the
checksum over the entire packet, just as the FreeBSD, OpenBSD and
Linux drivers do, and to notify the upper layers appropriately.
This patch appears to work on all revisions of the hardware that have been
tested. (See the list in the bug report.)
this patch is approved by tls.
bge_init() and so does not get called when a vlan child is added. Calling
bge_setvlan() from bge_ifflags_cb() doesn't work either as it appears that
the callback is called before ec_capenable is updated by if_vlan.c.
the PCI Command Register instead of PCI_FLAGS_IO_ENABLED |
PCI_FLAGS_MEM_ENABLED. The latter amounts to the same value, but the
names are in the pa_flags namespace instead of the PCI Command Register
bits namespace.
pci_find_rom(), pci_intr_map(9), pci_enumerate_bus(), nor the match
predicate passed to pciide_compat_intr_establish() should ever modify
their pci_attach_args argument, so make their pci_attach_args arguments
const and deal with the fallout throughout the kernel.
For the most part, these changes add a 'const' where there was no
'const' before, however, some drivers and MD code used to modify
pci_attach_args. Now those drivers either copy their pci_attach_args
and modify the copy, or refrain from modifying pci_attach_args:
Xen: according to Manuel Bouyer, writing to pci_attach_args in
pci_intr_map() was a leftover from Xen 2. Probably a bug. I
stopped writing it. I have not tested this change.
siside(4): sis_hostbr_match() needlessly wrote to pci_attach_args.
Probably a bug. I use a temporary variable. I have not tested this
change.
slide(4): sl82c105_chip_map() overwrote the caller's pci_attach_args.
Probably a bug. Use a local pci_attach_args. I have not tested
this change.
viaide(4): via_sata_chip_map() and via_sata_chip_map_new() overwrote the
caller's pci_attach_args. Probably a bug. Make a local copy of the
caller's pci_attach_args and modify the copy. I have not tested
this change.
While I'm here, make pci_mapreg_submap() static.
With these changes in place, I have tested the compilation of these
kernels:
alpha GENERIC
amd64 GENERIC XEN3_DOM0
arc GENERIC
atari HADES MILAN-PCIIDE
bebox GENERIC
cats GENERIC
cobalt GENERIC
evbarm-eb NSLU2
evbarm-el ADI_BRH ARMADILLO9 CP3100 GEMINI GEMINI_MASTER GEMINI_SLAVE GUMSTIX
HDL_G IMX31LITE INTEGRATOR IQ31244 IQ80310 IQ80321 IXDP425 IXM1200
KUROBOX_PRO LUBBOCK MARVELL_NAS NAPPI SHEEVAPLUG SMDK2800 TEAMASA_NPWR
TEAMASA_NPWR_FC TS7200 TWINTAIL ZAO425
evbmips-el AP30 DBAU1500 DBAU1550 MALTA MERAKI MTX-1 OMSAL400 RB153 WGT624V3
evbmips64-el XLSATX
evbppc EV64260 MPC8536DS MPC8548CDS OPENBLOCKS200 OPENBLOCKS266
OPENBLOCKS266_OPT P2020RDB PMPPC RB800 WALNUT
hp700 GENERIC
i386 ALL XEN3_DOM0 XEN3_DOMU
ibmnws GENERIC
macppc GENERIC
mvmeppc GENERIC
netwinder GENERIC
ofppc GENERIC
prep GENERIC
sandpoint GENERIC
sgimips GENERIC32_IP2x
sparc GENERIC_SUN4U KRUPS
sparc64 GENERIC
As of Sun Apr 3 15:26:26 CDT 2011, I could not compile these kernels
with or without my patches in place:
### evbmips-el GDIUM
nbmake: nbmake: don't know how to make /home/dyoung/pristine-nbsd/src/sys/arch/mips/mips/softintr.c. Stop
### evbarm-el MPCSA_GENERIC
src/sys/arch/evbarm/conf/MPCSA_GENERIC:318: ds1672rtc*: unknown device `ds1672rtc'
### ia64 GENERIC
/tmp/genassym.28085/assym.c: In function 'f111':
/tmp/genassym.28085/assym.c:67: error: invalid application of 'sizeof' to incomplete type 'struct pcb'
/tmp/genassym.28085/assym.c:76: error: dereferencing pointer to incomplete type
### sgimips GENERIC32_IP3x
crmfb.o: In function `crmfb_attach':
crmfb.c:(.text+0x2304): undefined reference to `ddc_read_edid'
crmfb.c:(.text+0x2304): relocation truncated to fit: R_MIPS_26 against `ddc_read_edid'
crmfb.c:(.text+0x234c): undefined reference to `edid_parse'
crmfb.c:(.text+0x234c): relocation truncated to fit: R_MIPS_26 against `edid_parse'
crmfb.c:(.text+0x2354): undefined reference to `edid_print'
crmfb.c:(.text+0x2354): relocation truncated to fit: R_MIPS_26 against `edid_print'
- always bus_dmamap_unload() before recycling a receive descriptor
- make sure to not sleep from interrupt context: call bus_dmamap_load with
M_NOWAIT, and create dma maps BUS_DMA_ALLOCNOW.
- if a receive descriptor has a NULL mbuf try to allocate a new one, don't
try to receive it.
on a patch from fire crow on tech-net with additional bpf & detach fixes,
module support, and a match for 8152 v2.0 devices.
alc0 at pci3 dev 0 function 0: Attansic/Atheros L1C/L2C Ethernet
alc0: ioapic0 pin 17
alc0: Ethernet address 00:26:6c:9e:d4:c1
ukphy0 at alc0 phy 0: L2 10/100 PHY (OUI 0x00c82e, model 0x0002), rev. 5
ukphy0: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, 1000baseT-FDX, auto
Increase the delay between setting the command register and reading the
status register. Reset the smbus controller if it has timed out.
Tested on an IBM eServer x335.
- fix an off-by-one in block size calculation
- add register definitions from HDA034-A2, HDA035-A, HDA036-A
- rename hdaudio_afg_* symbols to hdafg_*
- add experimental HDMI and DisplayPort support code (needs help from DRM)
- don't poll the RIRB unless cold
- add support for unsolicited messages
- 'hdaudioctl graph' works again
- print each assoc's widget tree when boot -x
rev 1.186. This makes the following hardware find its PHY again, and I can't
see how these larger delays could be a problem for other hardware:
wm0 at pci6 dev 7 function 0: Intel i82541GI 1000BASE-T Ethernet, rev. 5
wm0: interrupting at ioapic2 pin 0, event channel 5
wm0: 32-bit 66MHz PCI bus
wm0: 65536 word (16 address bits) SPI EEPROM
wm0: Ethernet address 00:13:72:54:ee:13
igphy0 at wm0 phy 1: Intel IGP01E1000 Gigabit PHY, rev. 0
igphy0: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, 1000baseT, 1000baseT-FDX, auto
factorize offset computation. Inspired from OpenBSD and Intel docs.
Note: agp_i810_bind/unbind_page will now fail with EINVAL if the
physical address is too large for the chipset (instead of silently
truncating it).
ok jmcneill@
as found in the vortex86 SoCs (http://www.vortex86dx.com).
Ported from freebsd.
Not added to amd64's GENERIC because this CPU is 32bit only.
thanks to DM&P Electronics, Inc for providing documentation and sample
devices for this work.
pointer but those don't use alternative MAC address in reality. So we check
whether the broadcast bit is set or not like Intel's e1000 driver.
Fixes PR kern/44072 reported by Jean-Yves Moulin.
Remove extra Warning for newer cards.
resemble its CardBus attachment very, very closely: slightly more than
24 lines are different. Alas, I cannot commit the CardBus part of this
change, yet, because I have to finish my overhaul of CardBus resource
handling, first.
http://www.openbsd.org/cgi-bin/cvsweb/src/sys/dev/pci/if_nfe.c#rev1.97
>> Some nfe(4)/rlphy(4) combos don't work, because the PHY responds to all
>> addresses on the mii bus. As a countereasure, only attach the first PHY we
>> encounter. It is very unlikely we're going to ever see nfe(4) with multiple
>> PHYs. The same is probably true for any modern NIC.
Should suppress bogus ukphy30 noted in PR kern/42950.
No bad side effect on my nfe(4) which didn't get ghosts:
---
nfe0 at pci0 dev 5 function 0: NVIDIA nForce3 Ethernet #4 (rev. 0xa2)
:
rlphy0 at nfe0 phy 1: RTL8201L 10/100 media interface, rev. 1
rlphy0: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, auto
It returns the bus id and allows userland (like Xorg) to create mapping
of ttyE? and bus id. For now only PCI is implemented.
First discussed with macallan@ then public on tech-kern@ and tech-x11@
- Fix register address in ale_phy_reset(). from linux
- Fix mask value in ale_stop_mac().
- Fix multicast handling. from openbsd
- Fix phy reset handling.
- rename to ppb_fix_pcie
- support version PCI-E 2.0
- print version and device/port type information
- use constants from pcireg.h instead of magic numbers
changes:
ppb2 at pci0 dev 21 function 0: vendor 0x15ad product 0x07a0 (rev. 0x01)
ppb2: unsupported PCI Express version
to:
ppb2 at pci0 dev 21 function 0: vendor 0x15ad product 0x07a0 (rev. 0x01)
ppb2: PCI Express 2.0 <Root Port of PCI-E Root Complex>
