Add Intel SCH IDE controller driver.
From OpenBSD via Tomokazu HARADA in PR#42310.
This commit is contained in:
jakllsch
parent
35d76c69ca
commit
31471141e4
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@ -1,4 +1,4 @@
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# $NetBSD: files.pci,v 1.330 2010/11/03 00:49:02 macallan Exp $
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# $NetBSD: files.pci,v 1.331 2010/11/06 14:56:12 jakllsch Exp $
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#
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# Config file and device description for machine-independent PCI code.
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# Included by ports that need it. Requires that the SCSI files be
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@ -309,6 +309,11 @@ device satalink: ata, ata_dma, ata_udma, pciide_common, wdc_common, sata
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attach satalink at pci
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file dev/pci/satalink.c satalink
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# Intel SCH IDE controllers
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device schide: ata, ata_dma, ata_udma, pciide_common, wdc_common
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attach schide at pci
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file dev/pci/schide.c schide
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# SiS IDE controllers
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device siside: ata, ata_dma, ata_udma, pciide_common, wdc_common
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attach siside at pci
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@ -0,0 +1,41 @@
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/* $NetBSD: pciide_sch_reg.h,v 1.1 2010/11/06 14:56:12 jakllsch Exp $ */
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/* $OpenBSD: pciidereg.h,v 1.9 2009/10/13 22:05:13 jsg Exp $ */
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/*
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* Copyright (c) 1998 Christopher G. Demetriou. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Christopher G. Demetriou
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* for the NetBSD Project.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#define SCH_D0TIM 0x80
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#define SCH_D1TIM 0x84
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#define SCH_TIM_UDMA 0x70000
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#define SCH_TIM_MDMA 0x00300
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#define SCH_TIM_PIO 0x00007
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#define SCH_TIM_SYNCDMA (1 << 31)
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#define SCH_TIM_MASK (SCH_TIM_UDMA | SCH_TIM_MDMA | SCH_TIM_PIO)
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@ -0,0 +1,222 @@
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/* $NetBSD: schide.c,v 1.1 2010/11/06 14:56:12 jakllsch Exp $ */
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/* $OpenBSD: pciide.c,v 1.305 2009/11/01 01:50:15 dlg Exp $ */
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/*
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* Copyright (c) 1999, 2000, 2001 Manuel Bouyer.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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/*
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* Copyright (c) 1996, 1998 Christopher G. Demetriou. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Christopher G. Demetriou
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* for the NetBSD Project.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: schide.c,v 1.1 2010/11/06 14:56:12 jakllsch Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcidevs.h>
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#include <dev/pci/pciidereg.h>
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#include <dev/pci/pciidevar.h>
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#include <dev/pci/pciide_sch_reg.h>
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static void sch_chip_map(struct pciide_softc*, struct pci_attach_args*);
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static void sch_setup_channel(struct ata_channel*);
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static int schide_match(device_t, cfdata_t, void *);
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static void schide_attach(device_t, device_t, void *);
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CFATTACH_DECL_NEW(schide, sizeof(struct pciide_softc),
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schide_match, schide_attach, NULL, NULL);
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static const struct pciide_product_desc pciide_sch_products[] = {
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{ PCI_PRODUCT_INTEL_SCH_IDE,
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0,
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"Intel SCH IDE Controller",
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sch_chip_map,
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},
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{ 0,
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0,
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NULL,
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NULL
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}
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};
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static int
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schide_match(device_t parent, cfdata_t match, void *aux)
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{
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struct pci_attach_args *pa = aux;
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if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_INTEL) {
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if (pciide_lookup_product(pa->pa_id, pciide_sch_products))
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return (2);
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}
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return (0);
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}
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static void
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schide_attach(device_t parent, device_t self, void *aux)
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{
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struct pci_attach_args *pa = aux;
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struct pciide_softc *sc = device_private(self);
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sc->sc_wdcdev.sc_atac.atac_dev = self;
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pciide_common_attach(sc, pa,
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pciide_lookup_product(pa->pa_id, pciide_sch_products));
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}
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static void
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sch_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa)
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{
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struct pciide_channel *cp;
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pcireg_t interface;
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int channel;
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if (pciide_chipen(sc, pa) == 0)
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return;
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aprint_verbose_dev(sc->sc_wdcdev.sc_atac.atac_dev,
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"bus-master DMA support present");
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pciide_mapreg_dma(sc, pa);
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aprint_verbose("\n");
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sc->sc_wdcdev.sc_atac.atac_cap = ATAC_CAP_DATA16 | ATAC_CAP_DATA32;
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if (sc->sc_dma_ok) {
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sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DMA | ATAC_CAP_UDMA;
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sc->sc_wdcdev.irqack = pciide_irqack;
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}
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sc->sc_wdcdev.sc_atac.atac_pio_cap = 4;
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sc->sc_wdcdev.sc_atac.atac_dma_cap = 2;
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sc->sc_wdcdev.sc_atac.atac_udma_cap = 5;
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sc->sc_wdcdev.sc_atac.atac_set_modes = sch_setup_channel;
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sc->sc_wdcdev.sc_atac.atac_channels = sc->wdc_chanarray;
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sc->sc_wdcdev.sc_atac.atac_nchannels = 1;
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ATADEBUG_PRINT(("sch_setup_chip: old d0tim=0x%x, d1tim=0x%x\n",
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pci_conf_read(sc->sc_pc, sc->sc_tag, SCH_D0TIM),
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pci_conf_read(sc->sc_pc, sc->sc_tag, SCH_D1TIM)),
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DEBUG_PROBE);
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interface = PCI_INTERFACE(pa->pa_class);
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wdc_allocate_regs(&sc->sc_wdcdev);
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for (channel = 0; channel < sc->sc_wdcdev.sc_atac.atac_nchannels;
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channel++) {
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cp = &sc->pciide_channels[channel];
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if (pciide_chansetup(sc, channel, interface) == 0)
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continue;
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pciide_mapchan(pa, cp, interface, pciide_pci_intr);
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}
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ATADEBUG_PRINT(("sch_setup_chip: d0tim=0x%x, d1tim=0x%x\n",
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pci_conf_read(sc->sc_pc, sc->sc_tag, SCH_D0TIM),
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pci_conf_read(sc->sc_pc, sc->sc_tag, SCH_D1TIM)),
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DEBUG_PROBE);
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}
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static void
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sch_setup_channel(struct ata_channel *chp)
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{
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struct ata_drive_datas *drvp;
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u_int32_t tim, timaddr, idedma_ctl;
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struct atac_softc *atac = chp->ch_atac;
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struct pciide_channel *cp = CHAN_TO_PCHAN(chp);
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struct pciide_softc *sc = CHAN_TO_PCIIDE(chp);
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int drive, s;
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idedma_ctl = 0;
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/* setup DMA if needed */
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pciide_channel_dma_setup(cp);
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/* Per drive settings */
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for (drive = 0; drive < 2; drive++) {
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drvp = &chp->ch_drive[drive];
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/* If no drive, skip */
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if ((drvp->drive_flags & DRIVE) == 0)
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continue;
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timaddr = (drive == 0) ? SCH_D0TIM : SCH_D1TIM;
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tim = pci_conf_read(sc->sc_pc, sc->sc_tag, timaddr);
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tim &= ~SCH_TIM_MASK;
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if (((drvp->drive_flags & DRIVE_DMA) == 0 &&
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(drvp->drive_flags & DRIVE_UDMA) == 0))
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goto pio;
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/* add timing values, setup DMA if needed */
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if ((atac->atac_cap & ATAC_CAP_UDMA) &&
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(drvp->drive_flags & DRIVE_UDMA)) {
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/* use Ultra/DMA */
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tim |= (drvp->UDMA_mode << 16) | SCH_TIM_SYNCDMA;
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} else {
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/* use Multiword DMA */
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s = splbio();
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drvp->drive_flags &= ~DRIVE_UDMA;
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splx(s);
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tim &= ~SCH_TIM_SYNCDMA;
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}
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idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive);
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pio: /* use PIO mode */
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tim |= (drvp->DMA_mode << 8) | (drvp->PIO_mode);
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pci_conf_write(sc->sc_pc, sc->sc_tag, timaddr, tim);
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}
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if (idedma_ctl != 0) {
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/* Add software bits in status register */
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bus_space_write_1(sc->sc_dma_iot, cp->dma_iohs[IDEDMA_CTL], 0,
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idedma_ctl);
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}
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}
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