- fix 8 bit support and run the console in 8 bit for a little extra speed
- fix colour oddities seen occasionally on sparc64 - try to use firmware DAC wiring until we figure out what's wrong TODO: - find out why radeonfb gets the DAC wiring ass-backwards on my xvr-100 while Xorg's radeon driver gets it right - find out why reverse characters aren't drawn in reverse tested on macppc and sparc64
This commit is contained in:
macallan
parent
63f1e79c2b
commit
3bc68298fb
@ -1,4 +1,4 @@
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/* $NetBSD: radeonfb.c,v 1.35 2010/05/04 05:00:33 macallan Exp $ */
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/* $NetBSD: radeonfb.c,v 1.36 2010/08/17 18:53:16 macallan Exp $ */
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/*-
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* Copyright (c) 2006 Itronix Inc.
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@ -70,9 +70,9 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: radeonfb.c,v 1.35 2010/05/04 05:00:33 macallan Exp $");
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__KERNEL_RCSID(0, "$NetBSD: radeonfb.c,v 1.36 2010/08/17 18:53:16 macallan Exp $");
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#define RADEONFB_DEFAULT_DEPTH 32
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#define RADEONFB_DEFAULT_DEPTH 8
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#include <sys/param.h>
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#include <sys/systm.h>
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@ -181,7 +181,7 @@ static const struct videomode *radeonfb_port_mode(struct radeonfb_softc *,
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static int radeonfb_drm_print(void *, const char *);
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#ifdef RADEON_DEBUG
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#ifdef RADEONFB_DEBUG
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int radeon_debug = 1;
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#define DPRINTF(x) \
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if (radeon_debug) printf x
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@ -200,6 +200,8 @@ int radeon_debug = 1;
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#define RADEON_DEFAULT_MODE "1024x768x60"
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#endif
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extern const u_char rasops_cmap[768];
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const char *radeonfb_default_mode = RADEON_DEFAULT_MODE;
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static struct {
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@ -549,6 +551,7 @@ radeonfb_attach(device_t parent, device_t dev, void *aux)
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PRINTREG(RADEON_BIOS_4_SCRATCH);
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PRINTREG(RADEON_FP_GEN_CNTL);
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sc->sc_fp_gen_cntl = GET32(sc, RADEON_FP_GEN_CNTL);
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PRINTREG(RADEON_FP2_GEN_CNTL);
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PRINTREG(RADEON_TMDS_CNTL);
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PRINTREG(RADEON_TMDS_TRANSMITTER_CNTL);
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@ -662,7 +665,18 @@ radeonfb_attach(device_t parent, device_t dev, void *aux)
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RADEON_FP_TMDS_EN |
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RADEON_FP_CRTC_DONT_SHADOW_VPAR |
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RADEON_FP_CRTC_DONT_SHADOW_HEND);
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CLR32(sc, RADEON_FP_GEN_CNTL, RADEON_FP_SEL_CRTC2);
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/*
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* XXX
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* no idea why this is necessary - if I do not clear this bit on my
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* iBook G4 the screen remains black, even though it's already clear.
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* It needs to be set on my Sun XVR-100 for the DVI port to work
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*/
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if (sc->sc_fp_gen_cntl & RADEON_FP_SEL_CRTC2) {
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SET32(sc, RADEON_FP_GEN_CNTL, RADEON_FP_SEL_CRTC2);
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} else
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CLR32(sc, RADEON_FP_GEN_CNTL, RADEON_FP_SEL_CRTC2);
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if (HAS_CRTC2(sc))
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SET32(sc, RADEON_FP2_GEN_CNTL, RADEON_FP2_SRC_SEL_CRTC2);
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@ -802,7 +816,7 @@ radeonfb_attach(device_t parent, device_t dev, void *aux)
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goto error;
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}
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printf("init engine\n");
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DPRINTF("init engine\n");
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/* XXX: this seems suspicious - per display engine
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initialization? */
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radeonfb_engine_init(dp);
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@ -854,11 +868,14 @@ radeonfb_attach(device_t parent, device_t dev, void *aux)
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#endif
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if (dp->rd_console) {
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radeonfb_modeswitch(dp);
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wsdisplay_cnattach(dp->rd_wsscreens, ri, 0, 0,
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defattr);
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#ifdef SPLASHSCREEN
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splash_render(&dp->rd_splash,
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SPLASH_F_CENTER|SPLASH_F_FILL);
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#else
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vcons_replay_msgbuf(&dp->rd_vscreen);
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#endif
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#ifdef SPLASHSCREEN_PROGRESS
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@ -897,6 +914,7 @@ radeonfb_attach(device_t parent, device_t dev, void *aux)
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aa.accesscookie = &dp->rd_vd;
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config_found(&sc->sc_dev, &aa, wsemuldisplaydevprint);
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radeonfb_blank(dp, 0);
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/* Initialise delayed lvds operations for backlight. */
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@ -905,6 +923,15 @@ radeonfb_attach(device_t parent, device_t dev, void *aux)
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radeonfb_lvds_callout, dp);
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}
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/*
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* if we have console output via firmware like on sparc64 it may
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* interfere with DAC programming so program the palette again
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* here after we took over
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*/
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radeonfb_init_palette(sc, 0);
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if (HAS_CRTC2(sc))
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radeonfb_init_palette(sc, 1);
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pmf_event_register(dev, PMFE_DISPLAY_BRIGHTNESS_UP,
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radeonfb_brightness_up, TRUE);
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pmf_event_register(dev, PMFE_DISPLAY_BRIGHTNESS_DOWN,
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@ -1000,7 +1027,7 @@ radeonfb_ioctl(void *v, void *vs,
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if ((dp->rd_wsmode == WSDISPLAYIO_MODE_EMUL) &&
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(dp->rd_vd.active)) {
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radeonfb_engine_init(dp);
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//radeonfb_modeswitch(dp);
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radeonfb_modeswitch(dp);
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vcons_redraw_screen(dp->rd_vd.active);
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}
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}
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@ -1423,7 +1450,7 @@ radeonfb_calc_dividers(struct radeonfb_softc *sc, uint32_t dotclock,
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}
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#if 0
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#ifdef RADEON_DEBUG
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#ifdef RADEONFB_DEBUG
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static void
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dump_buffer(const char *pfx, void *buffer, unsigned int size)
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{
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@ -1873,7 +1900,7 @@ radeonfb_modeswitch(struct radeonfb_display *dp)
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int i;
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/* blank the display while we switch modes */
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//radeonfb_blank(dp, 1);
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radeonfb_blank(dp, 1);
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#if 0
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SET32(sc, RADEON_CRTC_EXT_CNTL,
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@ -1898,7 +1925,7 @@ radeonfb_modeswitch(struct radeonfb_display *dp)
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radeonfb_setcrtc(dp, i);
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/* activate the display */
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//radeonfb_blank(dp, 0);
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radeonfb_blank(dp, 0);
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}
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void
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@ -2311,11 +2338,28 @@ radeonfb_init_palette(struct radeonfb_softc *sc, int crtc)
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CLR32(sc, RADEON_DAC_CNTL2, RADEON_DAC2_PALETTE_ACC_CTL);
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PUT32(sc, RADEON_PALETTE_INDEX, 0);
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for (i = 0; i <= CLUT_WIDTH; ++i) {
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PUT32(sc, RADEON_PALETTE_30_DATA,
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(CLUT_COLOR(i) << 10) |
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(CLUT_COLOR(i) << 20) |
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(CLUT_COLOR(i)));
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if (sc->sc_displays[crtc].rd_bpp == 0)
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sc->sc_displays[crtc].rd_bpp = RADEONFB_DEFAULT_DEPTH;
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if (sc->sc_displays[crtc].rd_bpp == 8) {
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/* ANSI palette */
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int j = 0;
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for (i = 0; i <= CLUT_WIDTH; ++i) {
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PUT32(sc, RADEON_PALETTE_30_DATA,
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(rasops_cmap[j] << 22) |
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(rasops_cmap[j + 1] << 12) |
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(rasops_cmap[j + 2] << 2));
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j += 3;
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}
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} else {
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/* linear ramp */
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for (i = 0; i <= CLUT_WIDTH; ++i) {
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PUT32(sc, RADEON_PALETTE_30_DATA,
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(CLUT_COLOR(i) << 10) |
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(CLUT_COLOR(i) << 20) |
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(CLUT_COLOR(i)));
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}
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}
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CLR32(sc, RADEON_DAC_CNTL2, RADEON_DAC2_PALETTE_ACC_CTL);
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@ -2724,6 +2768,7 @@ radeonfb_engine_init(struct radeonfb_display *dp)
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{
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struct radeonfb_softc *sc = dp->rd_softc;
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uint32_t pitch;
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volatile uint32_t junk;
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/* no 3D */
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PUT32(sc, RADEON_RB3D_CNTL, 0);
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@ -2752,6 +2797,7 @@ radeonfb_engine_init(struct radeonfb_display *dp)
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#else
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CLR32(sc, RADEON_DP_DATATYPE, RADEON_HOST_BIG_ENDIAN_EN);
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#endif
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junk = GET32(sc, RADEON_DP_DATATYPE);
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/* default scissors -- no clipping */
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radeonfb_wait_fifo(sc, 1);
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@ -1,4 +1,4 @@
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/* $NetBSD: radeonfbvar.h,v 1.7 2009/07/28 00:10:51 macallan Exp $ */
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/* $NetBSD: radeonfbvar.h,v 1.8 2010/08/17 18:53:16 macallan Exp $ */
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/*-
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* Copyright (c) 2006 Itronix Inc.
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@ -273,6 +273,7 @@ struct radeonfb_softc {
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uint8_t *sc_bios;
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bus_size_t sc_biossz;
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uint32_t sc_fp_gen_cntl;
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char sc_modebuf[64];
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const char *sc_defaultmode;
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