contain information suitable for allowing other parts of the kernel
to determine if a memory region is aligned to the largest data cache
line size present in the system.
Add a mips_dcache_compute_align() function which must be called whenever
one of the data cache line size variables is changed, in order to
compute mips_dcache_align and mips_dcache_align_mask.
executable mappings. Stop overloading VTEXT for this purpose (VTEXT
also has another meaning).
- Rename vn_marktext() to vn_markexec(), and use it when executable
mappings of a vnode are established.
- In places where we want to set VTEXT, set it in v_flag directly, rather
than making a function call to do this (it no longer makes sense to
use a function call, since we no longer overload VTEXT with VEXECMAP's
meaning).
VEXECMAP suggested by Chuq Silvers.
the etc Makefile override that by putting USETOOLS into $.MAKEOVERRIDES
This way the default for kernel compiles is still to use the installed
toolchain instead of depending on $TOOLDIR. $TOOLDIR can be used by
simply adding USETOOLS=yes to the command line as usual.
Adjust each ports template to set the default no setting and also pull in
bsd.own.mk if they weren't already to ensure they'll build correctly
with the new toolchain setup.
COP0_SYNC
In R5900 mtc0, tlbr, tlbp, tlbwi, tlbwr must be followed by sync.p.
if defined MIPS3_5900, COP0_SYNC is defined as sync.p. else nothing.
IPL_ICU_MASK
mask interrupt directly ICU instead of SR.IM.
I've added this feature to support software interrupt for R5900.
and this option may be useful for platform which has cascaded ICU.
kernel compile flags as well as "-mlong-calls" so that calls from the
LKM in KSEG2 work to the kernel in KSEG0.
MIPS LKMs now build and can be loaded with the right Magick command line
args to modload(8). Changes to modload coming...
Thanks to Chris Demetriou for pointing out the -mlong-calls gcc option
that had been staring me in the face all along.
use command line parameters to ld(1) instead to set the endian format.
Clean up some endian decisions in mips/conf/Makefile.mips.
Wrap some long lines.
format specific.
Struct emul has a e_setregs hook back, which points to emulation-specific
setregs function. es_setregs of struct execsw now only points to
optional executable-specific setup function (this is only used for
ECOFF).
This will allow improvements to the pmaps so that they can more easily defer expensive operations, eg tlb/cache flush, til the last possible moment.
Currently this is a no-op on most platforms, so they should see no difference.
Reviewed by Jason.
need to check for curproc being non-NULL since none of the pmap
interfaces which are legal to use in interrupt handlers use this macro.
- use the hit op when flushing the cache in pmap_kremove().
- avoid trusting the optimizer in pmap_clear_reference().
- fix pmap_clear_modify() to reset the mod-bit emulation so we can
detect further modifications to the page, also flushing the cache
for any mappings which might have dirty lines.
passed which is larger than an int but has int alignment. As well as
fixing the described problem, this is the same way it is handled in the
Irix and Ultrix header files.
Problem and suggested solution by Uros Prestor in port-mips mailling
list.
remove some checks for impossible conditions.
in pmap_enter(), only call pmap_remove() to remove an existing mapping
if there actually is an existing mapping.
in pmap_remove_pv(), don't flush the MIPS1 cache when removing the last mapping.
this was added in rev 1.97, to avoid stale data being left in the cache
when the page is zeroed bypassing the cache in pmap_zero_page_uncached().
we've since found that bypassing the cache for idle-loop page zeroing
doesn't work very well anyway, so we don't do that anymore.
so now we can remove the extra cache-flush.
remove pmap_zero_page_uncached() while I'm thinking of it.
various other cleanup.
interrupt to sneak in after EXL had been set; the interrupt EPC was stale
as PC isn't saved if EXL is set, causing the eret to return to the wrong
place and leading to kernel-mode TLB misses on user addresses. The bug
was discovered by the japanese NetBSD/*mips folks and the same fix was
found independently by shinohara-san (shin@netbsd.org).
- Use pools for pmap structures and pv_entry structures.
- Remove a bunch of splvm()/splx(), no longer needed now that
pmap_kenter_pa() and pmap_kremove() are as they should be.
Mostly from Chuck Silvers.
there are just far too many combinations to handle with magic
#ifdefs in any sane way. Also, add a HitFlushDCache op to the
"locoresw", and fill it in as appropriate (it's NULL on MIPS-I,
so watch out).
These changes ensure that my R4600 Indy (with 2-way cache) gets
the correct cache ops when the kernel is built with only MIPS3
support, resulting in a kernel that is significantly more stable.
distinguished by SYSID register in the system controller. Note
that PRiD 0x20 is for a standalone RC32364 processor which has the
same 32300 core inside. Rather better to name them MIPS32 ISA.
(I have a nice 'install' target for cobalts here, but that only works there.
I guess I'll put that into htdocs now that the cobalt port uses Makefile.mips)
What's wrong; the initial SR value in pcb0 gets overwritten before
the first kthread_create1() is called. For a normal process which
has user mode it doesn't matter because proc_trampoline() makes
the process to have spl0 during exception return path to user mode,
however, kthreads stay in kernel mode mistakenly left in splhigh
condition. The trouble is visible as severe clock drifts when
system activity is high.
is created. System kthreads are mistakenly left splhigh state.
pcb0 has an initial SR value for spl0 condition which are expected to
be propagated to all of children
- use "U" suffix for unsigned constants
- use "L" suffix for long constants
- use "UL" suffix for unsigned long constants
- use hexadecimal instead of decimal
Fixes build problems with vi (now that warnings/errors are enabled) on
mips, powerpc and arm platforms.
each vm_page structure. Add a VM_MDPAGE_INIT() macro to init this
data when pages are initialized by UVM. These macros are mandatory,
but ports may #define them to nothing if they are not needed/used.
This deprecates struct pmap_physseg. As a transitional measure,
allow a port to #define PMAP_PHYSSEG so that it can continue to
use it until its pmap is converted to use VM_MDPAGE_MEMBERS.
Use all this stuff to eliminate a lot of extra work in the Alpha
pmap module (it's smaller and faster now). Changes to other pmap
modules will follow.
to <sys/types.h> and <sys/stdint.h>.
* Add a new C99 <stdint.h> header, which provides integer types of
explicit width, related limits and integer constant macros.
* Extend <inttypes.h> to provide <stdint.h> definitions and format
macros for printf() and scanf().
* Add C99 strtoimax() and strtoumax() functions.
* Use the latter within scanf().
* Add C99 %j, %t and %z printf()/scanf() conversions for
intmax_t, pointer-type and size_t arguments.
- pmap_enter()
- pmap_remove()
- pmap_protect()
- pmap_kenter_pa()
- pmap_kremove()
as described in pmap(9).
These calls are relatively conservative. It may be possible to
optimize these a little more.
calling pmap_steal_memory() directly. On these platforms, since
uvm_pageboot_alloc() is a wrapper around pmap_steal_memory(), there
is no functional change. This is merely for API consistency.
which have pmap_steal_memory(). This is to reduce the API differences
between pmaps that implement pmap_steal_memory() and pmaps which do
not.
Note that pmap_steal_memory() needs to adjust *vstartp and/or
*vendp only if it used addresses within the range provided to UVM
via the pmap_virtual_space() call. I.e. it is not necessary to do
so in any current pmap_steal_memory() implementation.
call overhead is incurred as we start sprinkling pmap_update() calls
throughout the source tree (no pmaps currently defer operations, but
we are adding the infrastructure to allow them to do so).
when error is ERESTART. otherwise, user process will re-issue syscall
with broken system call number and get SIGSYS signal and terminate.
patch made by Jason R Thorpe <thorpej@zembu.com>. tested by me.
and link it directly to db_command_table[] so that it's not necessary
to do this at runtime. Make db_machine_command_table[] const on all ports.
g/c now unneded stuff, like db_machine_commands_install(), db_machine_init()
Patch written by enami.
as hacked by mycroft.
- Use syscall_intern() to give a process a plain or fancy
syscall based on ktrace flags.
- Avoid copying from the trapframe into a local array as much
as possible.
Yields roughly 5% improvement on a 25MHz R3000 (DECstation 5000/200)
on a simple syscall benchmark.
There's still some work that can be done using __HAVE_MINIMAL_EMUL.
XXX if you have libc after citrus locale import, please recompile libc,
and your applications that use mbstate_t (rather rare). really sorry
for the mess.
only signal handler array sharable between threads
move other random signal stuff from struct proc to struct sigctx
This addresses kern/10981 by Matthew Orgass.
* move all exec-type specific information from struct emul to execsw[] and
provide single struct emul per emulation
* elf:
- kern/exec_elf32.c:probe_funcs[] is gone, execsw[] how has one entry
per emulation and contains pointer to respective probe function
- interp is allocated via MALLOC() rather than on stack
- elf_args structure is allocated via MALLOC() rather than malloc()
* ecoff: the per-emulation hooks moved from alpha and mips specific code
to OSF1 and Ultrix compat code as appropriate, execsw[] has one entry per
emulation supporting ecoff with appropriate probe function
* the makecmds/probe functions don't set emulation, pointer to emulation is
part of appropriate execsw[] entry
* constify couple of structures
running with multi-way caches. Since we know the ops will mostly
hit as we just dirtied those lines a single hit op is cheaper than
an index op for each way.
only allowing one mapping at a time instead of mapping uncached. Done
by removing conflicting mappings from the pmap when entering a new
mapping. UVM will remember and re-fault the requested page when needed
for the original mapping. Originally done to support our internal machine
that does not support uncached memory completely. Not enabled by default
currently. It may make sense to try on the cobalt or sgi ports.
the page is wired down. Flushing both halves of a wired TLB entry resulted
in hangs when in programs called for and released kernel memory
soon after being invoked. In particular, we see this when single-stepping
a process using GDB.
It would be better if we could arrange to use both halves of the TLB
entry for the PCB, but for some reason we frequently end up with things
on an odd page boundary.
pmap_enter() cannot allocate the segmap return failure if PMAP_CANFAIL
instead of sleeping. Otherwise panic. Both alpha and i386 do this. Do
not pmap_enter_pv() until after this is done so the data structures are
not partially allocated. This should prevent pmap_page_protect() from
getting stuck when called from pagedaemon.
for mips_read_statusreg (which was apparently never implemented).
Provide prototypes and implementations for mips_cp0_cause_write,
mips_cp0_status_read, and mips_cp0_status_write. (Writing can, of
course, be quite dangerous.)
with a MIPS4 option at this point -- all the code except for one single
spot is conditionalized with MIPS3. So, don't even pretend about
MIPS4 for now, until it all gets cleaned up.
for mips3 (and later) 'ld' and 'sd' instructions. These currently
only are properly implemented for the _MIPS_BSD_API_LP32 and
_MIPS_BSD_API_LP32_64CLEAN 'API's. They're pretty messy, but when you
need them, you really need them.
you do not save it and pass it along in rval the system will start
to fail running user programs. This finishes the suggestion by cgd to
not save some registers on syscall entry.
that the page being zero'd was not completed and that page zeroing
should be aborted. This may be used by machine-dependent code doing
slow page access to reduce the latency of running a process that has
become runnable while in the middle of doing a slow page zero.
uch