Commit Graph

1263 Commits

Author SHA1 Message Date
simonb f38d391749 Add support for MIPS32 and MIPS64 architectures:
- Add mips32 and mips64 locore function prototypes.
 - Add mips3_lw_a64() and mips3_sw_a64() for access data at any
   64bit address (from Broadcom Corp).
 - Add Broadcom and Sandcraft CPU company ids.
2002-03-05 15:36:51 +00:00
simonb 2fab526863 Add support for MIPS32 and MIPS64 architectures:
- Add XKPHYS macros (from Broadcom Corp).
 - Add some r5900 register bit definitions.
 - Add extra exception vector addresses for mips32/mips64 and r5900.
 - Make the mips cp0 register definitions available from both asm and C.
 - Add some Alchemy and Sandcraft CPU ids.
 - Add r3000, tx39xx and r4x00 CPU revision ids.
 - Remove defines for the number of TLBs on some CPUs.
2002-03-05 15:35:22 +00:00
simonb 60fe625bd0 Add support for MIPS32 and MIPS64 architectures:
- Clean up (somewhat) mips1 vs mips3+ configuration.
   XXX:  this is still quite messy.
 - Add cpu frequency info to struct cpu_info.
 - ANSIfy.
2002-03-05 15:34:04 +00:00
simonb ef0fcacb94 ANSIfy. 2002-03-05 15:12:58 +00:00
simonb 8070cbd848 Add 4way 16/32-byte-line cache op primitives. 2002-03-05 14:32:26 +00:00
simonb e8e49d677b Don't explicitly depend locore_*.S and fp.S on assym.h - this is done
for all .S files in /sys/conf/Makefile.kern.inc.
2002-03-05 14:28:31 +00:00
simonb 7bd5992f7a Fix for when we have 64 bit registers enabled for userland (but still
using the o32 API).
2002-03-05 14:23:50 +00:00
simonb 4a931bedb8 KNF whitespace. 2002-03-05 14:21:32 +00:00
simonb 59f53aab95 The 64-bit safe, ILP32 o32 model is safe with the current stdarg
implementation.
2002-03-05 14:18:12 +00:00
simonb 836b7ec262 Include <machine/cdefs.h> to select 32/64bit APIs. 2002-03-05 14:17:16 +00:00
simonb b2fb45331b ANSIfy. 2002-03-05 14:08:43 +00:00
simonb 58faa5f0ca Clean up #ifdef checks a little. 2002-03-05 14:08:07 +00:00
simonb 6f0fb25121 Don't need to declare phys_map - it is declared in <uvm/uvm_extern.h>. 2002-03-04 02:43:22 +00:00
simonb 4324f37586 Use "#define<tab>". 2002-02-28 03:17:23 +00:00
christos e8116a8f5b - Use DEV_ constants, instead of documenting the numbers!
- Delete cdev_decl(mm); where appropriate, and other hand-crufting [hi powerpc!]
2002-02-27 01:20:51 +00:00
simonb e19a9be04b Note that "addu $x, $y, $0" is a "move" only in 32-bit mode.
XXX: need to revisit this.
2002-02-22 16:18:36 +00:00
simonb 2d8577fb83 Clean up some rampant code duplication wrt ieee number handling:
- Add alignment-safe double and float unions.
 - Use the above for the __infinity and __nan constants on all
   architectures that use the standard ieee754 representation of
   those constants.
 - Add a single copy of various ieee754 math functions (frexp, isinf,
   isnan, ldexp and modf) that had numerous duplicates among the
   arch-specific directories.
 - Use the above functions on all architectures where the generic C
   versions where used.  Architectures that had local assembly
   routines are untouched (for those functions only).
2002-02-19 13:08:12 +00:00
simonb 4a188395df Make the ddb_regs declaration an extern in db_machdep.h and declare it on
db_interface.c.
2002-02-15 07:32:34 +00:00
thorpej 90544559d3 Don't put `frompc' into a0 in the delay slot of the __mcount
call; `jal __mcount' might be expanded by the assembler, and
thus a bogus `frompc' value could be passed.
2002-02-05 07:12:20 +00:00
manu 97db5a818c Added errno translation for non native OSes emulation (IRIX, Linux, Ultrix) 2002-02-02 20:28:59 +00:00
uch 715eb97754 remove unused variable. 2002-01-30 16:10:08 +00:00
uch e3ba66bfd4 move TX39 specific cache configuration code to cache.c 2002-01-30 16:09:29 +00:00
shin 69d0f55255 add VR4131 cache-op bug workaround code.
we can't use Hit_WriteBack_Invalidate.
2002-01-19 04:25:36 +00:00
soren 07e21646eb Options MIPS3_5200 and MIPS3_L2CACHE_PRESENT are gone. 2002-01-14 19:07:16 +00:00
enami 5c12da5b4a Define new macro to access FSR register and use it. 2002-01-12 01:40:36 +00:00
enami 16fc46b962 Access FSR register correctly in struct fpreg.r_regs[].
This fixes sshd (actually, libcrypto) failure with new-toolchain.
2002-01-12 01:37:08 +00:00
thorpej 94f30b739f Add the BONITO_ICU_RETRYERR bit. 2002-01-09 02:35:29 +00:00
thorpej 4928315412 Update copyright. 2002-01-09 00:44:06 +00:00
thorpej d25ffb2822 Add code to manipulate the BONITO I/O Buffer Cache. 2002-01-09 00:43:38 +00:00
shin a0a83ff5d4 fix pasto.
s/trunc_line/trunc_line16/
2002-01-07 07:43:52 +00:00
takemura eef721771a Modify only K0 bits and save other bits. (HPCMIPS_L1CACHE_DISABLE) 2002-01-04 09:26:39 +00:00
uch e4130f57f1 _intr_suspend and _intr_resume declarations are moved to intr.h. 2002-01-02 12:36:20 +00:00
shin b7e3f7d6e3 R4000/R4400 always detects virtual alias as if
primary cache size is 32KB. Actual primary cache size
is ignored wrt VCED/VCEI.
2001-12-28 04:06:06 +00:00
shin f15b256063 check if curproc is invalid, and do panic.
otherwise, we can't useful backtrace.
Ex. address error in interrupt handler.
2001-12-28 02:13:14 +00:00
shin ae12ee76a0 add #ifdef DEBUG around VCED_count etc. 2001-12-27 22:55:46 +00:00
shin 606f00a905 split VCED and VCEI. 2001-12-27 04:19:17 +00:00
shin d00d2e4bcb simplify VCED processing.
just write back and invalidate secondary cache line and fetch data again.
2001-12-27 04:03:37 +00:00
takemura 490f777a1f Added Vr4131 support. 2001-12-23 13:10:46 +00:00
thorpej 51535d4bf5 Add support for dumping ELF-cormat core files. 2001-12-09 23:05:56 +00:00
atatat b45c51b1fc Roll the rest of the ports over to the new MI kernel build machinery.
Any problems reported by testers have been fixed, and massive
cross-compiling of kernels has shown that any problems that remain
with actually building kernels are not related to this.
2001-12-09 05:00:40 +00:00
manu 342f5317b0 Added IRIX signal trampoline 2001-12-08 11:15:43 +00:00
uch 2c8098281b TX39, R5900 cache configuration. 2001-12-02 10:37:25 +00:00
manu fd6a281221 Added twomissing SYSCALL_SHIFT for indirect syscall through SYS_syscall 2001-12-02 08:28:18 +00:00
manu 55c08f5ede Back out the copy of theses files to userland 2001-11-28 20:13:34 +00:00
manu fa1e4588d9 We need to copy new SVR4 header files to /usr/include/sys... 2001-11-28 12:13:49 +00:00
manu f73e64b4be Added support for COMPAT_IRIX 2001-11-28 11:54:15 +00:00
lukem ecb81c3f6d - convert usage of "defopt" to "defflag" where the relevant option does
not support a value (e.g., it's to be used as "options FOO" instead of
  "options FOO=xxx"). options that take a value were converted to
  defparam recently.
- minor whitespace & formatting cleanups
2001-11-28 10:21:10 +00:00
nisimura 9f8ca586ad Fix a small typo in comment. 2001-11-28 08:49:19 +00:00
manu 12c949a188 Added COMPAT_IRIX (being developped, not functionnal at that time) 2001-11-26 21:38:41 +00:00
shin 3dfc0ff3ab fix pasteo. 2001-11-26 13:16:17 +00:00
uch 6bd02d8e33 add #ifndef _LOCORE. 2001-11-23 15:48:40 +00:00
tsutsui d8879382cf Add 32B/l L1 D/I-cache ops for newer ARC machines. 2001-11-23 06:21:49 +00:00
simonb 944346b889 KNF, ANSIfy.
Change print_addr() to take an db_addr_t argument instead of a long.
2001-11-22 06:58:03 +00:00
simonb 973ad566f7 Update the CP0 register names.
Make some tables line up nicely.
Make print_addr() static.
2001-11-22 06:00:31 +00:00
manu 675946fd1c Fixed the Linux signal trampoline and linux_sys_sigreturn(). Linux signal
delivery now seems fully functionnal.
2001-11-20 21:37:50 +00:00
lukem 03aef4723c cleanup:
options SPACE TAB
	makeoptions TAB
	psuedo-device TAB
	remove trailing whitespace
	replace multiple spaces -> tabs
	options "FOO" -> options FOO
	options "FOO=bar" -> options FOO=bar
	options "FOO=\"bar\"" -> options FOO="\"bar\""
2001-11-20 12:56:17 +00:00
shin 07356ec733 improve r4k_sdcache_XXX_generic(). 2001-11-20 06:32:21 +00:00
thorpej 6e69c4e62c Add mips_dcache_align and mips_dcache_align_mask variables that
contain information suitable for allowing other parts of the kernel
to determine if a memory region is aligned to the largest data cache
line size present in the system.

Add a mips_dcache_compute_align() function which must be called whenever
one of the data cache line size variables is changed, in order to
compute mips_dcache_align and mips_dcache_align_mask.
2001-11-19 01:28:07 +00:00
thorpej 4609c9fbb4 r4k_sdcache_wbinv_range_index_32(): fix a typo (16 -> 32). 2001-11-18 18:48:55 +00:00
thorpej e6cab2e799 Add 128b/l L2 cache ops. 2001-11-18 18:46:20 +00:00
simonb 0f3507ed9c White space nit. 2001-11-18 03:47:53 +00:00
soren 662f877587 MAXSLP is defined to be a machine-independent scheduling parameter,
so move it into sys/param.h.
2001-11-15 18:06:11 +00:00
thorpej bd15cfaed8 Merge the thorpej-mips-cache branch onto the trunk. This is an
overhaul of how caches are handled for NetBSD's MIPS ports.
2001-11-14 18:26:21 +00:00
thorpej af66038f73 Merge the thorpej-mips-cache branch onto the trunk. This is an
overhaul of how caches are handled for NetBSD's MIPS ports.
2001-11-14 18:15:10 +00:00
simonb 1143123ee5 Fix pasto in a comment. 2001-11-12 11:12:16 +00:00
thorpej 47514a31be Remove unneeded declarations of the db_machine_init() function. The
ARM ports are the only ones that actually have one, and it is about
to change.
2001-11-09 06:52:23 +00:00
tsutsui 882785d057 Cast pa values to u_long in DEBUG printfs for _MIPS_PADDR_T_64BIT ports.
XXX should use unsigned long long format?
2001-11-04 14:07:13 +00:00
chs fa6e18a029 in pmap_extract(), detect unmapped users addresses too. 2001-11-01 07:37:36 +00:00
thorpej e8ee04475d - Add a new vnode flag VEXECMAP, which indicates that a vnode has
executable mappings.  Stop overloading VTEXT for this purpose (VTEXT
  also has another meaning).
- Rename vn_marktext() to vn_markexec(), and use it when executable
  mappings of a vnode are established.
- In places where we want to set VTEXT, set it in v_flag directly, rather
  than making a function call to do this (it no longer makes sense to
  use a function call, since we no longer overload VTEXT with VEXECMAP's
  meaning).

VEXECMAP suggested by Chuq Silvers.
2001-10-30 15:32:01 +00:00
shin 4843675231 fix virtual alias problem in pmap_copy_page().
to eliminate virtual alias, source page should also be flushed.
fixes PR/13587.
2001-10-27 05:44:45 +00:00
shin e003f33738 remove " in assignment of ENDIAN.
fixes mipseb link breakage.
2001-10-26 08:25:54 +00:00
jmc 6d536163de Change defaults for kernel compiles. Default all to USETOOLS?=no and have
the etc Makefile override that by putting USETOOLS into $.MAKEOVERRIDES
This way the default for kernel compiles is still to use the installed
toolchain instead of depending on $TOOLDIR. $TOOLDIR can be used by
simply adding USETOOLS=yes to the command line as usual.

Adjust each ports template to set the default no setting and also pull in
bsd.own.mk if they weren't already to ensure they'll build correctly
with the new toolchain setup.
2001-10-26 06:45:33 +00:00
thorpej 90a2bc2cf7 For MIPS kernel Makefiles, don't set ENDIAN in std.${MACHINE}. Instead,
explicitly set MACHINE_ARCH to the appropriate thing.  Makefile.mips will
then set all of the internal variables it needs to accordingly.
2001-10-23 20:40:00 +00:00
thorpej 2c5ebcddfb Use MACHINE, not TARGET_MACHINE. 2001-10-23 18:57:32 +00:00
uch d8c8db85ef R5900 support.
COP0_SYNC
	In R5900 mtc0, tlbr, tlbp, tlbwi, tlbwr must be followed by sync.p.
	if defined MIPS3_5900, COP0_SYNC is defined as sync.p. else nothing.
 IPL_ICU_MASK
	mask interrupt directly ICU instead of SR.IM.
	I've added this feature to support software interrupt for R5900.
	and this option may be useful for platform which has cascaded ICU.
2001-10-16 16:31:32 +00:00
simonb 6048ce9247 Use a separate variable (${KERNLDSCRIPT}) for the name of the kernel
ld script, so it can be used in other places.
2001-10-08 10:14:20 +00:00
simonb 4471b94432 This Makefile.inc is used for building LKMS - add the standard MIPS
kernel compile flags as well as "-mlong-calls" so that calls from the
LKM in KSEG2 work to the kernel in KSEG0.

MIPS LKMs now build and can be loaded with the right Magick command line
args to modload(8).  Changes to modload coming...

Thanks to Chris Demetriou for pointing out the -mlong-calls gcc option
that had been staring me in the face all along.
2001-10-05 15:36:46 +00:00
simonb 1f8636506e Use ".-include" instead of the ".if exists(...) ..." dance. 2001-10-05 15:14:18 +00:00
simonb bc2ec5e553 Use a single ldscript instead of separate scripts for either endianness;
use command line parameters to ld(1) instead to set the endian format.
Clean up some endian decisions in mips/conf/Makefile.mips.
Wrap some long lines.
2001-10-05 05:03:27 +00:00
manu 2d16421460 Moved COMPAT_LINUX config stuff from arch/sgimips to arch/mips, so that it's
available on all Mips ports.
2001-09-23 19:45:41 +00:00
manu 151b90c898 Added Linux emulation support to Mips port 2001-09-22 21:29:20 +00:00
jdolecek ef8abe0767 Make the setregs hook emulation-specific, rather than executable
format specific.
Struct emul has a e_setregs hook back, which points to emulation-specific
setregs function. es_setregs of struct execsw now only points to
optional executable-specific setup function (this is only used for
ECOFF).
2001-09-18 19:36:32 +00:00
jdolecek a0a75493d8 only define the cpu_exec_ecoff_*() stuff #ifdef EXEC_ECOFF 2001-09-17 17:43:06 +00:00
chris 0e7661f023 Update pmap_update to now take the updated pmap as an argument.
This will allow improvements to the pmaps so that they can more easily defer expensive operations, eg tlb/cache flush, til the last possible moment.

Currently this is a no-op on most platforms, so they should see no difference.

Reviewed by Jason.
2001-09-10 21:19:08 +00:00
chs 7d353e82b0 - in PMAP_IS_ACTIVE(), the kernel pmap is always active, and we don't
need to check for curproc being non-NULL since none of the pmap
   interfaces which are legal to use in interrupt handlers use this macro.
 - use the hit op when flushing the cache in pmap_kremove().
 - avoid trusting the optimizer in pmap_clear_reference().
 - fix pmap_clear_modify() to reset the mod-bit emulation so we can
   detect further modifications to the page, also flushing the cache
   for any mappings which might have dirty lines.
2001-09-09 19:48:12 +00:00
simonb c3c682fc46 Oops, <sys/sched.h> isn't asm safe, move inside an "#ifndef LOCORE" block. 2001-09-04 09:23:27 +00:00
simonb 62fb390c64 May as well include <mips/cpuregs.h> in <mips/cpu.h> once rather than
in every MIPS port's <machine/cpu.h>.
2001-09-04 06:23:15 +00:00
simonb 214f5366ea Centralise struct cpu_info declaration and related info to <mips/cpu.h>. 2001-09-04 06:19:21 +00:00
chs 8677b0ddf4 rearrange pmap_kenter_pa() to map unmanaged pages uncached as well.
this is apparently needed on the arc port.
slight optimization in pmap_kremove().
2001-09-01 17:08:19 +00:00
simonb bbe2823aee ANSIfy, KNF. 2001-08-27 06:18:08 +00:00
chs a026d7bc78 handle unmanaged pages correctly in pmap_remove_pv(),
fixes crashes when exiting X.
2001-08-26 06:03:11 +00:00
chs c489e9bff4 add missing pmap_update(). 2001-08-19 18:09:20 +00:00
simonb 11362870f4 Reorder some function prototypes more logically. 2001-08-18 04:13:28 +00:00
simonb 02f580ae38 Fix lint problem introduced in last change - if `lint' is defined,
#define away __alignof__.  Still produces some warnings, but at least
they're not fatal anymore.

Problem noted by Rafal Boni in private mail.
2001-08-18 03:27:02 +00:00
simonb 0667c562f6 Describe the widths of various coprocessor 0 registers (for mips1,
mips3, mips32 and mips64).
2001-08-17 07:53:33 +00:00
simonb dd6c57e790 Fix for single-byte mbufs. 2001-08-17 07:21:07 +00:00
simonb b2b2f7ccfa Fix va_arg() problem when adjusting argument pointer when a structure is
passed which is larger than an int but has int alignment.  As well as
fixing the described problem, this is the same way it is handled in the
Irix and Ultrix header files.

Problem and suggested solution by Uros Prestor in port-mips mailling
list.
2001-08-17 07:15:16 +00:00
simonb 28a25d9058 _Never_ make a cosmetic change to a comment without test-compiling... 2001-08-15 14:27:00 +00:00
simonb e77212ece8 Add some MIPS, Alchemy and SiByte CPU PRIDs (from oss.sgi.com). 2001-08-15 03:01:37 +00:00
simonb d1cb410de4 Add Alchemy and SiByte company IDs (from oss.sgi.com). 2001-08-15 02:45:08 +00:00
simonb 4c76cec1d3 Remove parameter names from function prototypes. 2001-08-15 02:43:34 +00:00
soda 7e7514b7f1 OP_BLTZAL was defined twice. 2001-08-13 18:48:48 +00:00
chs be706f969f in vunmapbuf(), call pmap_remove() explicitly since uvm_km_free_wakeup()
will soon no longer do it for us.
2001-08-04 04:28:49 +00:00
chs f6a81a1ac7 remove the uncached idle-loop page zeroing.
(to be replaced by a version that uses the cache...)
2001-08-04 04:26:48 +00:00
chs 873e926c7b remove remaining spl calls, they're not needed.
remove some checks for impossible conditions.
in pmap_enter(), only call pmap_remove() to remove an existing mapping
if there actually is an existing mapping.

in pmap_remove_pv(), don't flush the MIPS1 cache when removing the last mapping.
this was added in rev 1.97, to avoid stale data being left in the cache
when the page is zeroed bypassing the cache in pmap_zero_page_uncached().
we've since found that bypassing the cache for idle-loop page zeroing
doesn't work very well anyway, so we don't do that anymore.
so now we can remove the extra cache-flush.
remove pmap_zero_page_uncached() while I'm thinking of it.

various other cleanup.
2001-08-04 04:25:37 +00:00
chs fb5f7652b6 fix think-o in pmap_kenter_pa(). 2001-07-31 05:29:24 +00:00
chs e2de9310c3 fix pmap_extract() to handle unmapped kernel addresses. 2001-07-28 17:18:59 +00:00
rafal e9ad38e77d Fix bug in mips3_proc_trampoline: SR wasn't disabled on entry, allowing an
interrupt to sneak in after EXL had been set; the interrupt EPC was stale
as PC isn't saved if EXL is set, causing the eret to return to the wrong
place and leading to kernel-mode TLB misses on user addresses.  The bug
was discovered by the japanese NetBSD/*mips folks and the same fix was
found independently by shinohara-san (shin@netbsd.org).
2001-07-24 23:13:33 +00:00
oster fd5247de51 By adding a well-placed space or two, 'make depend' no longer loses
due to a directory name like 'arc.current' messing up a sed substitution.
2001-07-19 01:46:15 +00:00
simonb 19014d376c Modernise data and stack size limits. 2001-07-18 04:15:55 +00:00
takemura a0b378689f Suppress warning message:
warning: duplicate script for target "fp.o" ignored
And delete verbose ifs.
2001-07-15 06:38:07 +00:00
simonb 5d17649545 bcopy -> memcpy 2001-07-09 01:43:26 +00:00
simonb c23e6dcb90 b{cmp,copy,zero} -> mem{cmp,cpy,set}
Also remove some unnecessary argument casts.
2001-07-07 14:20:59 +00:00
thorpej 93c03c9726 - Implement a real pmap_kenter_pa()/pmap_kremove().
- Use pools for pmap structures and pv_entry structures.
- Remove a bunch of splvm()/splx(), no longer needed now that
  pmap_kenter_pa() and pmap_kremove() are as they should be.

Mostly from Chuck Silvers.
2001-06-26 00:31:32 +00:00
thorpej 1111f1d461 Add some macros to decode the BONITO revision register. 2001-06-25 20:15:03 +00:00
thorpej 4b23ee5d3b PCI configuration space access for BONITO. 2001-06-22 03:58:55 +00:00
thorpej 5df8e5587e Basic BONITO software state definitions. 2001-06-22 03:58:33 +00:00
thorpej 90c3629b19 Add a definition for BONITO_PCIMAPCFG_TYPE1, and make the BONITO
accessor macros useful in the NetBSD kernel environment.
2001-06-22 03:58:03 +00:00
thorpej 8eb3b954f1 Don't need to prototype child_return() here, it's in <sys/proc.h>. 2001-06-14 22:56:55 +00:00
thorpej ba52d7a5d0 Always indirect through the "locoresw" to get the cache ops, since
there are just far too many combinations to handle with magic
#ifdefs in any sane way.  Also, add a HitFlushDCache op to the
"locoresw", and fill it in as appropriate (it's NULL on MIPS-I,
so watch out).

These changes ensure that my R4600 Indy (with 2-way cache) gets
the correct cache ops when the kernel is built with only MIPS3
support, resulting in a kernel that is significantly more stable.
2001-06-11 23:52:38 +00:00
wiz 40ac848024 Fix various misspellings of compatible/compatibility. 2001-06-11 01:50:48 +00:00
chs 821ec03ed9 replace vm_map{,_entry}_t with struct vm_map{,_entry} *. 2001-06-02 18:09:08 +00:00
thorpej 7e716e6849 Memory map and register definitions for the Algorithmics BONITO
MIPS memory and PCI controller.  This file is provided by Algorithmics.
2001-06-01 20:29:33 +00:00
thorpej 9f159a8918 Remove 4096-byte gap between .reginfo and .data, suggested by
Ian Taylor <ian@zembu.com>.
2001-06-01 03:55:30 +00:00
soda 9bac50748f "opt_ddb.h" should be included at the beginning of source file,
because some headers (in this case <systm.h>) refers symbols (e.g. DDB)
defined in the opt_ddb.h
2001-05-31 19:41:57 +00:00
nisimura c227148511 PRiD 0x18 is shared by RC32334, 332 and 355. These SoCs are
distinguished by SYSID register in the system controller.  Note
that PRiD 0x20 is for a standalone RC32364 processor which has the
same 32300 core inside.  Rather better to name them MIPS32 ISA.
2001-05-31 02:06:26 +00:00
lukem d84d2c6c85 add missing #include "opt_kgdb.h" 2001-05-30 15:24:23 +00:00
soren 72943f1165 Pasto. 2001-05-30 12:52:06 +00:00
nisimura f32430d518 Add a case clause for IDT RC32332/RC32334 processor personality
inside a commented-out block.
2001-05-30 09:06:28 +00:00
nisimura 16a60efd2c Add PRiD 0x18 for IDT RC32332/RC32334 processors. 2001-05-30 07:21:51 +00:00
thorpej 5331656107 The QED RM7000 can use the same idle routine as the QED RM52xx. 2001-05-29 18:19:20 +00:00
thorpej 74fa4349ae Install power-saving idle routines at the end of cpu_identify(). We
currently handle the QED RM52xx here.
2001-05-29 17:54:56 +00:00
thorpej c8988c2caa Add an idle loop routine for the QED RM52xx family. This uses the
RM52xx `wait' insn to power down the pipeline.
2001-05-29 17:51:55 +00:00
mrg 3783ca5d30 define _KERNEL_OPT as well as _KERNEL. we will use this in the future to
get kernel "opt_foo.h" headers, rather than _KERNEL && !_LKM.
2001-05-29 02:20:20 +00:00
chs e44e9dec8a replace vm_page_t with struct vm_page *. 2001-05-26 21:27:02 +00:00
chs 118ddca24a replace {simple_,}lock{_data,}_t with struct {simple,}lock {,*}. 2001-05-26 16:32:40 +00:00
hubertf 9422f74ca8 Allow overriding the 'install' target.
(I have a nice 'install' target for cobalts here, but that only works there.
 I guess I'll put that into htdocs now that the cobalt port uses Makefile.mips)
2001-05-23 02:35:40 +00:00
simonb a411a63d8e Add the processor IDs for the 4Kc and 5Kc CPUs and some MIPS32/64
coprocessor 0 registers.
2001-05-15 21:48:50 +00:00
nisimura 96398342f4 Rather better to have |= to make sure spl0 condition, allowing to preserve
processor model specific SR bit pattern on pcb0 initialization.
2001-05-15 06:01:23 +00:00
thorpej 4efd12ca44 Set SR to PSL_LOWIPL rather than MIPS_INT_MASK | MIPS_SR_INT_IE,
as the former accounts for some mips3-related options.

From Rafal K. Boni.
2001-05-11 02:03:01 +00:00
thorpej 0976e733f4 Correct args to SYSCALL_DEBUG related function calls.
From Rafal K. Boni.
2001-05-11 01:42:32 +00:00
nisimura 7ec840fbe5 Add comment to tell what cpu_fork() does around at its bottom.
What's wrong; the initial SR value in pcb0 gets overwritten before
the first kthread_create1() is called.  For a normal process which
has user mode it doesn't matter because proc_trampoline() makes
the process to have spl0 during exception return path to user mode,
however, kthreads stay in kernel mode mistakenly left in splhigh
condition.  The trouble is visible as severe clock drifts when
system activity is high.
2001-05-08 06:02:14 +00:00
nisimura 580e36f497 Make sure to have spl0 condition whenever a new thread of control
is created.  System kthreads are mistakenly left splhigh state.

pcb0 has an initial SR value for spl0 condition which are expected to
be propagated to all of children
2001-05-08 05:36:01 +00:00
simonb 6a64a03f21 Remove prototype for non-existant function. 2001-05-06 12:50:45 +00:00
simonb 6a511e05e2 Be consistent with limit constants:
- use "U" suffix for unsigned constants
 - use "L" suffix for long constants
 - use "UL" suffix for unsigned long constants
 - use hexadecimal instead of decimal

Fixes build problems with vi (now that warnings/errors are enabled) on
mips, powerpc and arm platforms.
2001-05-04 15:12:32 +00:00
thorpej c9d1eae045 Size the number of initial color bins based on the size and
associativity of the L1 cache.

Note, doesn't really do anything for virtually-indexed caches,
but it doesn't hurt them, either.
2001-05-02 21:23:03 +00:00
thorpej cf67ac7122 Per discussion w/ chuck and chuck, restructure the md page stuff
to use a structure called "vm_page_md", and use __HAVE_VM_PAGE_MD
and __HAVE_PMAP_PHYSSEG.
2001-05-01 02:19:13 +00:00
thorpej 2b27ac7a99 Add a VM_MDPAGE_MEMBERS macro that defines pmap-specific data for
each vm_page structure.  Add a VM_MDPAGE_INIT() macro to init this
data when pages are initialized by UVM.  These macros are mandatory,
but ports may #define them to nothing if they are not needed/used.

This deprecates struct pmap_physseg.  As a transitional measure,
allow a port to #define PMAP_PHYSSEG so that it can continue to
use it until its pmap is converted to use VM_MDPAGE_MEMBERS.

Use all this stuff to eliminate a lot of extra work in the Alpha
pmap module (it's smaller and faster now).  Changes to other pmap
modules will follow.
2001-04-29 22:44:31 +00:00
kleink fe3c9ceaf7 * Move definitions of exact-width integer types from <machine/types.h>
to <sys/types.h> and <sys/stdint.h>.
* Add a new C99 <stdint.h> header, which provides integer types of
  explicit width, related limits and integer constant macros.
* Extend <inttypes.h> to provide <stdint.h> definitions and format
  macros for printf() and scanf().
* Add C99 strtoimax() and strtoumax() functions.
* Use the latter within scanf().
* Add C99 %j, %t and %z printf()/scanf() conversions for
  intmax_t, pointer-type and size_t arguments.
2001-04-28 15:41:28 +00:00
kleink 99054d7a6c Add definitions for C99 fastest minimum-width integer types. 2001-04-26 16:25:19 +00:00