thorpej
eb14e86676
Add a new BUF_INIT() macro which initializes b_dep and b_interlock, and
...
use it. This fixes a few places where either b_dep or b_interlock were
not properly initialized.
2003-02-25 20:35:31 +00:00
pk
b69aef5f3e
* Use fdloadfile() to avoid opening the the underlying device twice.
...
* Cleanup old stuff.
2003-02-25 08:09:30 +00:00
pk
dd87308a05
Note which network boot protocol we're trying.
2003-02-25 08:06:29 +00:00
pk
a8bd073e6f
pv_unlink4m(): don't forget to link in a new PV entry after alias checking.
2003-02-24 15:14:51 +00:00
pk
007c1ca9cf
Remove the assumption in the sun4/sun4c bootstrap code that the kernel
...
is always mapped using PMEGs and SMEGs starting at #0 .
2003-02-21 19:07:36 +00:00
pk
b7f550c62d
Allow the kernel to be loaded at its link address (aka KERNBASE) by the
...
boot program.
2003-02-21 19:04:07 +00:00
pk
b8081a591a
Change locking prerequisites for the pv_changepte4m() helper function
...
to avoid locking recursion.
2003-02-20 16:22:49 +00:00
martin
c3ed92df3e
Add a few new devices.
2003-02-20 12:02:31 +00:00
pk
b66bce23df
Finish PV table locking. Terminology and locking strategy stolen from
...
the alpha port.
2003-02-19 22:27:08 +00:00
pk
d286e74769
pgt_page_alloc: use uvm_km_kmemalloc() so we can honor the PR_NOWAIT flag
...
pmap_kenter_pa4m: lock the pmap we're working on.
2003-02-18 22:05:08 +00:00
pk
2b390d41d0
Move makememarr() into promlib.c.
2003-02-18 13:36:51 +00:00
pk
c502753d44
Fix pasto in previous.
2003-02-15 13:30:11 +00:00
pk
84e3fcabb3
Redo part of rev. 1.237; the pages at KERNBASE might not be mapped when the
...
kernel has just been loaded.
2003-02-15 13:17:41 +00:00
pk
baa98646a0
It's not necessary to complicate the computation of `va2pa_offset': we already
...
assume that the few leading pages in front of the kernel image are
always present.
Adjust `va2pa_offset' on sun4 and sun4c as well, so that some day we can
have the bootstrap program load the kernel some place else.
2003-02-14 22:24:58 +00:00
pk
d6b6eb78e4
Move the PV list header into the VM page vm_page_md structure.
...
Also, start using a spin lock to protect PV list operations.
2003-02-13 09:53:20 +00:00
pk
338f31f581
Make the buffer cache code MP-safe.
2003-02-05 21:38:38 +00:00
mrg
2a81b2dfea
clean up a couple of SMP comments.
2003-01-31 01:26:39 +00:00
hannken
eea2fc320e
Fix printf() problem caused by "daddr_t" change.
2003-01-30 16:33:50 +00:00
pk
be1188e00d
Provide locking required by the interrupt handlers running at IPL_SERIAL.
2003-01-28 12:35:31 +00:00
kent
cd7d9faeaf
Introduce BUS_DMA_NOCACHE, and bus_dmamem_map() of i386 supports it.
2003-01-28 01:07:51 +00:00
pk
bfb9cac2fc
Release the kernel lock in upcallret() and startlwp().
2003-01-26 13:20:12 +00:00
fvdl
a3ff3a3038
Bump daddr_t to 64 bits. Replace it with int32_t in all places where
...
it was used on-disk, so that on-disk formats remain the same.
Remove ufs_daddr_t and ufs_lbn_t for the time being.
2003-01-24 21:55:02 +00:00
pk
f65446d08d
When stopping a CPU, clear its bit from cpu_ready_mask.
2003-01-23 22:33:41 +00:00
pk
a6a16741fe
Optimize xcall() et.al. further by maintaining a cpuset mask of all CPUs
...
marked ready. This saves repeated testing for NULL pointers and the
CPUFLG_READY flag.
Also use a separate flag variable to signal xcall completion. This saves a
load and a pipeline stall.
2003-01-23 19:54:35 +00:00
pk
a799bdd88d
GC the per-CPU message lock.
...
Move the level 15 msg area further down the cpuinfo structure, as it's
used infrequently.
2003-01-23 18:49:08 +00:00
pk
39ce68a44b
bogusintr: print cpu number.
2003-01-23 14:56:06 +00:00
pk
22acc2a827
Shave some code off xcall().
2003-01-23 14:54:33 +00:00
pk
40a1653fc2
pmap_kenter_pa4m: like pmap_enk4m(), we can use setpte4m().
...
ctx_free: fix cache flush context for sun4/sun4c.
2003-01-23 12:48:53 +00:00
pk
698ca6fb6f
LWPify cpu_debug_dump().
2003-01-23 11:50:50 +00:00
pk
9d33cc7115
Set the interrupt target to the current CPU when directly accessing
...
the chip for console I/O.
2003-01-22 22:00:39 +00:00
pk
53c776f062
Add functions to set & get the interrupt target CPU.
2003-01-22 21:58:28 +00:00
sjg
b3d7df8002
Don't hide bootmid behind MULTIPROCESSOR.
2003-01-21 06:18:41 +00:00
pk
26eedde15b
srmmu_cache_flush: when flushing per-page and doing more than one page,
...
we might be crossing a segment boundary.
2003-01-20 22:15:54 +00:00
pk
d823499ff4
pmap_enter4m: when installing a new PTE we don't need to invoke the elaborate
...
TLB de-map protocol. In the relatively infrequent case where this function
must update an existing mapping, do the de-map explicitly before installing
the new PTE value.
2003-01-20 22:03:54 +00:00
pk
ab9a8ae184
Set the system-wide cache aliasing distance according to the largest cache
...
found on the CPU modules (hypersparc & cypress).
Vikings have a physically indexed cache, so don't bother with computing an
aliasing distance (leaving cache_alias_dist zero disables the BAD_ALIAS macro).
2003-01-20 21:56:34 +00:00
pk
b4a0aebea2
Add SUN4D case for cache alias macros.
2003-01-20 21:43:38 +00:00
pk
353e527861
Remove the restriction that the boot CPU must be the first CPU in the order
...
as it is presented by the PROM. This is actually amazingly less trivial
than it looks at first, since the finding the Module ID that's currently
executing your code is specific for each module type and/or manufacture.
2003-01-20 20:51:33 +00:00
pk
18f455c44f
Replace some more VA2PA(<static_addr>) calls with PMAP_BOOTSTRAP_VA2PA()
2003-01-20 15:45:40 +00:00
pk
5815e88f83
De-couple some MULTIPROCESSOR and SUN4M/SUN4D dependencies.
2003-01-20 12:06:49 +00:00
pk
5be63cb4a3
xcall(): two more printf => printf_nolog
2003-01-20 00:55:52 +00:00
thorpej
c464d72f40
Merge the nathanw_sa branch.
2003-01-18 06:44:56 +00:00
pk
4d7731a177
cpu_switch:
...
* return `switched to same process' only if that process was actually
already on a run queue when we entered.
* skip the switch to the idle stack if we can switch immediately
* .. and because of this, don't release the scheduler lock until after
we've fully switched to the new process's stack.
2003-01-17 14:49:45 +00:00
pk
d352e8ce9c
pmap_deactivate(): only update the pmap's cpuset if need to.
2003-01-17 14:15:17 +00:00
pk
1d67b9c75a
Don't grab the kernel lock for system timer interrupts; this mostly prevents
...
stalls in system time processing.
XXX - deal with non-atomic global time variables updates later.
2003-01-17 10:36:19 +00:00
pk
2252ed574d
mp_{pause,resume,halt}_cpus(): check for cpus==NULL.
2003-01-16 17:21:43 +00:00
pk
c454f450b1
Define a MP version of callrom().
2003-01-16 16:58:52 +00:00
pk
7d4c3f7430
Remove some accidental garbage.
2003-01-16 16:58:23 +00:00
pk
72c28f7bb7
Rename the current mp_{pause,resume}_cpus() => mp_{pause,resume}_cpus_ddb().
...
Implement mp_pause_cpus/mp_resume_cpus on top of the PROM services.
2003-01-16 16:57:43 +00:00
pk
58b50d0643
Read the CPU mailbox in the level 15 soft interrupt handler and respond
...
to idle and stop requests.
2003-01-16 16:27:48 +00:00
pk
b418a6a59d
Some PROMs get really uneasy if the prom_reboot() function is called
...
after the other CPUs have already return into the PROM through prom_cpustop().
So don't do it; try to halt the other CPUs only when an actual `halt'
is requested.
My guess in this case is that the PROM does not expect its original boot
CPU to call prom_cpustop(0), or possibly treats it as the equivalent of
a prom_halt() which is then called again by some other CPU. In any case,
the result is garbage.
2003-01-16 16:20:20 +00:00
pk
f312ee5f9a
What do you know.. the prom_cpu{stop,idle,resume} function appear to be
...
returning a success/fail flag. For now, use it to be informative.
2003-01-16 16:10:44 +00:00
pk
5e231ddd1c
* Implement mp_halt_cpus()
...
* xcall: use printf_nolog()
2003-01-16 14:49:08 +00:00
pk
72286d4202
Definitions of some OBP generated CPU mailbox messages.
2003-01-16 14:43:07 +00:00
pk
26fa27a910
Fix reboot options handling; now one-letter kernel names can also be booted.
2003-01-16 11:33:21 +00:00
pk
a5cea9e740
On Hypersparc MP machines, we need to flush the TLB after a page cache flush.
...
While the pmap functions take care of properly ordering cache and TLB flushes,
not all TLB flush requests are sent to all CPUs (due to per CPU pmap tracking)
while cache flushes are always broadcast.
XXX: need to investigate pmap tracking for cache flush operation as well.
2003-01-15 22:56:32 +00:00
pk
5bb3d93538
srmmu_cache_flush: switch MMU contexts in all places where it matters.
...
(incidentally, this also makes Hypersparc MP machines mostly go).
2003-01-15 16:42:27 +00:00
pk
a458d9f040
Fix compiler warning induced by last change.
2003-01-15 06:57:12 +00:00
pk
9eb63b3b94
statintr: if interrupting code running below IPL_SCHED, call schedintr()
...
directly, saving the overhead of an extra soft interrupt.
2003-01-14 23:00:59 +00:00
pk
c8226e1ce0
Define spllowerschedclock().
...
To be used in the same spirit as spllowersoftclock().
2003-01-14 22:58:00 +00:00
pk
d45f77c6c8
Add CLKF_LOPRI() macro that allows a (timer) interrupt handler to determine
...
whether it is interrupting code running at a given IPL level.
2003-01-14 22:54:53 +00:00
pk
ee7e8274a6
xcall: raise IPL to splsched() to prevent interrupts that take schedlock.
...
Otherwise we have a locking order problem with schedlock and xmsglock.
2003-01-14 17:30:55 +00:00
pk
18cd92ffe3
(Re)initialise the pmap structure fields that are not preserved on the
...
pmap pool cache all in one place.
2003-01-14 13:56:07 +00:00
pk
b50058b483
Broadcast I-cache flush in the `Unimplemented Flush' trap handler.
2003-01-13 20:00:34 +00:00
pk
b4a1c0f6a0
Reset ddb_cpuinfo when leaving DDB.
2003-01-13 19:44:53 +00:00
pk
167ce8e6d3
Fix stack tracing once again.
...
Also check for trap frame boundaries when fetching the return address.
2003-01-13 19:44:06 +00:00
pk
df4b5f766b
Remove UNLOCK_XPMSG() before cpu_halt(); it's not compatible with LOCKDEBUG
...
and it wan't chique in any case.
2003-01-13 16:59:17 +00:00
mrg
8d9571d120
remove cpu_hatched, cpu_hatch_sc and cpu_hatchstack. the first can use
...
the cpi->flags, the second is unused and the third is also cpi-idle_u.
2003-01-13 15:50:50 +00:00
pk
5642428f4e
Use print_nolog() from xcall(), to avoid confounding things even further
...
by re-entering the scheduling code to wakeup syslog waiters.
2003-01-13 15:01:16 +00:00
pk
4641d55697
Halt any other CPUs in cpu_reboot().
2003-01-13 01:35:45 +00:00
pk
2684c88122
fpulock: encapsulate required IPL raise in the FPU LOCK/UNLOCK macros.
2003-01-12 16:29:00 +00:00
uwe
24780840a1
Account softintr_common as uvmexp.softs, not uvmexp.intrs.
2003-01-12 06:11:01 +00:00
pk
55a3bd0a85
schedcpu() has been fixed; now we can notify another CPU about a pending
...
reschedule request.
2003-01-12 01:50:51 +00:00
pk
c41718e9ec
Remove needless indirection from the curproc() macro.
2003-01-12 01:19:00 +00:00
pk
ae33d2b4e5
Use per-CPU virtual addresses for pmap_copy_page() & pmap_zero_page().
2003-01-12 01:16:06 +00:00
pk
dab556c2b1
pmap_deactivate(): arguments for sp_tlb_flush() were reversed.
2003-01-12 00:34:52 +00:00
mrg
90d9434890
keep track of which cpu's have run a pmap and only broadcast tlb flushes to
...
cpu's who have done so. implement pmap_deactivate() for MULTIPROCESSOR and
call it from cpu_switch() when we are about to switch proces and when we
enter idle().
with this change, i see significantly reduced tlb IPI traffic and fork/exec
bound processes -- such as "configure" -- run significantly faster, upto
15%. i also obvserved a small (0-2%) benefit to CPU bound tasks as well.
2003-01-11 03:40:31 +00:00
mrg
e756303d08
expand db_proc_cmd() a little more.
2003-01-10 19:25:12 +00:00
pk
30cc38bdb5
Replace `want_resched' and `want_ast' globals by per-CPU variables.
2003-01-10 16:34:14 +00:00
thorpej
b346ea724a
Merge sparc and sparc64 <machine/signal.h>.
2003-01-09 23:25:24 +00:00
mrg
70628f1993
clean up db_proc_cmd() output slightly.
2003-01-09 18:00:51 +00:00
pk
18c8de0d93
It's now required to turn off traps in the srmmu cache flush ops in
...
non-MULTIPROCESSOR kernels too.
2003-01-09 12:29:52 +00:00
pk
cbc8b8122d
Check for existing soft interrupts too before trying to install a fast
...
interrupt handler.
2003-01-09 10:27:24 +00:00
mrg
ec9ebd1af6
- s/xpmsg11/xpmsg15/
...
- clean up
- no need to reset the msg.tag
2003-01-09 05:55:30 +00:00
mrg
7386726570
remove a line accidentally commited in previous.
2003-01-09 05:27:09 +00:00
mrg
9b0c7030f5
call splclock() around the FPU_LOCK().
...
XXX: pk suggests we can make the this a sleeping lock.
2003-01-09 04:58:58 +00:00
pk
f234ea91a2
Remove write_user_windows() from a number of `4m' functions, since we don't
...
switch contexts with traps enabled anymore.
2003-01-08 18:46:28 +00:00
pk
f63279a9b6
Add CPUINFO_WANT_RESCHED and CPUINFO_WANT_AST
2003-01-08 17:49:39 +00:00
pk
87e0907cbb
Avoid external declaration for the dummy `ross_pend' variable.
2003-01-08 17:22:09 +00:00
pk
127392a5b7
Prepare for per-CPU reschedule and AST requests.
2003-01-08 17:19:53 +00:00
pk
d3db019efd
Make pv_uncache() and pv_cacheflush() static functions.
...
Split pv_cacheflush() in sun4/sun4c and sun4m/sun4d versions.
2003-01-08 16:16:46 +00:00
pk
f4018cde22
Initialise the secondary CPUs' `spc_runtime'.
2003-01-08 01:20:56 +00:00
mrg
88f08d9ac1
- add a new message tag for level15 software NMI, and switch ddb to use this
...
rather than the level13 software intr xpmsg area. now DDB IPI's don't lock
the xpmsg_lock and we avoid recursion and more.
- don't actually use cpuinfo.msg.lock yet, xpmsg_lock suffices.
- reread the pending register on mbus hypersparc cpus to avoid bugs in the
h/w that cause IPI's to be missed.
2003-01-07 16:20:13 +00:00
pk
02d686d112
Simplify ddb register storage setup: remove MULTIPROCESSOR special cases
...
and keep the ddb register copies on the current stack always.
2003-01-07 16:03:03 +00:00
pk
469014c2cd
* Maintain a pointer to the cpu_info structure of the CPU being examined.
...
* Force cpu_Debugger() to have a stack frame, so tracing can at least
start off matching arguments and function calls correctly.
2003-01-07 15:15:06 +00:00
pk
004dd5ecba
#include <sys/kernel.h> for `cold'.
2003-01-07 13:12:59 +00:00
pk
63b5299d1e
Let all CPUs play..
2003-01-07 12:09:00 +00:00
pk
e1dfbff267
xcall: use splclock() to prevent interrupts that want the kernel lock.
2003-01-07 10:57:18 +00:00
mrg
141297688f
revert (most of) previous
2003-01-07 10:31:56 +00:00
mrg
c0338e49bf
don't do the xcall() dance on sun4d for the cache flushing, but do make
...
sure we're only doing one flush at a time...
2003-01-07 05:57:37 +00:00
wiz
1035faff1d
writable, not writeable.
2003-01-06 20:30:28 +00:00
pk
0a66c7efe5
Protect FPU context switching with its own lock.
2003-01-06 18:32:31 +00:00
lukem
4bb41ae2f2
Rework how KERNOBJDIR functions; now it's always determined with
...
cd ${KERNSRCDIR}/${KERNARCHDIR}/compile && ${PRINTOBJDIR}
This is far simpler than the previous system, and more robust with
objdirs built via BSDOBJDIR.
The previous method of finding KERNOBJDIR when using BSDOBJDIR by
referencing _SRC_TOP_OBJ_ from another directory was extremely
fragile due to the depth first tree walk by <bsd.subdir.mk>, and
the caching of _SRC_TOP_OBJ_ (with MAKEOVERRIDES) which would be
empty on the *first* pass to create fresh objdirs.
This change requires adding sys/arch/*/compile/Makefile to create
the objdir in that directory, and descending into arch/*/compile
from arch/*/Makefile. Remove the now-unnecessary .keep_me files
whilst here.
Per lengthy discussion with Andrew Brown.
2003-01-06 17:40:18 +00:00
mrg
675149a358
- md_fpumid = -1 => md_fpu = NULL, in some #ifdef FPU_DEBUG code
...
- only call KERNEL_PROC_UNLOCK() if we called KERNEL_PROC_LOCK() originally.
2003-01-06 14:16:10 +00:00
pk
67998a8646
Move schedintr() to clock.c and initialise schedhz in initclocks(), so
...
these are available to all timer implementations.
2003-01-06 12:50:43 +00:00
pk
9a9c991837
Fix SP tlb_flush_{ctx,all} macros.
2003-01-06 12:10:46 +00:00
pk
9df7616ed3
Combine the various sun4m/sun4d TLB flush routines into a hand-coded
...
assembler version.
2003-01-05 19:38:42 +00:00
pk
c0142e4ded
Print the cpu number in many pmapdebug-controlled debug traces.
2003-01-05 19:31:12 +00:00
pk
113229a2cb
trap(T_FPE): reset the `p_md.md_fpu' when preempting the FPU.
2003-01-05 19:26:17 +00:00
pk
3e2e9af6c9
Grab the kernel lock on interrupts at level IPL_CLOCK and lower.
2003-01-04 19:25:36 +00:00
pk
5e73320f0f
Re-arrange the fields in struct cpu_info such that the most heavily used ones
...
are together, to reduce cache stomping.
2003-01-04 18:54:45 +00:00
pk
f6fc3bd5fc
new cpu_switch: SMP: even if we pick up the same process after idling, we
...
must reset its context as the process might have run on another cpu in
between and had its context changed, e.g. by exec(2).
2003-01-04 11:09:18 +00:00
mrg
277fb5e18a
remove a now bogus comment from xcall()
2003-01-03 16:27:23 +00:00
mrg
68da24bd3d
- remove some dead debug code
...
- don't cross call the smp_tlb_flush*() routines on SUN4D, just ensure
that there is only one concurrent flush happening.
2003-01-03 16:24:50 +00:00
mrg
fb1500c7e1
remove dead extern fpproc/foundfpu declarations.
2003-01-03 16:21:05 +00:00
mrg
5b23b7800a
FPU save is handled in xcall() now.
2003-01-03 16:20:21 +00:00
pk
444faacaac
xcall(): consult the `cpuset' argument for posting the cross calls.
2003-01-03 15:49:11 +00:00
pk
0a78c9e13a
Define a few XCALL? shorthand macros to avoid clutter.
2003-01-03 15:44:55 +00:00
pk
ff451161e2
Finish FPU context switching on SMP systems.
2003-01-03 15:12:02 +00:00
martin
87a073002c
Make the *_stream_* methods always use the *_real accessors.
...
Define __BUS_SPACE_HAS_STREAM_METHODS.
2003-01-03 13:23:39 +00:00
mrg
7bd617d237
part one of bus_space(9) fixes to enable bus spaces to override the
...
bus_space_{read,write}_[1248]() functions, which will allow 16-bit
PCMCIA support to work without additional hacks in MI drivers.
this option is not enabled yet.
2003-01-03 11:57:45 +00:00
pk
947028ed94
reverse mailbox physical address check: now warn if it's not I/O space.
2003-01-03 09:22:11 +00:00
pk
3f5be1863e
srmmu cache flush: use to the CPU context parameter; this is now required.
2003-01-03 09:19:03 +00:00
mrg
c79ff46cb6
don't try to setup MXCC registers on non-primary CPU's on systems without
...
SMP support.
2003-01-02 09:42:09 +00:00
pk
9dd42c6155
SMP: lock kernel for soft interrupts < IPL_SCHED as well.
2003-01-01 16:17:10 +00:00
pk
3607bd7dca
pmap_alloc_cpu: use flags from boot cpu for now, as the passed cpu_info
...
structure has not been fully setup yet.
2003-01-01 15:56:11 +00:00
pk
16305a65cb
prom mailbox map: look for the property `mailbox-virtual' first.
2003-01-01 15:51:00 +00:00
mrg
2fff4ee989
fix a comment.
2003-01-01 08:24:48 +00:00
mrg
d06249b555
KNF.
2003-01-01 06:33:29 +00:00
thorpej
9c1214153c
Use aprint_normal() for cfprint routines.
2003-01-01 02:20:47 +00:00
pk
2aac3c7c89
Slight optimisation in proc_trampoline().
2002-12-31 17:07:36 +00:00
pk
1df04e663f
Make the schedintr() code common for all timers.
2002-12-31 16:45:52 +00:00
pk
7b7269ba42
New version of cpu_switch/switchexit, mostly to simplify SMP support. It's
...
currently conditional on ALT_SWITCH_CODE (defaults to `on' if MULTIPROCESSOR
is defined) until more testing rounds are completed.
2002-12-31 16:17:12 +00:00
pk
3d8def4865
Use a soft interrupt scheme to schedule schedclock(), so we can make
...
splsched() less than splhigh().
2002-12-31 15:57:26 +00:00
pk
67e16e38a4
Define IPL_SCHED at level 11 and make splsched() use it.
2002-12-31 15:51:18 +00:00
pk
d358537b64
Pass the CPU context to all TLB flush routines. Because of this (and the
...
fact that cache flushes are also passed the context number), most
"long-term" context switches can be eliminated from the SRMMU versions
of the pmap functions.
2002-12-31 15:23:29 +00:00
pk
83dae8a821
* map the PROM CPU mailbox if available.
...
* map MXCC error/status registers if available.
* add MXCC-specific module error interrupt handler.
* use high priority interrupt level in mp_pause_cpus()
2002-12-31 15:10:28 +00:00
pk
2b59d26892
Add offset for `cpuinfo.ci_tt'.
2002-12-31 15:05:48 +00:00
pk
c3bb05ff5b
* Add level argument to raise_ipi()
...
* Add diagnostic field members to cpu_info.
2002-12-31 15:04:49 +00:00
pk
5c671fd10d
nmi_sun4m: run handler at splhigh()
2002-12-31 14:34:54 +00:00
pk
43b86d0b59
rwindow debug code: display the current cpu number.
2002-12-31 13:17:23 +00:00
pk
a1e9e5cae8
Add some more definitions: SRMMU and MXCC reset register.
2002-12-31 12:01:27 +00:00
mrg
122353da40
rename CPU_READY() to CPU_NOTREADY() seeing that's what it checks.
2002-12-28 02:35:56 +00:00
mrg
7d51aacb32
update the vme bus_space_tag_t to reality.
2002-12-28 01:33:00 +00:00
martin
ffbcb6d927
Conditionalize T_DBPAUSE trap handling on #ifdef MULTIPROCESSOR to make
...
single CPU kernels compile again.
2002-12-26 12:14:31 +00:00
pk
f8055a350c
* Use correct PC value for displaying the called function.
...
* Merge code to display non-kernel frames.
2002-12-23 13:21:10 +00:00
pk
f953a01835
xcallintr() receive a `clockframe *' argument, not a `trapframe *'.
...
Setup a DDB context for paused CPUs by defining a soft trap (T_DBPAUSE)
which uses the generic trap handler code to get the trapframe constructed
and then calls on a debugger-defined `suspend' routine.
2002-12-23 00:55:16 +00:00
pk
5c62f82bdf
Upon trap exit, update the trapframe with data for the running CPU rather
...
than the one which was the last target of the `machine cpu' command.
2002-12-23 00:42:37 +00:00
mrg
6ee482ef5b
change what 'hw.model' reports to be more inline with other netbsd ports, as
...
well as reporting the actual machine model & cpu, rather than first configured
CPU. changes for two machines are:
old:
hw.model = TMS390Z50 v0 or TMS390Z55 @ 75 MHz, on-chip FPU
hw.model = SUNW,UltraSPARC @ 143.002 MHz, version 0 FPU
new:
hw.model = SUNW,SPARCstation-20 (TMS390Z50 v0 or TMS390Z55 @ 75 MHz, on-chip FPU)
hw.model = SUNW,Ultra-1 (SUNW,UltraSPARC @ 143.002 MHz, version 0 FPU)
as per discussion on port-sparc & port-sparc64.
2002-12-22 02:17:24 +00:00
manu
4a06119a9d
Pass the system call table to trace_enter() and ktrsys() so that it is
...
possible to use alternate system call tables. This is usefull for
displaying correctly the arguments in Mach binaries traces.
If NULL is given, then the regular systam call table for the process is used.
2002-12-21 16:23:56 +00:00
pk
4e0634669b
* xcallintr(): use cpuinfo directly again.
...
* nmi_soft(): remove most of the obsoleted requests.
2002-12-21 12:55:54 +00:00
pk
0408b1cbc8
tlb_flush_segment() and tlb_flush_region() now take a virtual address
...
argument instead of segment and region numbers.
2002-12-21 12:52:55 +00:00
pk
82815de0ad
Use xcall() to broadcast MMU TLB flushes.
2002-12-21 12:13:38 +00:00
pk
8dcde9f5b1
* cpu_hatch(): enable interrupts upon return from cpu_setup().
...
* interrupt trap: acquire the kernel lock only for interrupt levels <= PIL_SCHED
2002-12-21 11:57:41 +00:00
pk
1d8dc4daf2
* getcacheinfo_obp(): also initialise the cacheinfo i/d associativity fields
...
in the case of a unified cache.
* xcall(): slightly optimise the `wait for other CPUs' loop.
2002-12-21 11:48:55 +00:00
pk
f0a20f1305
* mark selected fields of `struct xpmsg' as volatile, instead of the whole
...
structure.
* change volatile => __volatile
2002-12-19 16:31:38 +00:00
pk
2fba4e01ff
Mark CPUs that did not spin up properly and don't enable them later on.
2002-12-19 11:20:30 +00:00
pk
75c5f270d2
Brush-up the generic cross-call routine and use it to implement the SMP
...
cache flush ops.
Also a standard soft interrupt handler for standard cross-call notification
reserving the NMI level 15 softint for urgent cross calls.
2002-12-19 10:38:28 +00:00
pk
eaf530d598
Sprinkle volatiles to avoid register allocation, esp. in cross-call
...
synchronisation functions used in SMP kernels.
2002-12-19 10:30:39 +00:00
pk
ec2b1c3c64
smp_cache_flush() also takes a context parameter.
2002-12-19 10:27:19 +00:00
pk
2076dbdb04
Install the sparc V8 multiply/divide routines after we've collected some
...
basic information on the CPUs.
2002-12-18 11:56:43 +00:00
mrg
1a854929dd
we use nmi_hard and nmi_soft on SUN4D as well
2002-12-18 06:20:36 +00:00
pk
a26cbfba69
Deal with an `unimplemented flush' trap from kernel mode.
2002-12-17 10:04:19 +00:00
pk
c2ddc52f2d
The cache flush routines now take a CPU context parameter. This is going
...
to be necessary in SMP kernels.
2002-12-16 16:59:09 +00:00
pk
b036b089a7
Multiple inclusion protection.
2002-12-16 16:24:40 +00:00
jdc
0a3a2262cb
Increment version number for match function and Cycle 5 IP changes.
2002-12-16 13:02:58 +00:00
jdc
079b83cafa
Extend the matching routine to take a function pointer, so that additional
...
(arbitrary) matching can be done.
Add match function and patch for Cycle 5 IP (Sparc 5 clone).
Reviewed by Uwe.
2002-12-16 13:01:01 +00:00
martin
ae7d5baab6
Fix pasto - make it compile for !MULTIPROCESSOR
2002-12-15 23:01:09 +00:00
pk
9313f9570d
Disable `unimplemented flush' traps during boot. Keep it disabled on
...
non-MULTIPROCESSOR kernels.
2002-12-15 15:01:08 +00:00
christos
cc079cff49
release the kernel lock if trace_enter fails.
...
XXX[1]: We need to fix all platforms that do this.
XXX[2]: x86 does not check for MPSAFE syscalls before grabbing the lock.
2002-12-14 14:52:24 +00:00
pk
f4fe3fda21
dumpsys(): Use pmap_kremove() to unmap pages mapped pmap_kenter().
2002-12-12 09:34:04 +00:00
pk
047870f66e
softintr_establish(): append handler to the list for the actually choosen
...
processor interrupt level.
2002-12-11 13:21:19 +00:00
pk
e675712f0d
* loadfile() return a file descriptor that must be closed.
...
* check the kernel size before loading
2002-12-11 10:35:06 +00:00
thorpej
e8cc3884de
Rename __LDPGSZ to AOUT_LDPGSZ, to accurately reflect what it is.
2002-12-10 17:14:02 +00:00
pk
725a6aebf7
Remove the `flags' argument from bus_intr_establish().
2002-12-10 13:44:47 +00:00
pk
5446e96bac
bus_intr_establish() now takes an optional `fast trap' handler argument.
...
BUS_INTR_ESTABLISH_FASTTRAP and BUS_INTR_ESTABLISH_SOFTINTR are no longer used.
2002-12-10 12:16:25 +00:00
pk
45c45fca81
intr_establish() signature change: pass NULL for the `fast trap' argument.
2002-12-10 12:13:24 +00:00
pk
fe233fdc10
The `fast trap' handlers are now pssed as an optional argument to
...
bus_intr_establish(). Allow fall-back on a regular interrupt handler if
the interrupt level must be shared with another device.
2002-12-10 12:11:21 +00:00
pk
4f62e0f7c8
* intr_establish() now takes an optional `fast trap' routine argument.
...
* also remove __P().
2002-12-10 12:04:51 +00:00
pk
6f945ab887
Allow a `fast trap' handler installation to be undone if an interrupt level
...
must be shared. This requires drivers that request the installation of
a `fast trap' handler to supply a regular interrupt handler as well to fall
back on.
The `fast trap' routine (if present) is now passed as an additional
argument to intr_establish().
2002-12-10 12:03:08 +00:00
thorpej
78ea2dd367
Use __LDPGSZ (which must be == USRTEXT) as the text address for a.out
...
executables, and eliminate the USRTEXT constant, which was only used
by the a.out exec code.
2002-12-10 05:14:24 +00:00
pk
04e582df1b
setsoftint() is no longer used.
2002-12-09 16:13:58 +00:00
pk
48a30a2e35
Soft interrupts use their own set of handlers lists.
2002-12-09 16:13:23 +00:00
pk
c822c6bd84
Finish the switch to the softintr(9) framework.
...
To make this work, we now have to use separate handler lists for hardware
and software interrupts as the soft interrupt handlers do not return
an `interrupt handled' status.
Thanks to Matt Fredette for providing an initial set of patches on port-sparc.
2002-12-09 16:11:50 +00:00
pk
74a8332ee9
cpu_switch(): avoid raising the interrupt level and enabling traps at the
...
same time as this may cause a spurious interrupt in some implementations.
Pointed out by uwe.
2002-12-08 16:16:59 +00:00
uwe
38b8c5689a
Use 0x07ffffff for LOADADDR mask. This still provides for 128MB (and
...
given that PROM maps just 4 or 16 this is not going to be a bottle
neck). Doesn't really affect normal kernels, need it for the changed
kernel base address (uncommitted) hack for broken javastation OFW.
Ok by pk.
2002-12-08 14:36:55 +00:00
pk
6c8d3fba22
Use MI versions of {set,rem}runqueue().
2002-12-07 10:27:03 +00:00
pk
9ebe0ee7a6
ienab_bi[cs] are never used in a context common to both sun4/4c and sun4m,
...
so there's no point in constructing common entry points for them in locore.s.
2002-12-06 17:45:39 +00:00
pk
1b719337bb
Pass the `device class interrupt level' on to intr_establish() and use to
...
raise the ipl in the interrupt handlers to the appropriate level. This avoids
interrupt handler interference if one of the devices actually interrupts at
a lower hardware level than the maximum level assined to a device class.
Based on code from Art Grabowski in openbsd.
2002-12-06 16:04:11 +00:00
pk
721e534a25
Use IPL_SOFTFDC.
2002-12-06 15:37:55 +00:00
pk
e093913db8
Use IPL_SOFTAUDIO.
2002-12-06 15:37:39 +00:00
pk
060fa93542
Start using IPL_* constants from intr.h; phase out PIL_* in psl.h
2002-12-06 15:36:45 +00:00
fredette
0fee3368c3
Fixed a null pointer passed to printf().
2002-12-05 18:05:33 +00:00
uwe
6c05e7879f
Fix an options<space><tab> nit.
2002-12-04 23:30:40 +00:00
uwe
23c0293ee7
The chip treats weekday 1 == Sunday, correct dt_wday adjustment logic
...
appropriately. NB: the old code would never write weekday zero that,
I've been told, might cause the RTC to reset.
Pointed out by kenh.
2002-12-03 17:54:54 +00:00
pk
59c9274871
Always get the `mid' cpu property. Whine if it's not set on an actual
...
multi-processor machine.
2002-11-29 08:29:57 +00:00
pk
03549142e0
Find the CPU architecture version early in the bootstrap phase, and switch
...
to the V8 specific .mul/.div/.rem routines while we still have a writable
.text section.
2002-11-29 08:02:05 +00:00
pk
565cedc81e
Provide the V8 mul/div routines for SUN4D as well.
2002-11-29 07:56:50 +00:00
pk
6564749632
Move the installation of v8 specific .mul/.div functions into a separate
...
routine to be called when we're sure the CPU is actually sparc version 8.
2002-11-28 15:32:15 +00:00
pk
8d141cba88
Not all sun4m platforms have version 8 sparc CPUs. So go out to the PROM
...
and get the CPU architecture version from the PROM cpu node `sparc-version'
property.
2002-11-28 15:29:53 +00:00
pk
f19c04e3ed
Move timer{match,attach}_mainbus() back into timer.c, since the `timer at
...
mainbus' configuration declaration is orthogonal to the configured SUN4[CM]
platform options.
2002-11-28 14:18:31 +00:00
pk
ba4983b5db
Provide sparc v8 multiply/divide routines which are copied over the base
...
v7 versions on sun4m and sun4d machines. Based on Chris Torek's BSD/OS
code.
2002-11-27 16:08:34 +00:00
lukem
0635de35a3
Remove KDIR=, since SYS_INCLUDE=symlinks and KDIR are not supported any more.
2002-11-26 23:30:07 +00:00
christos
729ccbc9cd
si_ -> sel_
2002-11-26 19:49:00 +00:00
thorpej
09dfaace39
The traditional C preprocessor is fixed in GCC 3.3 now, so no need
...
to skip -traditional-cpp for HAVE_GCC3.
2002-11-26 18:51:12 +00:00
pk
007c037980
* pmap_destroy(): reset the region gap
...
* pmap_quiet_check(): add check for pmeg leaks on sun4/4c (this is DEBUG only).
2002-11-26 15:09:56 +00:00
pk
0fad562c7c
The presence of the `timer at obio' attachment is independent of the
...
various CPU support settings.
2002-11-26 14:43:39 +00:00
pk
ec667a0f51
Add `machdep.cpu_arch' sysctl to determine the CPU architecture version.
...
Currrently, cpu types `sun4' and `sun4c' produce version 7, all others
version 8.
2002-11-26 14:36:10 +00:00
martin
070e18f3f3
Assign a major number for "lpt* at ebus?".
2002-11-24 20:58:06 +00:00
wiz
e78e668887
Fix typo (responsiness -> responsiveness).
2002-11-22 12:20:58 +00:00
manu
d584ed9598
Add a realcode argument to trace_enter and ktrsyscall. realcode is the
...
original system call number, which can be negative for a Mach trap.
We cannot just replace code by realcode, because ktrsyscall uses it as
an index in the system call table, thus crashing the kernel when the
value is negative.
2002-11-15 20:06:00 +00:00
uwe
7e95293c56
Use BOOT_FLAG() macro to process flags.
2002-11-09 01:35:54 +00:00
uwe
7a7c188182
Oh, COPTS in config overrides optimizations again.
2002-11-08 22:51:53 +00:00
mrg
603098b9b5
implement separate read/write disk statistics:
...
- disk_unbusy() gets a new parameter to tell the IO direction.
- struct disk_sysctl gets 4 new members for read/write bytes/transfers.
when processing hw.diskstats, add the read&write bytes/transfers for
the old combined stats to attempt to keep backwards compatibility.
unfortunately, due to multiple bugs, this will cause new kernels and old
vmstat/iostat/systat programs to fail. however, the next time this is
change it will not fail again.
this is just the kernel portion.
2002-11-01 11:31:50 +00:00
petrov
71614764a4
Compile with an ISO C preprocessor.
2002-10-30 01:46:09 +00:00
chs
f921b6a46c
make this compile with DEBUG (name changes missed in rev. 1.172).
2002-10-27 18:39:17 +00:00
jdolecek
c82ab2eb79
now that mem_no is emitted by config(8), there is no reason to keep
...
copy of more or less identical iskmemdev() for every arch; move the function
to spec_vnop.c, and g/c machine-dependant copies
2002-10-26 13:50:17 +00:00
jdolecek
e0cc03a09b
merge kqueue branch into -current
...
kqueue provides a stateful and efficient event notification framework
currently supported events include socket, file, directory, fifo,
pipe, tty and device changes, and monitoring of processes and signals
kqueue is supported by all writable filesystems in NetBSD tree
(with exception of Coda) and all device drivers supporting poll(2)
based on work done by Jonathan Lemon for FreeBSD
initial NetBSD port done by Luke Mewburn and Jason Thorpe
2002-10-23 09:10:23 +00:00
uwe
af2a75546d
Clean-up kbd driver layers a bit more. Lift common code into the upper layer.
...
Add some wskbd TODO remarks (hi, martin).
2002-10-21 15:36:35 +00:00
uwe
35ec23469c
Correct zstty interface attribute (cf files.sparc64 1.69).
...
Comment out unused kbd_tty and ms_tty attachments.
2002-10-21 15:25:42 +00:00
martin
f19a67c55f
Allow hyphen in kernel names. Bump version.
...
Should fix PR 13429 and PR 18691.
2002-10-20 20:55:38 +00:00
junyoung
e4b7588c28
Add NEW_BUFQ_STRATEGY (disabled by default).
2002-10-18 15:11:08 +00:00
martin
9b3cdc3ab5
Make 32bit sparc64 kernels with DEBUG and DIAGNOSTIC compile.
2002-10-16 11:05:10 +00:00
jdc
86fda61426
Uncomment audioamd0 at obio0.
2002-10-15 13:53:01 +00:00
jdc
d1f466e658
Add audioamd at obio attachment. Now we have working audio on 4/600's :
...
audioamd0 at obio0 slot 0 offset 0x500000 level 13 softpri 4
audio0 at audioamd0: full duplex
2002-10-15 13:49:52 +00:00
elric
5ab71e20b0
Added commented out cgd(4)s to GENERIC configs.
2002-10-14 18:39:22 +00:00
takemura
900b200c92
Moved MI APM definitions into dev/apm.
2002-10-14 02:08:37 +00:00
jdc
050645f10a
Check only the physical address of serial ports on a Sun 4.
...
Reviewed by Uwe.
2002-10-09 08:56:25 +00:00
uwe
a931c80c22
G/c unnecessary includes.
2002-10-08 18:00:46 +00:00
martin
44a2c6cb31
All sparc64 CPUs do __HAVE_CPU_COUNTER (aka %tick).
2002-10-07 13:26:56 +00:00
provos
2f7a0aaac8
add SYSTRACE; approved perry.
2002-10-06 02:11:54 +00:00
elric
d19d268a95
assign majors for raw and cooked cgd's.
2002-10-04 18:28:24 +00:00
uwe
fbcf88f171
Add wscons. Misc catch-up with GENERIC.
2002-10-03 17:45:20 +00:00
uwe
fa76f154c6
Add majors for wscons devices.
...
And, no! This does not mean that sparc switches to wscons.
Only Krups has experimental wscons support so far.
2002-10-03 17:06:18 +00:00
uwe
7235b5d479
First cut at PS/2 keyboard and mouse drivers that talk Sun firm events.
...
Console and Xsun for Mr.Coffee.
2002-10-03 16:27:04 +00:00
uwe
fb2195ae8f
Search children of the "8042" node to check if keyboard is the stdin.
2002-10-03 16:22:46 +00:00
uwe
191626f788
Refactor kbd and mouse drivers so that they can use different middle
...
layers. Common middle layer shared by kbd_zs and sunkbd is moved into
the new file. Move shared config directives to files.sun and adjust
ports' files.* accordingly.
Need this to support console/Xsun on Mr.Coffee JavaStation.
Tested on sparc, sparc64 (by martin) and sun3 (by jdc).
2002-10-03 16:13:24 +00:00
thorpej
4bf871a755
Add trailing ; to CFATTACH_DECL.
2002-10-02 16:02:08 +00:00
thorpej
c1077f220d
Use CFATTACH_DECL().
2002-10-01 18:57:48 +00:00
wiz
b1c7ac0e6d
"definitions" has lots of 'i's, but that's not reason to leave one out.
2002-09-29 23:23:56 +00:00
thorpej
f818766afe
Declare all cfattach structures const.
2002-09-27 20:31:45 +00:00
provos
0f09ed48a5
remove trailing \n in panic(). approved perry.
2002-09-27 15:35:29 +00:00
thorpej
6c88de3b53
Introduce a new routine, config_match(), which invokes the
...
cfattach->ca_match function in behalf of the caller. Use it
rather than invoking cfattach->ca_match directly.
2002-09-27 03:17:40 +00:00
thorpej
d1ad2ac4f2
Rather than referencing the cfdriver directly in the cfdata entries,
...
instead use a string naming the driver. The cfdriver is then looked
up in a list which is built at run-time.
2002-09-27 02:24:06 +00:00
thorpej
274c086b22
Remove <sys/map.h>
2002-09-26 18:54:30 +00:00
thorpej
71404bb533
Don't include <sys/map.h>.
2002-09-25 22:21:01 +00:00
martti
81e8d78cd4
Add one space between "#option" and "<tab>IPFILTER_DEFAULT_BLOCK"
2002-09-25 11:49:48 +00:00
thorpej
787cbc6921
Fix some const warnings.
2002-09-24 18:14:35 +00:00
simonb
63096043b3
Use "#define\t" instead of "#define ".
2002-09-22 08:30:56 +00:00
chs
c081614ea2
it really helps to get the stub right before cutting + pasting it 27 times.
...
alas, I did not. doh.
2002-09-22 07:53:39 +00:00
chs
55e1f79335
add pmap_remove_all() hook (empty on most platforms so far).
2002-09-22 07:17:08 +00:00