Sprinkle volatiles to avoid register allocation, esp. in cross-call
synchronisation functions used in SMP kernels.
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ec2b1c3c64
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@ -1,4 +1,4 @@
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/* $NetBSD: cpuvar.h,v 1.41 2002/12/16 16:59:11 pk Exp $ */
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/* $NetBSD: cpuvar.h,v 1.42 2002/12/19 10:30:39 pk Exp $ */
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/*
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* Copyright (c) 1996 The NetBSD Foundation, Inc.
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@ -221,13 +221,13 @@ struct cpu_info {
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char fpu_namebuf[32];/* Buffer for FPU name, if necessary */
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/* various flags to workaround anomalies in chips */
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int flags; /* see CPUFLG_xxx, below */
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volatile int flags; /* see CPUFLG_xxx, below */
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/* Per processor counter register (sun4m only) */
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struct counter_4m *counterreg_4m;
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volatile struct counter_4m *counterreg_4m;
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/* Per processor interrupt mask register (sun4m only) */
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struct icr_pi *intreg_4m;
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volatile struct icr_pi *intreg_4m;
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#define raise_ipi(cpi) do { \
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(cpi)->intreg_4m->pi_set = PINTR_SINTRLEV(15); \
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} while (0)
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@ -241,7 +241,7 @@ struct cpu_info {
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struct proc *ci_curproc; /* CPU owner */
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struct proc *fpproc; /* FPU owner */
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/* XXX */
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void *ci_ddb_regs; /* DDB regs */
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volatile void *ci_ddb_regs; /* DDB regs */
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/*
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* Idle PCB and Interrupt stack;
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@ -319,7 +319,7 @@ struct cpu_info {
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void (*memerr)(unsigned, u_int, u_int, struct trapframe *);
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/* Inter-processor message area */
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struct xpmsg msg;
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volatile struct xpmsg msg;
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#if defined(DIAGNOSTIC) || defined(LOCKDEBUG)
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u_long ci_spin_locks; /* # of spin locks held */
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@ -422,7 +422,8 @@ void pmap_alloc_cpu (struct cpu_info *);
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void pmap_globalize_boot_cpu (struct cpu_info *);
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#if defined(MULTIPROCESSOR)
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void raise_ipi_wait_and_unlock (struct cpu_info *);
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void cross_call (int (*)(int, int, int, int), int, int, int, int, int);
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typedef int (*xcall_func_t)(int, int, int, int);
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void xcall (xcall_func_t, int, int, int, int, int);
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#endif
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extern struct cpu_info **cpus;
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@ -1,4 +1,4 @@
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/* $NetBSD: db_interface.c,v 1.45 2002/12/16 16:59:11 pk Exp $ */
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/* $NetBSD: db_interface.c,v 1.46 2002/12/19 10:30:39 pk Exp $ */
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/*
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* Mach Operating System
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@ -264,17 +264,16 @@ db_resume_others(void)
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static void
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ddb_suspend(struct trapframe *tf)
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{
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db_regs_t regs;
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volatile db_regs_t regs;
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regs.db_tf = *tf;
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regs.db_fr = *(struct frame *)tf->tf_out[6];
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cpuinfo.ci_ddb_regs = ®s;
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while (cpuinfo.flags & CPUFLG_PAUSED)
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cache_flush((caddr_t)&cpuinfo.flags, sizeof(cpuinfo.flags));
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cpuinfo.ci_ddb_regs = 0;
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while (cpuinfo.flags & CPUFLG_PAUSED) /*void*/;
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cpuinfo.ci_ddb_regs = NULL;
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}
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#endif
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#endif /* MULTIPROCESSOR */
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/*
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* kdb_trap - field a TRACE or BPT trap
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@ -528,7 +527,7 @@ db_cpu_cmd(addr, have_addr, count, modif)
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return;
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}
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db_printf("using cpu %ld", addr);
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ddb_regp = ci->ci_ddb_regs;
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ddb_regp = (void *)ci->ci_ddb_regs;
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}
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#endif /* MULTIPROCESSOR */
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