Stanislav Shwartsman
e357da9150
update (c) for fpu files
2017-05-05 21:09:27 +00:00
Stanislav Shwartsman
1abfcd39ff
implement FOPCODE and FDP deprecation CPU features
2017-05-05 20:56:13 +00:00
Stanislav Shwartsman
fce7476bda
convert magic defines into static const variables
2017-05-03 18:20:13 +00:00
Stanislav Shwartsman
3d51439090
fixed compilation err for CPU_LEVEL=5
2017-04-13 05:33:29 +00:00
Stanislav Shwartsman
1a3ff4b438
fixed bogus error message
2017-04-11 18:35:17 +00:00
Stanislav Shwartsman
bad84e48cd
remove redundant memory access from IRET
2017-04-01 05:49:01 +00:00
Stanislav Shwartsman
e351aaa28a
update (c) for tlb.h
2017-03-31 07:34:44 +00:00
Stanislav Shwartsman
a51eb1cc39
added more debug info for TLB through param tree, update year in the (c)
2017-03-31 07:34:08 +00:00
Stanislav Shwartsman
c9c3672509
allow monitor to UC memory type but not MONITORX
2017-03-31 07:00:36 +00:00
Stanislav Shwartsman
566a7aa82b
fixed softfloat FUZ condition. fixed/optimized pmaddwd computing function
2017-03-30 22:11:38 +00:00
Stanislav Shwartsman
a6e7ffb284
implemented undefined flags behavior for SHRD instruction matching HW
2017-03-30 22:03:38 +00:00
Stanislav Shwartsman
097310cd00
fixed integer overflow while computing shift flags, avoid using bx_bool while working with flags for more robust code
2017-03-30 21:53:39 +00:00
Stanislav Shwartsman
862e817884
fixed typo caused compilation err
2017-03-28 19:13:20 +00:00
Stanislav Shwartsman
31d29734d6
some comments about more CPUID leaf 80000008.EBX by Ryzen
2017-03-28 19:11:42 +00:00
Stanislav Shwartsman
b7b0165d3c
new naming convention for UD opcodes
2017-03-28 19:00:00 +00:00
Stanislav Shwartsman
a673612784
fixed permission checks performed by CLFLUSH/CLFLUSHOPT/MONITOR* instructions
2017-03-28 18:52:53 +00:00
Stanislav Shwartsman
e5c64b3b56
cleanup of warning messages from cpuid code
2017-03-26 20:12:14 +00:00
Stanislav Shwartsman
2b79061127
Implemented MONITORX/MWAITX instructions (AMD), enabled in Ryzen CPU model
2017-03-26 19:14:15 +00:00
Volker Ruppert
dd2d03ec0a
The 'del' command doesn't like forward slashes, so the MSVC nmake 'clean'
...
target skipped files in subfolders. Updated cpu makefile dependencies.
2017-03-26 15:55:57 +00:00
Stanislav Shwartsman
411ea954b4
implemented CLZERO instruction from AMD Ryzen CPU
2017-03-25 20:12:31 +00:00
Volker Ruppert
9bef555f3e
Updated build test script and fixed compilation without FPU.
2017-03-19 09:50:16 +00:00
Volker Ruppert
640f5e2ce9
Fixed compilation error.
2017-03-19 07:26:56 +00:00
Stanislav Shwartsman
2c5588cda0
convert some defines to enums and consts
2017-03-18 21:25:06 +00:00
Stanislav Shwartsman
2809e7f5ad
fixed warnings in the cpu code
2017-03-18 07:32:17 +00:00
Stanislav Shwartsman
15d9b068a3
fix msvc warnings
2017-03-17 17:35:15 +00:00
Stanislav Shwartsman
99bfbdf139
add xss exiting bitmap to save/restore
2017-03-16 20:23:49 +00:00
Stanislav Shwartsman
3f80447a10
fixed compilation err with x86-64 disabled
2017-03-16 20:13:42 +00:00
Stanislav Shwartsman
be4c6c7ae5
SMAP opcodes are No-SSE-Prefix
2017-03-16 16:20:58 +00:00
Stanislav Shwartsman
172b0106ac
imvent a bochs feature for AMD TCE and enable EFER.TCE bit
2017-03-15 22:52:08 +00:00
Stanislav Shwartsman
6edf22e754
finally figured out what TCE means in AMD CPUID - and it has EFER.TCE bit related to it
2017-03-15 22:48:27 +00:00
Stanislav Shwartsman
ebbf8f9e0f
adjustments in AMD Ryzen CPUID
2017-03-15 22:14:10 +00:00
Stanislav Shwartsman
3a033fa6db
implemented xsaves/xrstors extensions (supported by Intel Skylake core and AMD Ryzen)
2017-03-15 21:44:15 +00:00
Volker Ruppert
8796abeea6
Some fixes in the build system.
...
- Makefile: cleanup of the 'clean' target (adds missing 'bxhub').
- configure script: create cpudb subdirectories if necessary for building
outside of the source tree.
- cpudb Makefile: clean object files from new location.
2017-03-15 16:51:32 +00:00
Stanislav Shwartsman
c0701a6d42
fixup for Ryzen cpuid
2017-03-13 20:23:39 +00:00
Stanislav Shwartsman
402e2cfad0
move cpuid warning messages to base cpuid class - reduce code cleanup
2017-03-13 19:59:48 +00:00
Stanislav Shwartsman
07166f14b7
reorg of cpudb folder, added AMD Ryzen CPUID placeholder module (still not 100% correct)
2017-03-13 19:44:14 +00:00
Stanislav Shwartsman
980eaa7937
move cpuid leaf 80000008 to base bx_cpuid_t class to remove code dupolication
2017-03-09 21:25:18 +00:00
Stanislav Shwartsman
8664f8f21e
add vex.w into bxInstruction to be used in disasm
2017-01-28 19:25:30 +00:00
Stanislav Shwartsman
49c537521a
simplify disasm code by splitting it into functions
2017-01-22 19:53:42 +00:00
Volker Ruppert
6cf6f6967a
Fixed cpu "make clean" target.
2017-01-13 16:13:42 +00:00
Stanislav Shwartsman
af1d83f35d
update (c)
2017-01-11 20:54:09 +00:00
Stanislav Shwartsman
521d2d10c4
correctly fixed x32 emu compilation err + bugfix for AVX decoder
2017-01-11 20:51:58 +00:00
Stanislav Shwartsman
72e5213ff4
compilation fix and code simplifcation
2017-01-11 19:12:06 +00:00
Stanislav Shwartsman
90c4cb31c5
add SVN header to newly added files
2017-01-10 20:16:24 +00:00
Stanislav Shwartsman
10eb193e01
step 1 of rewrite Bochs decoder: legacy decoder tables done. TODO: avx/evex decoder tables, merge decoder and disasm together
2017-01-10 20:15:17 +00:00
Stanislav Shwartsman
9bd99a604f
implemented recently announced AVX-512 extension VPOPCNT
2016-12-17 13:47:45 +00:00
Stanislav Shwartsman
e613e9ff86
fixed compilation err when no AVX is enabled
2016-12-12 06:18:57 +00:00
Stanislav Shwartsman
7b2a8bb340
added missing EPT misconfig condition check
2016-12-10 05:06:59 +00:00
Stanislav Shwartsman
46b4a76cd3
fetchdecode rework step 0.1, no impact on correctness, small speedup
2016-12-09 12:34:37 +00:00
Stanislav Shwartsman
bd24d7fb17
fixed reset value of xcr0 as published in latest Intel SDM update
2016-10-08 15:17:12 +00:00
Stanislav Shwartsman
1543034fb7
in the latest intel docs PCOMMIT CPUID bit doesn't exists anymore
2016-10-02 11:56:18 +00:00
Stanislav Shwartsman
239f793f37
in the latest intel docs PCOMMIT CPUID bit doesn't exists anymore
2016-10-02 11:54:19 +00:00
Stanislav Shwartsman
42b0714992
rename fetchdecode.cc -> fetchdecode32.cc
2016-09-25 18:25:47 +00:00
Stanislav Shwartsman
d9e818cd5d
refactoring in the Bochs decoder code
2016-09-25 18:19:59 +00:00
Stanislav Shwartsman
8f20cecbae
fixed code style in fetchdecode.cc, avoid code duplication
2016-09-08 17:29:09 +00:00
Stanislav Shwartsman
b7091b09f6
cleanup in fetchdecode functions
2016-09-08 15:09:29 +00:00
Stanislav Shwartsman
14b7fff442
remove unexpected change in fetchdecode.cc
2016-08-30 18:43:36 +00:00
Stanislav Shwartsman
032da78e52
remove SMP and AVX from Android build script. reduce the binary size and make faster binary (SMP makes binary a lot slower)
2016-08-30 18:42:39 +00:00
Volker Ruppert
cd68194269
Added Android host platform support to Bochs based on SF patch #534 .
...
- added Android case to the configure script.
- renamed file memory.h to memory-bochs.h to fix conflict with NDK.
- fixed Android issues in some files.
2016-08-12 17:06:14 +00:00
Stanislav Shwartsman
46e932d04e
fixed INIT cpu state according to clarification published in SDM rev059
2016-07-17 19:16:58 +00:00
Stanislav Shwartsman
88637aa9ef
fixed potential uninitialized variable access when decoding AVX/XOP/EVEX
2016-07-06 09:09:49 +00:00
Stanislav Shwartsman
6761495f7e
second step if Bochs decoder refactoring: extracted assign_srcs code to separate methods
2016-07-05 20:42:25 +00:00
Stanislav Shwartsman
bccc0d40a3
more correct fix for load segment register instruction
2016-07-05 19:37:37 +00:00
Stanislav Shwartsman
2a98e7bc63
fixed decoder bug introduced in svn rev12927
2016-07-05 18:04:23 +00:00
Stanislav Shwartsman
152591469b
bugfix in lfs/lgs in long mode, introduced in svn rev12923
2016-07-05 17:47:36 +00:00
Stanislav Shwartsman
033303399d
properly set segment register for 64-bit decode
2016-07-03 20:07:16 +00:00
Stanislav Shwartsman
98da36a63f
extract decoding of modrm into dedicated function in decoder
2016-07-03 19:51:33 +00:00
Volker Ruppert
586031ca9f
Fixed makefile error.
2016-06-13 18:42:27 +00:00
Stanislav Shwartsman
7a34f00f99
extracted fetchdecode into separated folder under cpu and also out of BX_CPU_C class into stand-alone module. Next step: wrap it up nicely and define clear interace to CPU model to minimize dependencies. Ideally I need fetchdecode to not include CPU at all
2016-06-12 21:23:48 +00:00
Stanislav Shwartsman
8824539630
fix code duplication in segload instr emulation
2016-06-01 20:11:54 +00:00
Stanislav Shwartsman
09e6ee3143
compile disasm module when x86-64 is not compiled in
2016-05-12 11:16:05 +00:00
Stanislav Shwartsman
12ece81e19
look only on valid tlb entries in check_addr_in_tlb_buffers and tlb invalidation methods
2016-05-06 06:57:00 +00:00
Stanislav Shwartsman
dff5e9587b
fixed SMP mode compilation err
2016-05-05 14:15:17 +00:00
Stanislav Shwartsman
009bc7388b
implement more correct vmentry to shutdown sanity check
2016-05-03 19:29:22 +00:00
Stanislav Shwartsman
6a35ceb51a
fixed err msg description
2016-05-03 19:24:52 +00:00
Stanislav Shwartsman
405d7776e8
fixed typo
2016-05-03 19:20:26 +00:00
Stanislav Shwartsman
e1532260e4
fixe compilation on cpu model missing cr4
2016-05-02 17:33:06 +00:00
Stanislav Shwartsman
e24c7e403a
take a funtion from BX_CPU_C:: into fetchdecode.cc standalone function
2016-04-30 19:13:15 +00:00
Stanislav Shwartsman
793ceb0d8c
fix massive code dupliction between disasm, debugger and cpu by introducing new cpu decoder.h header
2016-04-29 21:01:28 +00:00
Stanislav Shwartsman
cc49b504b3
fix small issue on the way to Bochs decoder separation into stand-alone module
2016-04-26 12:46:44 +00:00
Stanislav Shwartsman
ca5882b310
fixed compilation with cpu-level < 5
2016-04-21 15:39:49 +00:00
Stanislav Shwartsman
87cb831a37
fixed compilation w/o x86-64 enabled
2016-04-20 14:46:02 +00:00
Stanislav Shwartsman
adc143684b
implemented Intel architecture extensions published in recently published SDM 058:
...
! Implemented UMIP: User Mode Instruction Prevention (don't allow execution of SLDT/SIDT/SGDT/STR/SMSW with CPL>0)
! Implemented RDPID instruction
Bugfixes in RDPKRU/WRPKRU instructions implementation (Protection Keys feature)
2016-04-15 11:35:32 +00:00
Stanislav Shwartsman
e4832af5ab
clean pkeys when not enabled to avoid side-effects
2016-03-19 21:15:56 +00:00
Stanislav Shwartsman
5b481fe34d
correctly set up pkeys when enabling through cr4
2016-03-19 19:48:38 +00:00
Stanislav Shwartsman
cbe50a9539
enable PKE bit in CR4
2016-03-16 19:44:24 +00:00
Stanislav Shwartsman
8fe26816dc
recalculate protection keys if cr0.wp change
2016-03-04 11:59:32 +00:00
Stanislav Shwartsman
bcb36e81fa
experimental implementation of protection keys paging extension published in SDM rev054. to enable configure with --enable-protection-keys
2016-03-02 20:44:42 +00:00
Stanislav Shwartsman
9308ad31c6
remove unused param from serveIcacheMiss
2016-02-22 19:57:24 +00:00
Stanislav Shwartsman
591039e588
removed debug print
2016-02-21 20:14:15 +00:00
Stanislav Shwartsman
de85547932
update popcnt functions to faster versions
2016-02-21 18:39:10 +00:00
Stanislav Shwartsman
88be61c3d9
add new cpuid bit announced in sdm rev057
2015-12-29 20:21:08 +00:00
Stanislav Shwartsman
9557cafcef
revertng commit #12854 because it broke MT simulation with debugger enabled. Until investigted.
2015-12-20 22:44:54 +00:00
Stanislav Shwartsman
a8a325f2f5
#define to enum or inline function convertion
2015-10-09 19:33:36 +00:00
Stanislav Shwartsman
ea3c1c77eb
added vmx consistency checks related to recently implemented support for vm-entering shutdown/wait-for-sipi state
2015-10-09 06:18:14 +00:00
Stanislav Shwartsman
cd2129ec3b
avoid calling prefetch() each time when linking traces cross page
2015-10-09 05:33:44 +00:00
Stanislav Shwartsman
9f77a6c3b0
full debugger support together with handler-chaining speedups optimization enabled (experimental)
...
should speedup emulation with debugger enabled
2015-10-09 05:28:47 +00:00
Stanislav Shwartsman
12f6857968
fixed smm restore of segment register's selector
2015-09-30 18:55:21 +00:00
Stanislav Shwartsman
18fced44ae
clean wrongly committed line
2015-09-30 18:45:01 +00:00
Stanislav Shwartsman
8d13b61319
implemented TSC Scaling VMX feature according to timestamp-counter for virtualization whitepaper published by Intel
2015-09-30 18:44:01 +00:00