clean pkeys when not enabled to avoid side-effects
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5b481fe34d
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@ -5026,7 +5026,6 @@ public: // for now...
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#if BX_SUPPORT_PKEYS
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BX_SMF void set_PKRU(Bit32u pkru);
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BX_SMF void disable_PKRU();
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#endif
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#if BX_SUPPORT_FPU
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@ -1314,10 +1314,7 @@ bx_bool BX_CPU_C::SetCR4(bxInstruction_c *i, bx_address val)
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// re-calculate protection keys if CR4.PKE was set
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#if BX_SUPPORT_PKEYS
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if (long_mode() && BX_CPU_THIS_PTR cr4.get_PKE())
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set_PKRU(BX_CPU_THIS_PTR pkru);
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else
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disable_PKRU();
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set_PKRU(BX_CPU_THIS_PTR pkru);
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#endif
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return 1;
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@ -600,10 +600,7 @@ void BX_CPU_C::after_restore_state(void)
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#endif
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#if BX_SUPPORT_PKEYS
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if (long_mode() && BX_CPU_THIS_PTR cr4.get_PKE())
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set_PKRU(BX_CPU_THIS_PTR pkru);
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else
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disable_PKRU();
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set_PKRU(BX_CPU_THIS_PTR pkru);
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#endif
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assert_checks();
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@ -324,14 +324,6 @@ void BX_CPU_C::handleCpuModeChange(void)
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// switching between compatibility and long64 mode also affect SS.BASE
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// which is always zero in long64 mode
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invalidate_stack_cache();
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// re-initialize protection keys if entered long mode and CR4.PKE=1
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#if BX_SUPPORT_PKEYS
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if (BX_CPU_THIS_PTR cr4.get_PKE())
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set_PKRU(BX_CPU_THIS_PTR pkru);
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else
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disable_PKRU();
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#endif
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}
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else
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#endif
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@ -364,6 +356,11 @@ void BX_CPU_C::handleCpuModeChange(void)
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#endif
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#endif
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// re-initialize protection keys
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#if BX_SUPPORT_PKEYS
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set_PKRU(BX_CPU_THIS_PTR pkru);
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#endif
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if (mode != BX_CPU_THIS_PTR cpu_mode) {
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BX_DEBUG(("%s activated", cpu_mode_string(BX_CPU_THIS_PTR cpu_mode)));
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#if BX_DEBUGGER
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@ -1455,29 +1452,23 @@ void BX_CPU_C::set_PKRU(Bit32u pkru)
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BX_CPU_THIS_PTR rd_pkey[i] = BX_CPU_THIS_PTR wr_pkey[i] =
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TLB_SysReadOK | TLB_UserReadOK | TLB_SysWriteOK | TLB_UserWriteOK;
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// accessDisable bit set
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if (pkru & (1<<(i*2))) {
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BX_CPU_THIS_PTR rd_pkey[i] &= ~(TLB_UserReadOK | TLB_UserWriteOK);
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BX_CPU_THIS_PTR wr_pkey[i] &= ~(TLB_UserReadOK | TLB_UserWriteOK);
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}
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if (long_mode() && BX_CPU_THIS_PTR cr4.get_PKE()) {
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// accessDisable bit set
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if (pkru & (1<<(i*2))) {
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BX_CPU_THIS_PTR rd_pkey[i] &= ~(TLB_UserReadOK | TLB_UserWriteOK);
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BX_CPU_THIS_PTR wr_pkey[i] &= ~(TLB_UserReadOK | TLB_UserWriteOK);
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}
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// writeDisable bit set
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if (pkru & (1<<(i*2+1))) {
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BX_CPU_THIS_PTR wr_pkey[i] &= ~(TLB_UserWriteOK);
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if (BX_CPU_THIS_PTR cr0.get_WP())
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BX_CPU_THIS_PTR wr_pkey[i] &= ~(TLB_SysWriteOK);
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// writeDisable bit set
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if (pkru & (1<<(i*2+1))) {
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BX_CPU_THIS_PTR wr_pkey[i] &= ~(TLB_UserWriteOK);
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if (BX_CPU_THIS_PTR cr0.get_WP())
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BX_CPU_THIS_PTR wr_pkey[i] &= ~(TLB_SysWriteOK);
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}
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}
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}
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}
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void BX_CPU_C::disable_PKRU()
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{
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for (unsigned i=0; i<16; i++) {
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BX_CPU_THIS_PTR rd_pkey[i] = BX_CPU_THIS_PTR wr_pkey[i] =
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TLB_SysReadOK | TLB_UserReadOK | TLB_SysWriteOK | TLB_UserWriteOK;
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}
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}
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BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::RDPKRU(bxInstruction_c *i)
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{
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if (! BX_CPU_THIS_PTR cr4.get_PKE())
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