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bf9eea4fa5
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1588 Commits

Author SHA1 Message Date
Stanislav Shwartsman
bf9eea4fa5 - Fixed segment limit violations with 4G segment limit 2008-08-30 15:00:38 +00:00
Stanislav Shwartsman
79eb5efffa - Preliminary implementation of X86 IO breakpoints 2008-08-30 08:14:46 +00:00
Stanislav Shwartsman
db8445abde Allow 8b BP in 32bit mode as well 2008-08-29 22:14:02 +00:00
Stanislav Shwartsman
a0e395188f Fixed merge error 2008-08-29 20:43:05 +00:00
Stanislav Shwartsman
b96f78dc0a Some kind of big change in fetchdecode tables invented in order to compress the tables for better host data cache utilization 2008-08-29 19:23:03 +00:00
Stanislav Shwartsman
a5a01c4b42 optimize LEAVE operation 2008-08-27 21:57:40 +00:00
Stanislav Shwartsman
b1da3d7d46 very slight optimization in io permissions check 2008-08-27 21:26:23 +00:00
Stanislav Shwartsman
d029823fb5 Fixed compilation error under --enable-smp 2008-08-24 17:29:17 +00:00
Stanislav Shwartsman
9a2072bba6 More fetchdecode optimization 2008-08-23 22:34:17 +00:00
Stanislav Shwartsman
d0803ebd10 branch_16 optimizations 2008-08-23 22:27:58 +00:00
Stanislav Shwartsman
991ae348cb Clean invalidate_prefetch_q when not needed 2008-08-23 13:55:37 +00:00
Stanislav Shwartsman
51cb5451d8 Apply CPUID vendor/brand string from @SF 2008-08-19 16:43:07 +00:00
Stanislav Shwartsman
5e92a1642d Fixed compilation errors, added BX_ASSERT in paging.cc 2008-08-18 05:20:23 +00:00
Stanislav Shwartsman
56504e4a67 Add some missed eflags accessors and pay more attention for special ones 2008-08-16 21:06:56 +00:00
Stanislav Shwartsman
e2fa98b629 - Fixed TLB flush on CR3 change - flush all pages is CR4.PGE is OFF 2008-08-16 15:35:35 +00:00
Stanislav Shwartsman
f275eb3e86 - CALL instructions should push old EIP to stack before checking new EIP for CS.limits 2008-08-16 15:32:44 +00:00
Stanislav Shwartsman
8107e7f084 Fixed restore of FCS field 2008-08-16 12:19:30 +00:00
Stanislav Shwartsman
edae99eb48 Revert back last commmit 2008-08-15 17:39:22 +00:00
Stanislav Shwartsman
65f3344496 Bugfix for big real mode 2008-08-15 14:31:31 +00:00
Stanislav Shwartsman
5eb845763e Fixed corner case problem cause by my prev optimization 2008-08-15 14:30:50 +00:00
Stanislav Shwartsman
460d91fc8c Added missed #GP fault when writing invalid memtype to MTRR/PAT 2008-08-15 10:59:31 +00:00
Stanislav Shwartsman
9d61bbb903 Fixed BX_ERR messages 2008-08-15 10:12:41 +00:00
Stanislav Shwartsman
aea946b4a3 One more change to speedup memory access through HostPtr check 2008-08-14 22:26:15 +00:00
Stanislav Shwartsman
dcb82ec4bf Optimize TLB flush methods 2008-08-13 21:51:54 +00:00
Stanislav Shwartsman
c9a8e4d79d Remove redundant TLB flush - it is even before TLB iniT 2008-08-13 20:54:03 +00:00
Stanislav Shwartsman
3e03443405 Fixed speed bug when alignment access is disabled 2008-08-12 20:24:24 +00:00
Stanislav Shwartsman
fa49bd17dc Fixed small performance bug in HandleAsyncEvent 2008-08-12 19:25:42 +00:00
Stanislav Shwartsman
8ecea83f02 Fixed compilation error 2008-08-12 05:03:51 +00:00
Stanislav Shwartsman
6b79e1e204 Add missed crc32.cc 2008-08-12 04:57:59 +00:00
Stanislav Shwartsman
70f363a05c Unroll back 32-bit fetchdecode displ 2008-08-11 21:06:27 +00:00
Stanislav Shwartsman
70c7c5ceca Use LOAD_Eb approach to remove duplicated GbEb methods 2008-08-11 20:34:05 +00:00
Stanislav Shwartsman
a8adb36dc2 Implemented MOVBE Intel Atom(R) instruction 2008-08-11 18:53:24 +00:00
Stanislav Shwartsman
b61017e5b6 Split more opcodes using new LOAD technique 2008-08-10 21:16:12 +00:00
Stanislav Shwartsman
cddcdccd99 Fixed paging bug 2008-08-10 20:32:00 +00:00
Stanislav Shwartsman
e5cb22772d Fixed compilation error 2008-08-10 19:40:47 +00:00
Stanislav Shwartsman
1da5943f1a More use of LOAD_Ex method 2008-08-10 19:34:28 +00:00
Stanislav Shwartsman
79cabe4bec Already first small optimization :) 2008-08-09 21:07:48 +00:00
Stanislav Shwartsman
0d90ab0478 Completely new way to handle LD+OP cases - allows to significantly reduce number of BX_CPU_C methods 2008-08-09 21:05:07 +00:00
Stanislav Shwartsman
24e0b53720 This more ellegant way to have debug info for BxError and not lose any performace 2008-08-09 19:18:09 +00:00
Stanislav Shwartsman
5dd02b26e3 Make even more efficient RmAddr calculation - good optimizing compiler could make more efficient code than it was before 2008-08-08 09:22:49 +00:00
Stanislav Shwartsman
bbf02a8bc5 More clean rewrite of the TLB access bits 2008-08-07 22:14:38 +00:00
Stanislav Shwartsman
69119be183 Fixed BX_INFO message 2008-08-07 21:07:53 +00:00
Stanislav Shwartsman
67eb13bf24 Fixed bug in PDPE cache implementation 2008-08-04 14:46:28 +00:00
Stanislav Shwartsman
4808a0d581 Fixed accessBits algebra 2008-08-04 05:30:37 +00:00
Stanislav Shwartsman
6398ebb1d4 First step of access bits cleanup and optimization - no perf gain yet 2008-08-03 19:53:09 +00:00
Stanislav Shwartsman
2e8bc558d1 Speedup SSE by introducing read/write_virtual_dqword_aligned methods 2008-08-02 10:16:47 +00:00
Stanislav Shwartsman
67f302352c Implement PDPE cache to support faster PAE paging tranlsation 2008-08-01 13:28:44 +00:00
Stanislav Shwartsman
59514dcbfb Fixed compilation err typo 2008-07-26 20:50:20 +00:00
Stanislav Shwartsman
41a4527ffd Put back optimization in pageWriteStampTable 2008-07-26 15:07:14 +00:00
Stanislav Shwartsman
f303d61cc1 Fixed 'dirty page' support in debugger 2008-07-26 14:44:26 +00:00