either libsamplerate or the SoX resampler library installed. If not installed,
the data is only copied to the output buffer and sample rate of the output
driver is changed similar to legacy code. Related changes:
- Added check for libsamplerate or SoX resampler header files in configure
script.
- Added functions for converting source format to float (requied by resampler)
and float to output format.
- Added support for float type data in the audio buffer code. Buffer chain #0
receives float data from sendwavepacket() and buffer #1 receives data for
mixing and output in format "16-bit signed little endian stereo".
- ALSA: Disable builtin resampling feature if resampler is present to avoid
doing it twice.
- Added gui console support to the rfb and vncsrv guis.
- Started preparing the legacy SDL gui for console support.
- TODO: The sdl and sdl2 guis need a special keyboard handling for shifted keys.
code. Now the runtime configuration runs in the Bochs window instead of
console / xterm. The simulation screen is restored when the
simulation continues. This feature can be implemented for all guis
without gui dialog box support (e.g. sdl2/sdl2 on non-win32 platforms, rfb).
- Show message box (modified ask dialog) in method fatal() if not called after
ask dialog or pressing power button.
- Removed code for unsupported actions "ask" and "fatal" from info() method.
- Some related small code cleanups.
The timers now have a new member 'realtime' and they are driven by the
selected engine. The VGA update timer and the status LED timer now always use
the realtime mode, but the PIT and CMOS RTC depend on the clock options.
- embedding combined manifest makes BOCHS.EXE usable
- list of DLL plugins now depends on the pci and debugger options
- 'make clean' now removes the generated manifest files
- renamed variable for external rules
- documentation update
required an external binary and it couldn't be ported to Windows. Now the new
builtin and portable slirp support based on Qemu's implementation is almost
stable and all the 'vnet' DHCP and TFTP features have been ported to the new
slirp module.
TODO: rename all the "slirp_new" stuff to "slirp"
- now using the more accurate name "seek latency"
- fixed CD-ROM LBA address range checks and renamed limit to "max_lba"
- make the latency for CD-ROM access variable depending on the distance between
current and new block address, Maximum value should only occur at first access
or after media change.
- TODO: make hard disk seek timing variable, too.
- still TODO: seek latency for USB drives (requires asynchronus packet support).
- added menu item for saving configuration
- use existing cdrom runtime menu instead of hardcoded items
- some code cleanups after cdrom option changes
- TODO: rewrite bximage / bxcommit stuff and use hdimage C++ classes to support
more commit / conversion types and to get rid of this code duplication.
It already had limited usability before. With stack direct access optimization the callback won't be called for stack accesses as well.
See note by Brian Slechta:
=== Cut Hete ===
While using Bochs as a reference model for simulations, the simulator needs
information about what loads/stores are taking place with each instruction.
Presumably, that is what the BX_INSTR_MEM_DATA() instrumentation macros
cover (which is the place where our simulator hooks up).
The RETnear_xxx() functions call access_linear() directly, rather than call
read_virtual_xxx() functions. This is a problem for code making use of the
BX_INSTR_MEM_DATA() hook because it does not get called for these
instructions. Should this be changed along with some other instructions
that exhibit this?
=== Cut Hete ===
For Bryan's usage bx_instr_lin_access and bx_instr_phy_read/bx_instr_phy_write callbacks should be used.
but in case you want a few %% of extra emulation performance - it is still possible to disable it with configure option.
most guests I saw do not use it !
for CPU emulation performance reasons, the alignment check compilation
still can be enabled using configure option --enable-alignment-check.
There is no software in the world which enable #AC exception checking, this
x86 feature is completely legacy but its emulation support costs up to 3-5%
emulation speed.
The checking for #AC exception enable still will be done, if
CPL == 3, EFLAGS.AC = 1 and CR0.AM = 1
but the alignment check is not compiled in, the Bochs will PANIC with corresponding message.
You can press 'always continue' and ignore the PANIC, the simulation will continue as if alignment checking is not enabled.
XOP: few instructions are still missing, coming soon
BX_PANIC(("VPERMILPS_VpsHpsWpsVIbR: not implemented yet"));
BX_PANIC(("VPERMILPD_VpdHpdWpdVIbR: not implemented yet"));
BX_PANIC(("VPMADCSSWD_VdqHdqWdqVIbR: not implemented yet"));
BX_PANIC(("VPMADCSWD_VdqHdqWdqVIbR: not implemented yet"));
BX_PANIC(("VFRCZPS_VpsWpsR: not implemented yet"));
BX_PANIC(("VFRCZPD_VpdWpdR: not implemented yet"));
BX_PANIC(("VFRCZSS_VssWssR: not implemented yet"));
BX_PANIC(("VFRCZSD_VsdWsdR: not implemented yet"));
So now the same single option will choose not only the CPUID flags but also VMX capabilities matching real HW machine.
Removed cpuid of core2_extreme_x9770 from the cpudb. I don't remember its VMX capabilities anyway.
There is another Penryn model in the cpudb - core2_penryn_t9600.
It was a real challenge to summarize all the highlights we have done in past half a year.
Hopefully it looks good and I didn't miss anything important.
32-bit CPU using Bochs binary compiled with x86-64 support.
The commit also fixes some init.cc issues with initialization of SYSCALL/SYSRET MSR in AMD hosts and also includes code reorg.
SMP emulation. New implementation uses dynamic CPU quantum value and takes
full advantage of the trace cache. Each emulated processor will execute
the whole trace before switching to the next processor.
* It is also safe to use large (up to 16 instructions) quantum values for
the SMP emulation now and improve performance even further.
The same merge also completely fixes SF bug :
[3312237] stepN command might be not working properly
Handlers chaining speedups are also supported with SMP emulation now.
with --enable-avx option. When compiled in, AVX still has to be enabled
using .bochsrc CPUID option. AVX2 FMA instructions still not implemented.
- Added support for Bit Manipulation Instructions (BMI) emulation. The BMI
instructions support can be enabled using .bochsrc CPUID option.
feature is enabled by default when configure with --enable-all-optimizations
option, to disable handlers chaining speedups configure with
--disable-handlers-chaining
