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bx_instr_mem_data_access became completely obsolete with new stack optimization merged into SVN.

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It already had limited usability before. With stack direct access optimization the callback won't be called for stack accesses as well.
See note by Brian Slechta:

=== Cut Hete ===
While using Bochs as a reference model for simulations, the simulator needs
information about what loads/stores are taking place with each instruction.
Presumably,  that  is  what  the BX_INSTR_MEM_DATA() instrumentation macros
cover (which is the place where our simulator hooks up).

The RETnear_xxx() functions call access_linear() directly, rather than call
read_virtual_xxx()  functions. This is a problem for code making use of the
BX_INSTR_MEM_DATA()   hook  because  it  does  not  get  called  for  these
instructions.  Should  this  be  changed along with some other instructions
that exhibit this?
=== Cut Hete ===

For Bryan's usage bx_instr_lin_access and bx_instr_phy_read/bx_instr_phy_write callbacks should be used.
This commit is contained in:
Stanislav Shwartsman 2012-04-11 19:01:25 +00:00
parent 59e13d5299
commit c7c431f88e
11 changed files with 29 additions and 147 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
bochs/CHANGES
View File

@ -25,6 +25,7 @@ Changes after 2.5.1 release:
- Moved networking, sound and USB devices to subdirectories in iodev.
- Moved MWAIT_IS_NOP .bochsrc option from CPUID to CPU so it can be set
even if cpu was configured using pre-defined CPUDB profile.
- pcidev: enable support for Linux kernel 3.x (Debian patch by Guillem Jover)
- I/O Devices
- Networking
@ -67,6 +68,7 @@ Changes after 2.5.1 release:
[3486555] Fix critical stack leak in Win32 GUI by Carlo Bramini
- these S.F. bugs were closed/fixed
[3516859] bug in svn e1000 module
[3516029] stepping not working in debugger GUI in case of smp vm
[3510403] closing config dialog box closes entire simulator
[3459998] Bochs cannot be compiled outside the source tree

20
bochs/cpu/access32.cc
View File

@ -31,7 +31,6 @@ BX_CPU_C::write_virtual_byte_32(unsigned s, Bit32u offset, Bit8u data)
{
Bit32u laddr;
bx_segment_reg_t *seg = &BX_CPU_THIS_PTR sregs[s];
BX_INSTR_MEM_DATA_ACCESS(BX_CPU_ID, s, offset, 1, BX_WRITE);
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode != BX_MODE_LONG_64);
@ -75,7 +74,6 @@ BX_CPU_C::write_virtual_word_32(unsigned s, Bit32u offset, Bit16u data)
{
Bit32u laddr;
bx_segment_reg_t *seg = &BX_CPU_THIS_PTR sregs[s];
BX_INSTR_MEM_DATA_ACCESS(BX_CPU_ID, s, offset, 2, BX_WRITE);
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode != BX_MODE_LONG_64);
@ -133,7 +131,6 @@ BX_CPU_C::write_virtual_dword_32(unsigned s, Bit32u offset, Bit32u data)
{
Bit32u laddr;
bx_segment_reg_t *seg = &BX_CPU_THIS_PTR sregs[s];
BX_INSTR_MEM_DATA_ACCESS(BX_CPU_ID, s, offset, 4, BX_WRITE);
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode != BX_MODE_LONG_64);
@ -191,7 +188,6 @@ BX_CPU_C::write_virtual_qword_32(unsigned s, Bit32u offset, Bit64u data)
{
Bit32u laddr;
bx_segment_reg_t *seg = &BX_CPU_THIS_PTR sregs[s];
BX_INSTR_MEM_DATA_ACCESS(BX_CPU_ID, s, offset, 8, BX_WRITE);
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode != BX_MODE_LONG_64);
@ -251,7 +247,6 @@ BX_CPU_C::write_virtual_dqword_32(unsigned s, Bit32u offset, const BxPackedXmmRe
{
Bit32u laddr;
bx_segment_reg_t *seg = &BX_CPU_THIS_PTR sregs[s];
BX_INSTR_MEM_DATA_ACCESS(BX_CPU_ID, s, offset, 16, BX_WRITE);
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode != BX_MODE_LONG_64);
@ -296,7 +291,6 @@ accessOK:
BX_CPU_C::write_virtual_dqword_aligned_32(unsigned s, Bit32u offset, const BxPackedXmmRegister *data)
{
bx_segment_reg_t *seg = &BX_CPU_THIS_PTR sregs[s];
BX_INSTR_MEM_DATA_ACCESS(BX_CPU_ID, s, offset, 16, BX_WRITE);
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode != BX_MODE_LONG_64);
@ -352,7 +346,6 @@ void BX_CPU_C::write_virtual_dword_vector_32(unsigned s, Bit32u offset, unsigned
Bit32u laddr;
unsigned len = elements << 2;
bx_segment_reg_t *seg = &BX_CPU_THIS_PTR sregs[s];
BX_INSTR_MEM_DATA_ACCESS(BX_CPU_ID, s, offset, len, BX_WRITE);
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode != BX_MODE_LONG_64);
@ -401,7 +394,6 @@ void BX_CPU_C::write_virtual_dword_vector_aligned_32(unsigned s, Bit32u offset,
unsigned len = elements << 2;
bx_segment_reg_t *seg = &BX_CPU_THIS_PTR sregs[s];
BX_INSTR_MEM_DATA_ACCESS(BX_CPU_ID, s, offset, len, BX_WRITE);
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode != BX_MODE_LONG_64);
@ -460,7 +452,6 @@ BX_CPU_C::read_virtual_byte_32(unsigned s, Bit32u offset)
Bit32u laddr;
bx_segment_reg_t *seg = &BX_CPU_THIS_PTR sregs[s];
Bit8u data;
BX_INSTR_MEM_DATA_ACCESS(BX_CPU_ID, s, offset, 1, BX_READ);
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode != BX_MODE_LONG_64);
@ -504,7 +495,6 @@ BX_CPU_C::read_virtual_word_32(unsigned s, Bit32u offset)
Bit32u laddr;
bx_segment_reg_t *seg = &BX_CPU_THIS_PTR sregs[s];
Bit16u data;
BX_INSTR_MEM_DATA_ACCESS(BX_CPU_ID, s, offset, 2, BX_READ);
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode != BX_MODE_LONG_64);
@ -561,7 +551,6 @@ BX_CPU_C::read_virtual_dword_32(unsigned s, Bit32u offset)
Bit32u laddr;
bx_segment_reg_t *seg = &BX_CPU_THIS_PTR sregs[s];
Bit32u data;
BX_INSTR_MEM_DATA_ACCESS(BX_CPU_ID, s, offset, 4, BX_READ);
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode != BX_MODE_LONG_64);
@ -618,7 +607,6 @@ BX_CPU_C::read_virtual_qword_32(unsigned s, Bit32u offset)
Bit32u laddr;
bx_segment_reg_t *seg = &BX_CPU_THIS_PTR sregs[s];
Bit64u data;
BX_INSTR_MEM_DATA_ACCESS(BX_CPU_ID, s, offset, 8, BX_READ);
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode != BX_MODE_LONG_64);
@ -676,7 +664,6 @@ BX_CPU_C::read_virtual_dqword_32(unsigned s, Bit32u offset, BxPackedXmmRegister
{
Bit32u laddr;
bx_segment_reg_t *seg = &BX_CPU_THIS_PTR sregs[s];
BX_INSTR_MEM_DATA_ACCESS(BX_CPU_ID, s, offset, 16, BX_READ);
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode != BX_MODE_LONG_64);
@ -718,7 +705,6 @@ accessOK:
BX_CPU_C::read_virtual_dqword_aligned_32(unsigned s, Bit32u offset, BxPackedXmmRegister *data)
{
bx_segment_reg_t *seg = &BX_CPU_THIS_PTR sregs[s];
BX_INSTR_MEM_DATA_ACCESS(BX_CPU_ID, s, offset, 16, BX_READ);
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode != BX_MODE_LONG_64);
@ -772,7 +758,6 @@ void BX_CPU_C::read_virtual_dword_vector_32(unsigned s, Bit32u offset, unsigned
Bit32u laddr;
unsigned len = elements << 2;
bx_segment_reg_t *seg = &BX_CPU_THIS_PTR sregs[s];
BX_INSTR_MEM_DATA_ACCESS(BX_CPU_ID, s, offset, len, BX_READ);
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode != BX_MODE_LONG_64);
@ -818,7 +803,6 @@ void BX_CPU_C::read_virtual_dword_vector_aligned_32(unsigned s, Bit32u offset, u
unsigned len = elements << 2;
bx_segment_reg_t *seg = &BX_CPU_THIS_PTR sregs[s];
BX_INSTR_MEM_DATA_ACCESS(BX_CPU_ID, s, offset, len, BX_READ);
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode != BX_MODE_LONG_64);
@ -880,7 +864,6 @@ BX_CPU_C::read_RMW_virtual_byte_32(unsigned s, Bit32u offset)
Bit32u laddr;
bx_segment_reg_t *seg = &BX_CPU_THIS_PTR sregs[s];
Bit8u data;
BX_INSTR_MEM_DATA_ACCESS(BX_CPU_ID, s, offset, 1, BX_RW);
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode != BX_MODE_LONG_64);
@ -927,7 +910,6 @@ BX_CPU_C::read_RMW_virtual_word_32(unsigned s, Bit32u offset)
Bit32u laddr;
bx_segment_reg_t *seg = &BX_CPU_THIS_PTR sregs[s];
Bit16u data;
BX_INSTR_MEM_DATA_ACCESS(BX_CPU_ID, s, offset, 2, BX_RW);
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode != BX_MODE_LONG_64);
@ -988,7 +970,6 @@ BX_CPU_C::read_RMW_virtual_dword_32(unsigned s, Bit32u offset)
Bit32u laddr;
bx_segment_reg_t *seg = &BX_CPU_THIS_PTR sregs[s];
Bit32u data;
BX_INSTR_MEM_DATA_ACCESS(BX_CPU_ID, s, offset, 4, BX_RW);
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode != BX_MODE_LONG_64);
@ -1049,7 +1030,6 @@ BX_CPU_C::read_RMW_virtual_qword_32(unsigned s, Bit32u offset)
Bit32u laddr;
bx_segment_reg_t *seg = &BX_CPU_THIS_PTR sregs[s];
Bit64u data;
BX_INSTR_MEM_DATA_ACCESS(BX_CPU_ID, s, offset, 8, BX_RW);
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode != BX_MODE_LONG_64);

28
bochs/cpu/access64.cc
View File

@ -33,8 +33,6 @@ BX_CPU_C::write_virtual_byte_64(unsigned s, Bit64u offset, Bit8u data)
{
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64);
BX_INSTR_MEM_DATA_ACCESS(BX_CPU_ID, s, offset, 1, BX_WRITE);
Bit64u laddr = get_laddr64(s, offset);
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 0);
Bit64u lpf = LPFOf(laddr);
@ -67,8 +65,6 @@ BX_CPU_C::write_virtual_word_64(unsigned s, Bit64u offset, Bit16u data)
{
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64);
BX_INSTR_MEM_DATA_ACCESS(BX_CPU_ID, s, offset, 2, BX_WRITE);
Bit64u laddr = get_laddr64(s, offset);
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 1);
#if BX_SUPPORT_ALIGNMENT_CHECK && BX_CPU_LEVEL >= 4
@ -119,8 +115,6 @@ BX_CPU_C::write_virtual_dword_64(unsigned s, Bit64u offset, Bit32u data)
{
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64);
BX_INSTR_MEM_DATA_ACCESS(BX_CPU_ID, s, offset, 4, BX_WRITE);
Bit64u laddr = get_laddr64(s, offset);
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 3);
#if BX_SUPPORT_ALIGNMENT_CHECK && BX_CPU_LEVEL >= 4
@ -171,8 +165,6 @@ BX_CPU_C::write_virtual_qword_64(unsigned s, Bit64u offset, Bit64u data)
{
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64);
BX_INSTR_MEM_DATA_ACCESS(BX_CPU_ID, s, offset, 8, BX_WRITE);
Bit64u laddr = get_laddr64(s, offset);
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 7);
#if BX_SUPPORT_ALIGNMENT_CHECK && BX_CPU_LEVEL >= 4
@ -223,8 +215,6 @@ BX_CPU_C::write_virtual_dqword_64(unsigned s, Bit64u offset, const BxPackedXmmRe
{
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64);
BX_INSTR_MEM_DATA_ACCESS(BX_CPU_ID, s, offset, 16, BX_WRITE);
Bit64u laddr = get_laddr64(s, offset);
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 15);
Bit64u lpf = LPFOf(laddr);
@ -258,8 +248,6 @@ BX_CPU_C::write_virtual_dqword_aligned_64(unsigned s, Bit64u offset, const BxPac
{
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64);
BX_INSTR_MEM_DATA_ACCESS(BX_CPU_ID, s, offset, 16, BX_WRITE);
Bit64u laddr = get_laddr64(s, offset);
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 0);
Bit64u lpf = AlignedAccessLPFOf(laddr, 15);
@ -302,8 +290,6 @@ void BX_CPU_C::write_virtual_dword_vector_64(unsigned s, Bit64u offset, unsigned
unsigned len = elements << 2;
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64);
BX_INSTR_MEM_DATA_ACCESS(BX_CPU_ID, s, offset, len, BX_WRITE);
Bit64u laddr = get_laddr64(s, offset);
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, len-1);
Bit64u lpf = LPFOf(laddr);
@ -341,8 +327,6 @@ void BX_CPU_C::write_virtual_dword_vector_aligned_64(unsigned s, Bit64u offset,
unsigned len = elements << 2;
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64);
BX_INSTR_MEM_DATA_ACCESS(BX_CPU_ID, s, offset, len, BX_WRITE);
Bit64u laddr = get_laddr64(s, offset);
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 0);
Bit64u lpf = AlignedAccessLPFOf(laddr, len-1);
@ -385,7 +369,6 @@ BX_CPU_C::read_virtual_byte_64(unsigned s, Bit64u offset)
{
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64);
Bit8u data;
BX_INSTR_MEM_DATA_ACCESS(BX_CPU_ID, s, offset, 1, BX_READ);
Bit64u laddr = get_laddr64(s, offset);
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 0);
@ -418,7 +401,6 @@ BX_CPU_C::read_virtual_word_64(unsigned s, Bit64u offset)
{
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64);
Bit16u data;
BX_INSTR_MEM_DATA_ACCESS(BX_CPU_ID, s, offset, 2, BX_READ);
Bit64u laddr = get_laddr64(s, offset);
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 1);
@ -469,7 +451,6 @@ BX_CPU_C::read_virtual_dword_64(unsigned s, Bit64u offset)
{
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64);
Bit32u data;
BX_INSTR_MEM_DATA_ACCESS(BX_CPU_ID, s, offset, 4, BX_READ);
Bit64u laddr = get_laddr64(s, offset);
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 3);
@ -520,7 +501,6 @@ BX_CPU_C::read_virtual_qword_64(unsigned s, Bit64u offset)
{
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64);
Bit64u data;
BX_INSTR_MEM_DATA_ACCESS(BX_CPU_ID, s, offset, 8, BX_READ);
Bit64u laddr = get_laddr64(s, offset);
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 7);
@ -570,7 +550,6 @@ BX_CPU_C::read_virtual_qword_64(unsigned s, Bit64u offset)
BX_CPU_C::read_virtual_dqword_64(unsigned s, Bit64u offset, BxPackedXmmRegister *data)
{
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64);
BX_INSTR_MEM_DATA_ACCESS(BX_CPU_ID, s, offset, 16, BX_READ);
Bit64u laddr = get_laddr64(s, offset);
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 15);
@ -602,7 +581,6 @@ BX_CPU_C::read_virtual_dqword_64(unsigned s, Bit64u offset, BxPackedXmmRegister
BX_CPU_C::read_virtual_dqword_aligned_64(unsigned s, Bit64u offset, BxPackedXmmRegister *data)
{
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64);
BX_INSTR_MEM_DATA_ACCESS(BX_CPU_ID, s, offset, 16, BX_READ);
Bit64u laddr = get_laddr64(s, offset);
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 0);
@ -643,7 +621,6 @@ void BX_CPU_C::read_virtual_dword_vector_64(unsigned s, Bit64u offset, unsigned
unsigned len = elements << 2;
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64);
BX_INSTR_MEM_DATA_ACCESS(BX_CPU_ID, s, offset, len, BX_READ);
Bit64u laddr = get_laddr64(s, offset);
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, len-1);
@ -679,7 +656,6 @@ void BX_CPU_C::read_virtual_dword_vector_aligned_64(unsigned s, Bit64u offset, u
unsigned len = elements << 2;
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64);
BX_INSTR_MEM_DATA_ACCESS(BX_CPU_ID, s, offset, len, BX_READ);
Bit64u laddr = get_laddr64(s, offset);
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 0);
@ -726,7 +702,6 @@ BX_CPU_C::read_RMW_virtual_byte_64(unsigned s, Bit64u offset)
{
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64);
Bit8u data;
BX_INSTR_MEM_DATA_ACCESS(BX_CPU_ID, s, offset, 1, BX_RW);
Bit64u laddr = get_laddr64(s, offset);
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 0);
@ -763,7 +738,6 @@ BX_CPU_C::read_RMW_virtual_word_64(unsigned s, Bit64u offset)
{
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64);
Bit16u data;
BX_INSTR_MEM_DATA_ACCESS(BX_CPU_ID, s, offset, 2, BX_RW);
Bit64u laddr = get_laddr64(s, offset);
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 1);
@ -818,7 +792,6 @@ BX_CPU_C::read_RMW_virtual_dword_64(unsigned s, Bit64u offset)
{
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64);
Bit32u data;
BX_INSTR_MEM_DATA_ACCESS(BX_CPU_ID, s, offset, 4, BX_RW);
Bit64u laddr = get_laddr64(s, offset);
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 3);
@ -873,7 +846,6 @@ BX_CPU_C::read_RMW_virtual_qword_64(unsigned s, Bit64u offset)
{
BX_ASSERT(BX_CPU_THIS_PTR cpu_mode == BX_MODE_LONG_64);
Bit64u data;
BX_INSTR_MEM_DATA_ACCESS(BX_CPU_ID, s, offset, 8, BX_RW);
Bit64u laddr = get_laddr64(s, offset);
unsigned tlbIndex = BX_TLB_INDEX_OF(laddr, 7);

35
bochs/instrument/example0/instrument.cc
View File

@ -48,7 +48,7 @@ static struct instruction_t {
struct {
bx_address laddr; // linear address
bx_phy_address paddr; // physical address
unsigned op; // BX_READ, BX_WRITE or BX_RW
unsigned rw; // BX_READ, BX_WRITE or BX_RW
unsigned size; // 1 .. 32
} data_access[MAX_DATA_ACCESSES];
bx_bool is_branch;
@ -106,7 +106,7 @@ void bx_print_instruction(unsigned cpu, const instruction_t *i)
fprintf(stderr, "MEM ACCESS[%u]: 0x" FMT_ADDRX " (linear) 0x" FMT_PHY_ADDRX " (physical) %s SIZE: %d\n", n,
i->data_access[n].laddr,
i->data_access[n].paddr,
i->data_access[n].op == BX_READ ? "RD":"WR",
i->data_access[n].rw == BX_READ ? "RD":"WR",
i->data_access[n].size);
}
fprintf(stderr, "\n");
@ -202,29 +202,18 @@ void bx_instr_hwinterrupt(unsigned cpu, unsigned vector, Bit16u cs, bx_address e
}
}
void bx_instr_mem_data_access(unsigned cpu, unsigned seg, bx_address offset, unsigned len, unsigned rw)
void bx_instr_lin_access(unsigned cpu, bx_address lin, bx_phy_address phy, unsigned len, unsigned rw)
{
unsigned index;
bx_phy_address phy;
if(!active || !instruction[cpu].ready) return;
if (instruction[cpu].num_data_accesses >= MAX_DATA_ACCESSES)
{
return;
unsigned index = instruction[cpu].num_data_accesses;
if (index < MAX_DATA_ACCESSES) {
instruction[cpu].data_access[index].laddr = lin;
instruction[cpu].data_access[index].paddr = phy;
instruction[cpu].data_access[index].rw = rw;
instruction[cpu].data_access[index].size = len;
instruction[cpu].num_data_accesses++;
index++;
}
bx_address lin = BX_CPU(cpu)->get_laddr(seg, offset);
bx_bool page_valid = BX_CPU(cpu)->dbg_xlate_linear2phy(lin, &phy);
// If linear translation doesn't exist, a paging exception will occur.
// Invalidate physical address data for now.
if (!page_valid) phy = (bx_phy_address) (-1);
index = instruction[cpu].num_data_accesses;
instruction[cpu].data_access[index].laddr = lin;
instruction[cpu].data_access[index].paddr = phy;
instruction[cpu].data_access[index].op = rw;
instruction[cpu].data_access[index].size = len;
instruction[cpu].num_data_accesses++;
}

12
bochs/instrument/example0/instrument.h
View File

@ -46,7 +46,7 @@ void bx_instr_interrupt(unsigned cpu, unsigned vector);
void bx_instr_exception(unsigned cpu, unsigned vector, unsigned error_code);
void bx_instr_hwinterrupt(unsigned cpu, unsigned vector, Bit16u cs, bx_address eip);
void bx_instr_mem_data_access(unsigned cpu, unsigned seg, bx_address offset, unsigned len, unsigned rw);
void bx_instr_lin_access(unsigned cpu, bx_address lin, bx_phy_address phy, unsigned len, unsigned rw);
/* initialization/deinitialization of instrumentalization*/
#define BX_INSTR_INIT_ENV() bx_instr_init_env()
@ -91,11 +91,8 @@ void bx_instr_mem_data_access(unsigned cpu, unsigned seg, bx_address offset, uns
#define BX_INSTR_REPEAT_ITERATION(cpu_id, i)
/* memory access */
#define BX_INSTR_LIN_ACCESS(cpu_id, lin, phy, len, rw)
/* memory access */
#define BX_INSTR_MEM_DATA_ACCESS(cpu_id, seg, offset, len, rw) \
bx_instr_mem_data_access(cpu_id, seg, offset, len, rw)
#define BX_INSTR_LIN_ACCESS(cpu_id, lin, phy, len, rw) \
bx_instr_lin_access(cpu_id, lin, phy, len, rw)
/* called from memory object */
#define BX_INSTR_PHY_WRITE(cpu_id, addr, len)
@ -154,9 +151,6 @@ void bx_instr_mem_data_access(unsigned cpu, unsigned seg, bx_address offset, uns
/* memory access */
#define BX_INSTR_LIN_ACCESS(cpu_id, lin, phy, len, rw)
/* memory access */
#define BX_INSTR_MEM_DATA_ACCESS(cpu_id, seg, offset, len, rw)
/* called from memory object */
#define BX_INSTR_PHY_WRITE(cpu_id, addr, len)
#define BX_INSTR_PHY_READ(cpu_id, addr, len)

28
bochs/instrument/example1/instrument.cc
View File

@ -79,7 +79,7 @@ void bxInstrumentation::bx_print_instruction(void)
fprintf(stderr, "MEM ACCESS[%u]: 0x" FMT_ADDRX " (linear) 0x" FMT_PHY_ADDRX " (physical) %s SIZE: %d\n", n,
data_access[n].laddr,
data_access[n].paddr,
data_access[n].op == BX_READ ? "RD":"WR",
data_access[n].rw == BX_READ ? "RD":"WR",
data_access[n].size);
}
fprintf(stderr, "\n");
@ -172,27 +172,15 @@ void bxInstrumentation::bx_instr_hwinterrupt(unsigned vector, Bit16u cs, bx_addr
}
}
void bxInstrumentation::bx_instr_mem_data_access(unsigned seg, bx_address offset, unsigned len, unsigned rw)
void bxInstrumentation::bx_instr_lin_access(bx_address lin, bx_phy_adress phy, unsigned len, unsigned rw)
{
bx_phy_address phy;
if(!active || !ready) return;
if (num_data_accesses >= MAX_DATA_ACCESSES)
{
return;
if (num_data_accesses < MAX_DATA_ACCESSES) {
data_access[num_data_accesses].laddr = lin;
data_access[num_data_accesses].paddr = phy;
data_access[num_data_accesses].rw = rw;
data_access[num_data_accesses].size = len;
num_data_accesses++;
}
bx_address lin = BX_CPU(cpu)->get_laddr(seg, offset);
bx_bool page_valid = BX_CPU(cpu)->dbg_xlate_linear2phy(lin, &phy);
// If linear translation doesn't exist, a paging exception will occur.
// Invalidate physical address data for now.
if (!page_valid) phy = (bx_phy_address) (-1);
data_access[num_data_accesses].laddr = lin;
data_access[num_data_accesses].paddr = phy;
data_access[num_data_accesses].op = rw;
data_access[num_data_accesses].size = len;
num_data_accesses++;
}

13
bochs/instrument/example1/instrument.h
View File

@ -54,7 +54,7 @@ public:
struct {
bx_address laddr; // linear address
bx_phy_address paddr; // physical address
unsigned op; // BX_READ, BX_WRITE or BX_RW
unsigned rw; // BX_READ, BX_WRITE or BX_RW
unsigned size; // 1 .. 32
} data_access[MAX_DATA_ACCESSES];
@ -87,7 +87,7 @@ public:
void bx_instr_exception(unsigned vector, unsigned error_code);
void bx_instr_hwinterrupt(unsigned vector, Bit16u cs, bx_address eip);
void bx_instr_mem_data_access(unsigned seg, bx_address offset, unsigned len, unsigned rw);
void bx_instr_lin_access(bx_address lin, bx_phy_adress phy, unsigned len, unsigned rw);
private:
void branch_taken(bx_address new_eip);
@ -142,10 +142,8 @@ extern bxInstrumentation *icpu;
#define BX_INSTR_REPEAT_ITERATION(cpu_id, i)
/* memory access */
#define BX_INSTR_LIN_ACCESS(cpu_id, lin, phy, len, rw)
#define BX_INSTR_MEM_DATA_ACCESS(cpu_id, seg, offset, len, rw) \
icpu[cpu_id].bx_instr_mem_data_access(seg, offset, len, rw)
#define BX_INSTR_LIN_ACCESS(cpu_id, lin, phy, len, rw) \
icpu[cpu_id].bx_instr_lin_access(lin, phy, len, rw)
/* called from memory object */
#define BX_INSTR_PHY_WRITE(cpu_id, addr, len)
@ -204,9 +202,6 @@ extern bxInstrumentation *icpu;
/* memory access */
#define BX_INSTR_LIN_ACCESS(cpu_id, lin, phy, len, rw)
/* memory access */
#define BX_INSTR_MEM_DATA_ACCESS(cpu_id, seg, offset, len, rw)
/* called from memory object */
#define BX_INSTR_PHY_WRITE(cpu_id, addr, len)
#define BX_INSTR_PHY_READ(cpu_id, addr, len)

6
bochs/instrument/example2/instrument.h
View File

@ -84,9 +84,6 @@ void bx_instr_before_execution(unsigned cpu, bxInstruction_c *i);
/* memory access */
#define BX_INSTR_LIN_ACCESS(cpu_id, lin, phy, len, rw)
/* memory access */
#define BX_INSTR_MEM_DATA_ACCESS(cpu_id, seg, offset, len, rw)
/* called from memory object */
#define BX_INSTR_PHY_WRITE(cpu_id, addr, len)
#define BX_INSTR_PHY_READ(cpu_id, addr, len)
@ -145,9 +142,6 @@ void bx_instr_before_execution(unsigned cpu, bxInstruction_c *i);
/* memory access */
#define BX_INSTR_LIN_ACCESS(cpu_id, lin, phy, len, rw)
/* memory access */
#define BX_INSTR_MEM_DATA_ACCESS(cpu_id, seg, offset, len, rw)
/* called from memory object */
#define BX_INSTR_PHY_WRITE(cpu_id, addr, len)
#define BX_INSTR_PHY_READ(cpu_id, addr, len)

27
bochs/instrument/instrumentation.txt
View File

@ -218,17 +218,6 @@ Currently the callback is not supported when repeat-speedups optimization is
enabled.
void bx_instr_mem_data_access(unsigned cpu, unsigned seg, bx_address offset, unsigned len, unsigned rw);
The callback is called each time, when Bochs simulator executes segment based
linear memory access. In contrast to previous callback it will be called even
if memory access fails because of any reason (for example segment protection
failure or page fault).
The callback will not be called for system memory accesses like sys desriptor
tables reads/writes or new stack pushes during far call or exception.
void bx_instr_phy_read(unsigned cpu, bx_address addr, unsigned len);
void bx_instr_phy_write(unsigned cpu, bx_address addr, unsigned len);
@ -246,8 +235,6 @@ Known problems:
1. BX_INSTR_LIN_ACCESS doesn't work when repeat-speedups feature is enabled.
2. BX_INSTR_MEM_DATA doesn't work when repeat-speedups feature is enabled.
Feature requests:
1. BX_INSTR_CNEAR_BRANCH_NOT_TAKEN callback should have an additional
@ -255,17 +242,3 @@ Feature requests:
2. BX_INSTR_SMI, BX_INSTR_NMI, BX_INSTR_SIPI and other external events
callbacks
3. ???
While using Bochs as a reference model for simulations, the simulator needs
information about what loads/stores are taking place with each instruction.
Presumably, that is what the BX_INSTR_MEM_DATA() instrumentation macros
cover (which is the place where our simulator hooks up).
The RETnear_xxx() functions call access_linear() directly, rather than call
read_virtual_xxx() functions. This is a problem for code making use of the
BX_INSTR_MEM_DATA() hook because it does not get called for these
instructions. Should this be changed along with some other instructions
that exhibit this?
Brian Slechta

1
bochs/instrument/stubs/instrument.cc
View File

@ -60,7 +60,6 @@ void bx_instr_inp(Bit16u addr, unsigned len) {}
void bx_instr_inp2(Bit16u addr, unsigned len, unsigned val) {}
void bx_instr_outp(Bit16u addr, unsigned len, unsigned val) {}
void bx_instr_mem_data_access(unsigned cpu, unsigned seg, bx_address offset, unsigned len, unsigned rw) {}
void bx_instr_lin_access(unsigned cpu, bx_address lin, bx_address phy, unsigned len, unsigned rw) {}
void bx_instr_phy_write(unsigned cpu, bx_address addr, unsigned len) {}

4
bochs/instrument/stubs/instrument.h
View File

@ -64,7 +64,6 @@ void bx_instr_inp(Bit16u addr, unsigned len);
void bx_instr_inp2(Bit16u addr, unsigned len, unsigned val);
void bx_instr_outp(Bit16u addr, unsigned len, unsigned val);
void bx_instr_mem_data_access(unsigned cpu, unsigned seg, bx_address offset, unsigned len, unsigned rw);
void bx_instr_lin_access(unsigned cpu, bx_address lin, bx_address phy, unsigned len, unsigned rw);
void bx_instr_phy_write(unsigned cpu, bx_address addr, unsigned len);
@ -121,9 +120,6 @@ void bx_instr_wrmsr(unsigned cpu, unsigned addr, Bit64u value);
/* memory access */
#define BX_INSTR_LIN_ACCESS(cpu_id, lin, phy, len, rw) bx_instr_lin_access(cpu_id, lin, phy, len, rw)
/* memory access */
#define BX_INSTR_MEM_DATA_ACCESS(cpu_id, seg, offset, len, rw) bx_instr_mem_data_access(cpu_id, seg, offset, len, rw)
/* called from memory object */
#define BX_INSTR_PHY_WRITE(cpu_id, addr, len) bx_instr_phy_write(cpu_id, addr, len)
#define BX_INSTR_PHY_READ(cpu_id, addr, len) bx_instr_phy_read(cpu_id, addr, len)