224 Commits

Author SHA1 Message Date
Shwartsman
6f4f217a08 implemented AMX_FP16 and aMX_COMPLEX, fixes for daz handling in AVX_NE_CONVERT FB16
updated CHANGES
2024-01-12 12:38:31 +02:00
Stanislav Shwartsman
3a02e85599
AMX support (#212) 2024-01-10 20:13:25 +02:00
Shwartsman
c04fb9a6ba Fixed decoding of AVX-VNNI instruction (typo in decoder tables)
mention AVX-VNNI in CHANGES
2024-01-09 09:14:39 +02:00
Shwartsman
27d48ecb94 HandlersChaining Optimization: mark IN/OUT instructions as TraceEnd, they could have significant side effects like raising interrupts which have to be handled
resolves issue #207
2024-01-05 08:45:10 +02:00
Stanislav Shwartsman
e3612c30f8 Implement support for LA57 and 5-level paging 2023-12-29 14:48:38 +02:00
Shwartsman
ddff78a16c style and disasm updates, no functional impact 2023-12-25 14:57:05 +02:00
Shwartsman
7c9bab8182 handle getexp methods though templates 2023-12-25 08:07:07 +02:00
Stanislav Shwartsman
662d8ec279 fix bug from previous commit 2023-12-24 15:04:31 +02:00
Shwartsman
b4effb58af fix compilation with minimalistic config 2023-12-23 22:10:22 +02:00
Shwartsman
19dbd7314b convert more instructions to template 2023-12-23 22:01:13 +02:00
Shwartsman
8e76c9b6bb move many SSE/AVX/AVX512 methods to template functions 2023-12-23 21:00:51 +02:00
Stanislav Shwartsman
54831068df
implement RDMSRLIST/WRMSRLIST instructions (+related VMX extensions) (#176) 2023-12-16 21:59:34 +02:00
Shwartsman
e68ae599af added comments and consts for CPUID definitions 2023-12-16 10:10:48 +02:00
Shwartsman
4a6ec57711 remove redundant space in comment 2023-12-10 20:44:05 +02:00
Stanislav Shwartsman
2eccb25e8f x87: Implemented special behavior for 287-compatibility FSTP opcode: D9D8..D9DF - Behaves the same as FSTP but won't cause a stack underflow exception. 2023-12-07 12:56:02 +02:00
Stanislav Shwartsman
00e8e0bca0 implemented MOVDIR64B instruction and enabled in TigerLake model 2023-12-01 18:03:25 +02:00
Stanislav Shwartsman
2e89b9bcba
implemented WAITPKG instruction set (#150)
still missing : UMWAIT/TPAUSE should set CF flag if it was using OS
deadline and woken up after deadline (i.e. not from monitored store)
also not clear in the spec: should UWAITX/TPAUSE always wait until
deadline due to 'while(tsc<deadline)' statement ?
+include small fixes for AMD's MONITORX/MWAITX
2023-12-01 18:00:03 +02:00
Shwartsman
8dd9649389 fixed compilation for VMX=1 X86_64=1
updated (c) for many files
2023-11-28 10:36:56 +02:00
Stanislav Shwartsman
ad7a85d11a updates for SVM INVLPGA instruction
- decoding and disasm
 - invalidate only pages pointed by RAX and not entire TLB
2023-11-26 19:45:07 +02:00
Stanislav Shwartsman
14fc5635de integrate random fixes done during WAITPKG feature development 2023-11-25 16:53:00 +02:00
Stanislav Shwartsman
280303d76c
initial code for UINTR implementation (#138)
First step into implementing UINTR - User Level Interrupts ISA extension
To be continued

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Co-authored-by: Stanislav Shwartsman <sshwarts@users.sourceforge.net>
2023-11-25 16:43:47 +02:00
Shwartsman
0cc21d166d fixed compilation with CET not compiled in 2023-11-20 15:24:57 +02:00
Shwartsman
a7a443ab46 guard SVM functions with ifdef 2023-11-19 23:24:13 +02:00
Stanislav Shwartsman
c1c102ab04 coding style, cleanups and optimizations 2023-11-19 20:31:05 +02:00
Stanislav Shwartsman
26f60a6ea4 spelling fix in the comment 2023-11-18 21:48:42 +02:00
Stanislav Shwartsman
f5b54a4d33
Implemented MOVDIRI instruction (#129)
Co-authored-by: Stanislav Shwartsman <sshwarts@users.sourceforge.net>
2023-11-11 20:30:12 +02:00
Stanislav Shwartsman
8594972389 final resolution for issue #2 : address VEXPAND* and VPSHUFBITQMB instructions 2023-11-09 19:15:32 +02:00
Stanislav Shwartsman
b78e93c9e3 optimize handling of allowed_to_run_FPU_MMX instructios common block
now checked at decode and not at every instruction
simpler code and also 1% faster winXP boot time as bonus
other x87 and mmx heavy guests may benefit even more
2023-11-08 06:48:53 +02:00
Stanislav Shwartsman
18deee022f
make CPU to use C++ template for implementation of CPU methods (#115)
this allow to remove a lot of code from CPU common methods
2023-10-30 06:57:16 +02:00
Stanislav Shwartsman
8cc85b1133 fixed compilation warnings from CI/DI on github 2023-10-29 23:39:32 +02:00
Shwartsman
02c4f85a89 implemented proper masked load for VPMOVSX/ZX instructions + bugfix 2023-10-20 20:13:29 +03:00
Shwartsman
221cac7972 fixed compilation with no EVEX 2023-10-16 08:14:03 +03:00
Stanislav Shwartsman
a3d2fec111 Merge branch 'master' of https://github.com/bochs-emu/Bochs 2023-10-16 00:19:45 +03:00
Stanislav Shwartsman
035695f73c define CPU feature's enum together with feature name in one place 2023-10-15 23:56:11 +03:00
Stanislav Shwartsman
8e6bdcb4d9 define CPU feature's enum together with feature name in one place 2023-10-15 23:43:14 +03:00
Stanislav Shwartsman
8316d7698f
implemented Linear Address Separation extension (LASS) (#90)
Co-authored-by: Stanislav Shwartsman <sshwarts@users.sourceforge.net>
2023-10-15 14:32:01 +03:00
Stanislav Shwartsman
ffa64461ab
implementation of AVX-NE-CONVERT ISA (#89)
Co-authored-by: Stanislav Shwartsman <sshwarts@users.sourceforge.net>
2023-10-14 14:55:12 +03:00
Stanislav Shwartsman
dd7d4dbd82 implement SERIALIZE instruction
enable CPUID reporting for all recently added ISA extensions
2023-10-12 14:46:27 +03:00
Stanislav Shwartsman
4a309478f9
SHA512 instructions implemented (#88)
Co-authored-by: Stanislav Shwartsman <sshwarts@users.sourceforge.net>
2023-10-10 21:33:16 +03:00
Stanislav Shwartsman
3234e9b88e
implemented AVX VNNI INT16 ISA extension (#87)
Co-authored-by: Stanislav Shwartsman <sshwarts@users.sourceforge.net>
2023-10-10 20:22:07 +03:00
Stanislav Shwartsman
44eea71f37
implemented SM3 instructions (#84)
add rol/ror methods to scalar_arith.h and use in more places

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Co-authored-by: Stanislav Shwartsman <sshwarts@users.sourceforge.net>
2023-10-07 21:34:04 +03:00
Stanislav Shwartsman
e2f4eff91a fixed compilation of instrumentation examples with debugger OFF 2023-04-06 22:18:01 +03:00
Stanislav Shwartsman
0e4524f38f Implemented CMPccXADD instructions 2022-10-08 20:04:22 +03:00
Stanislav Shwartsman
63ed447717 fixed compilation 2022-10-02 23:09:41 +03:00
Stanislav Shwartsman
a56144833a add support for AVX encoded VNNI INT8 extensions 2022-10-02 23:00:46 +03:00
Stanislav Shwartsman
3a20495db8 implemented WRMSRNS extension - Non Serializing version of WRMSR opcode 2022-10-02 22:16:02 +03:00
Stanislav Shwartsman
9f76eaacea implemented AVX IFMA instructions 2022-10-02 22:08:20 +03:00
Stanislav Shwartsman
1e4f1624c8 remove trailing whitespace from source files 2022-08-23 21:46:04 +03:00
Stanislav Shwartsman
fb09790846 dos2unix to all files 2022-07-30 14:31:16 +03:00
Stanislav Shwartsman
b6e284b080 fix MSVC warnings 2021-02-11 15:05:06 +00:00