Bochs/bochs/cpu/decoder
2023-11-25 16:53:00 +02:00
..
decoder.h define CPU feature's enum together with feature name in one place 2023-10-15 23:56:11 +03:00
disasm.cc fixed compilation of instrumentation examples with debugger OFF 2023-04-06 22:18:01 +03:00
features.h integrate random fixes done during WAITPKG feature development 2023-11-25 16:53:00 +02:00
fetchdecode32.cc spelling fix in the comment 2023-11-18 21:48:42 +02:00
fetchdecode64.cc spelling fix in the comment 2023-11-18 21:48:42 +02:00
fetchdecode_avx.h coding style, cleanups and optimizations 2023-11-19 20:31:05 +02:00
fetchdecode_evex.h coding style, cleanups and optimizations 2023-11-19 20:31:05 +02:00
fetchdecode_opmap_0f3a.h fix decoder: SHA1RNDS4 instruction should be with no SSE prefix 2019-12-27 13:08:20 +00:00
fetchdecode_opmap_0f38.h coding style, cleanups and optimizations 2023-11-19 20:31:05 +02:00
fetchdecode_opmap.h initial code for UINTR implementation (#138) 2023-11-25 16:43:47 +02:00
fetchdecode_x87.h remove trailing whitespace from source files 2022-08-23 21:46:04 +03:00
fetchdecode_xop.h remove trailing whitespace from source files 2022-08-23 21:46:04 +03:00
fetchdecode.h optimize handling of allowed_to_run_FPU_MMX instructios common block 2023-11-08 06:48:53 +02:00
ia_opcodes.def initial code for UINTR implementation (#138) 2023-11-25 16:43:47 +02:00
ia_opcodes.h add into ia_opcodes.def disasm field for every instruction 2020-03-28 14:23:54 +00:00
instr.h fixed compilation of instrumentation examples with debugger OFF 2023-04-06 22:18:01 +03:00