integrate random fixes done during WAITPKG feature development
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@ -1202,9 +1202,11 @@ void bx_local_apic_c::vmx_preemption_timer_expired(void *this_ptr)
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void bx_local_apic_c::set_mwaitx_timer(Bit64u value)
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{
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if (mwaitx_timer_active) deactivate_mwaitx_timer();
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BX_DEBUG(("MWAITX timer: value = %u", value));
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bx_pc_system.activate_timer_ticks(mwaitx_timer_handle, value, 0);
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mwaitx_timer_active = true;
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if (value) {
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BX_DEBUG(("MWAITX timer: delay value = " FMT_LL "u", value));
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bx_pc_system.activate_timer_ticks(mwaitx_timer_handle, value, 0);
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mwaitx_timer_active = true;
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}
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}
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void bx_local_apic_c::deactivate_mwaitx_timer(void)
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@ -48,8 +48,8 @@ x86_feature(BX_ISA_SSE4_1, "sse4_1") /* SSE4_
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x86_feature(BX_ISA_SSE4_2, "sse4_2") /* SSE4_2 instruction */
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x86_feature(BX_ISA_POPCNT, "popcnt") /* POPCNT instruction */
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x86_feature(BX_ISA_MONITOR_MWAIT, "mwait") /* MONITOR/MWAIT instruction */
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x86_feature(BX_ISA_MONITORX_MWAITX, "mwaitx") /* MONITORX/MWAITX instruction (AMD) */
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x86_feature(BX_ISA_WAITPKG, "waitpkg") /* TPAUSE/UMONITOR/UMWAIT instructions */
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x86_feature(BX_ISA_MONITORX_MWAITX, "mwaitx") /* MONITORX/MWAITX instruction (AMD) */
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x86_feature(BX_ISA_VMX, "vmx") /* VMX instruction */
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x86_feature(BX_ISA_SMX, "smx") /* SMX instruction */
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x86_feature(BX_ISA_LONG_MODE, "longmode") /* Long Mode (x86-64) support */
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@ -58,13 +58,15 @@ void BX_CPU_C::wakeup_monitor(void)
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BX_CPU_THIS_PTR activity_state = BX_ACTIVITY_STATE_ACTIVE;
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// clear monitor
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BX_CPU_THIS_PTR monitor.reset_monitor();
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// deactivate mwaitx timer if was active to avoid its redundant firing
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BX_CPU_THIS_PTR lapic.deactivate_mwaitx_timer();
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}
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#endif
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void BX_CPP_AttrRegparmN(1) BX_CPU_C::MONITOR(bxInstruction_c *i)
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{
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#if BX_SUPPORT_MONITOR_MWAIT
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BX_DEBUG(("%s instruction executed EAX = 0x%08x", i->getIaOpcodeNameShort(), EAX));
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BX_DEBUG(("%s instruction executed RAX = 0x" FMT_ADDRX, i->getIaOpcodeNameShort(), RAX));
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if (i->getIaOpcode() == BX_IA_MONITOR) {
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// CPL is always 0 in real mode
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@ -95,6 +97,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::MONITOR(bxInstruction_c *i)
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bx_phy_address paddr = BX_CPU_THIS_PTR address_xlation.paddress1;
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#if BX_SUPPORT_MEMTYPE
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if (BX_CPU_THIS_PTR address_xlation.memtype1 != BX_MEMTYPE_WB) {
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BX_DEBUG(("%s for non-WB memory type phys_addr=0x" FMT_PHY_ADDRX, i->getIaOpcodeNameShort(), BX_CPU_THIS_PTR monitor.monitor_addr));
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BX_NEXT_INSTR(i);
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}
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#endif
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@ -184,7 +187,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::MWAIT(bxInstruction_c *i)
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// resets the monitoring logic.
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Bit32u new_state = BX_ACTIVITY_STATE_MWAIT;
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if (ECX & 1) {
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if (ECX & 0x1) {
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#if BX_SUPPORT_VMX
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// When "interrupt window exiting" VMX control is set MWAIT instruction
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// won't cause the processor to enter sleep state with EFLAGS.IF = 0
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@ -199,8 +202,8 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::MWAIT(bxInstruction_c *i)
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BX_INSTR_MWAIT(BX_CPU_ID, BX_CPU_THIS_PTR monitor.monitor_addr, CACHE_LINE_SIZE, ECX);
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if (ECX & 2) {
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if (i->getIaOpcode() == BX_IA_MWAITX) {
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if (i->getIaOpcode() == BX_IA_MWAITX) {
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if ((ECX & 0x2) != 0 && EBX != 0) {
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BX_CPU_THIS_PTR lapic.set_mwaitx_timer(EBX);
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}
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}
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