Commit Graph

3498 Commits

Author SHA1 Message Date
Bryce Denney
f780d81523 - recreate dependencies by running the gcc -MM thing again
- include references to mmx.o but leave it commented until it actually
  gets checked in.
2002-08-26 16:22:07 +00:00
Christophe Bothamy
17adce9633 - added MOV_CdRd in v8086 mode (from Martin Str|mberg) 2002-08-10 12:06:26 +00:00
Volker Ruppert
0bcee8caf7 - POPFD implemented for vm86 (tested with MS-DOS 6.2 and EMM386) 2002-08-05 19:45:32 +00:00
Christophe Bothamy
1f577b31fa - ouput unknown MSR regsiter number 2002-08-01 07:23:11 +00:00
Bryce Denney
1403a59ec4 - apply patch from Zwane Mwaikambo <zwane@linuxpower.ca> posted to
mailing list.
2002-07-25 13:30:07 +00:00
Bryce Denney
eb0974f0ce - if misaligned or wrong size write, print the address and length! 2002-07-23 15:32:14 +00:00
Bryce Denney
7dd83e2140 - removed my antisocial asserts from the apic code, and changed them to
BX_PANICs.
2002-07-21 13:56:49 +00:00
Volker Ruppert
27fedb5aba - AAM can generate an exception (divide by 0)
- AAM: modification of flags depends on AL, not AX
- AAM always clears CF and AF
- AAD can also modify AF, CF and OF
- DAA can also clear the CF
2002-07-06 11:02:35 +00:00
Christophe Bothamy
badef8cec8 - included instinc's patch.stack-return-from-v86 2002-06-27 13:31:54 +00:00
Bryce Denney
7e04c23d2f - check in Mike Reiker's 4meg page code from a patch that he submitted last
November 17.
2002-06-19 15:49:07 +00:00
Gregory Alexander
5d7c6627fd I botched the linked list implementation pretty badly.
Kudos to TLD for fixing it for me.
2002-06-06 23:03:09 +00:00
Gregory Alexander
1be5b1d46c Added a linked list to further speed up icache invalidates.
These should be pretty snappy now.  It's time to generate
some actual statistics.

 Modified Files:
 	cpu/cpu.cc cpu/cpu.h cpu/init.cc memory/memory.cc
2002-06-05 21:51:30 +00:00
Gregory Alexander
c41505e342 Added a RPN directory for the cache to help make invalidates
faster.  Hopefully this won't slow things down too much.

 	config.h.in cpu/cpu.cc cpu/cpu.h memory/memory.cc
2002-06-05 03:59:31 +00:00
Gregory Alexander
fda1b874e9 Check in FETCHDECODE Caching, with changes.
Specific changes from the patch:

1.) renamed fdcache_eip to fdcache_ip, as it is using
the RIP instead of the EIP.

2.) added a Boolean array fdcache_is32 which uses is32
to determine icache hits.  Otherwise we could run 32-bit
code as 16-bit or vice versa.


 Modified Files:
 	config.h.in cpu/cpu.cc cpu/cpu.h memory/memory.cc
2002-06-03 22:39:11 +00:00
Bryce Denney
30aaf4088e - commit patch.wxwindows.gz in the main branch. Now you can try out
the wxwindows interface by just "configure --with-wx; make"

  Modified Files:
    Makefile.in bochs.h config.h.in configure configure.in
    load32bitOShack.cc logio.cc main.cc cpu/cpu.cc cpu/cpu.h
    debug/dbg_main.cc gui/Makefile.in gui/control.cc gui/gui.cc
    gui/siminterface.cc gui/siminterface.h gui/x.cc iodev/cdrom.cc
    iodev/keyboard.cc memory/misc_mem.cc
  Added Files:
    README-wxWindows wxbochs.rc gui/wx.cc gui/wxmain.cc
    gui/wxmain.h gui/bitmaps/cdromd.xpm
    gui/bitmaps/configbutton.xpm gui/bitmaps/copy.xpm
    gui/bitmaps/floppya.xpm gui/bitmaps/floppyb.xpm
    gui/bitmaps/mouse.xpm gui/bitmaps/paste.xpm
    gui/bitmaps/power.xpm gui/bitmaps/reset.xpm
    gui/bitmaps/snapshot.xpm
  Removed Files:
    patches/patch.wxwindows.gz
2002-04-18 00:22:20 +00:00
instinc
1e7cc13b04 reversed the changes done to exception() 2002-04-11 01:19:24 +00:00
instinc
01b699af16 as per bug report 498386, line 550 was causing a panic which has been disabled 2002-04-11 00:36:02 +00:00
Bryce Denney
49decc485c - when merging EDX and EAX to create the apic base address, add
a typecast to Bit64u before shifting left by 32.  Otherwise
  the EDX<<32 would overflow on 32 bit machines and the address would
  be wrong.
2002-04-03 15:12:22 +00:00
instinc
748ccdef95 put bx_guard under #if/#endif BX_DEBUGGER 2002-04-01 13:14:37 +00:00
instinc
22dc1c4f96 added address of the caught watchpoint 2002-04-01 04:42:43 +00:00
instinc
18c79cee9c check if CTRL+C is pressed while in a HLT instruction 2002-04-01 04:02:02 +00:00
Bryce Denney
640d71d017 - check in Zwane Mwaikambo's MSR patch: patch.msr. 2002-03-27 16:04:05 +00:00
Bryce Denney
6881dbd848 - only print the first 10 copies of "WARNING: Local APIC Processor Priority not
implemented" to avoid slowing sim down to a crawl.
2002-03-27 03:47:45 +00:00
Bryce Denney
b8ecf5b118 - apply patch.smp-sync-arb-ids. This patch adds a local APIC behavior
that was missing before, the special "INIT Level Deassert" synchronize
  arbitration ID trick.
2002-03-25 01:58:34 +00:00
Bryce Denney
ae6094c268 - change lots of "if (bx_dbg.apic) BX_INFO(...)" into "BX_DEBUG(...)".
This allows you to turn on debug msgs at runtime.  The old BX_INFOs
  were created before BX_DEBUG existed.
2002-03-23 00:54:37 +00:00
Bryce Denney
0fef43eeb6 - in debugger, fix instruction tracing for SMP simulation. This was
fixed in patch.smp-instr-trace for Bochs 1.3, but the patch conflicted
  with the latest source.  It was simple enough to just make the changes by
  hand.  This should fix bug [ #532321 ] SMP debug: trace-on fails
2002-03-20 23:50:23 +00:00
Bryce Denney
687e8bcfb4 - clean up lines related to disassembly that Greg left. This patch makes no
changes of importance...I just removed commented out lines.
2002-03-20 23:45:31 +00:00
Bryce Denney
5d2667b345 - set dest format to 0xf by default. I'm just modeling bits 31-28, so 0xff is
invalid.  This fixes the misleading panic message:
  bx_local_apic_c::match_logical_addr: cluster model addressing not
  implemented, which was printed even if the OS did not request cluster
  addressing.
2002-03-20 23:32:43 +00:00
Bryce Denney
571ac50d1c - apply patch.smp-eio-readable-wli from William Lee Irwin III.
My code did a panic if you tried to read the EOI register (the panic
  message was wrong but the concept was right).  However it turns out
  some OSes do actually read this register--hopefully they ignore the
  result.  So it should not panic.
2002-03-20 02:51:47 +00:00
Bryce Denney
a6d20bb03e - add #if BX_DEBUGGER around a few more things. :) 2002-03-12 19:00:44 +00:00
Bryce Denney
7a6b013101 - the new code I added in patch.triple-fault-recover needed to be
conditional on BX_DEBUGGER==1.
2002-03-12 18:59:31 +00:00
Bryce Denney
de51eda5d1 - apply patch.triple-fault-recover 2002-03-12 09:16:41 +00:00
Bryce Denney
95467fa241 - Somebody was convinced that the enter instruction with level>0 was broken,
and they added a panic.  Apparantly this instruction is not used very often
  because it went for a long time before anyone noticed.  Peter Tattam started
  running into the panic while emulating his OS called Petros, and through
  a comparison between vmware and bochs results he believes that enter is
  doing the right thing.  So, I have changed the panic into a BX_ERROR for now,
  and added code to ensure that it only gets printed once per bochs run.
2002-03-05 15:50:17 +00:00
Bryce Denney
e38b1c8f7b - the stack_return_from_v86 error is sometimes printed millions of times
and produces a gigantic log file.  Now, after 100 times, it will no
  longer print any more of this particular error.
2002-03-01 17:27:25 +00:00
Gregory Alexander
2fbcdccb02 Added a comment on iret flag writing. 2002-02-22 05:33:36 +00:00
Gregory Alexander
29ba221c3e Make trace output more meaningful by printing each instruction immediately
BEFORE it is executed.  Print the registers at this time, BEFORE the
instruction, since they are the values BEFORE the instruction is executed.

The important result of this is that in TRACE output, both the instruction
causing an exception and the first instruction of the exception handler
are BOTH printed.

I'm working on getting this behavior in the debugger user-interface.

 Modified Files:
 	cpu/cpu.cc debug/dbg_main.cc
2002-02-15 22:58:06 +00:00
Bryce Denney
976e0b67d9 - clarify panic message. It panics if HLT is executed from segment 0xf000,
in other words from ROM BIOS code.
2001-11-18 16:32:40 +00:00
Bryce Denney
8a00171179 - checked in cmpxchg8b patch from Michael Hohmuth <hohmuth@innocent.com> 2001-11-17 22:22:03 +00:00
Bryce Denney
fea759a204 - apply patch.pci from Volker Ruppert. See
[ #481546 ] pci patch (Volker Ruppert) for any followups.
2001-11-14 01:39:22 +00:00
Bryce Denney
918a32a67a - patch from Mike Rieker <mrieker@o3one.org> associated with this bug rpt:
[ #480422 ] gdt 'accessed' bit
2001-11-13 05:11:41 +00:00
Bryce Denney
e0b4801b1f - commit Roland Mainz's idle hack as a configure option. To try it,
configure with --enable-idle-hack.  I have moved most of the code into
  x.cc since it is X windows specific.
2001-11-12 00:45:09 +00:00
Bryce Denney
c100b382fe - in task_switch when it tried to ensure that the old TSS was paged in,
it actually used the new TSS address, fixed.
- add a debug line that says what CR3 is changed to
2001-11-11 04:57:05 +00:00
Bryce Denney
b4aa45671b - Applied patch from Santiago Bazerque. See this bug report:
[ #463018 ] retf not removing parameters sometimes
2001-11-10 23:00:55 +00:00
Todd T.Fries
0761193c5a remove '^M' chars that somehow showed up
I am reporting and disabling this PANIC.  The report is this commit message,
and the test case is win98.
2001-11-05 17:37:16 +00:00
Bryce Denney
b86dbe1f3c - committed patches/patch.no-busy-in-tr-cache. I'm leaving the patch
lying around for a while in case it needs to be reverted.
2001-10-09 21:15:14 +00:00
Bryce Denney
605a28df66 - add panic to warn people of incomplete IRET32 emulation, and encourage
people to report if they hit this panic.
2001-10-09 13:45:17 +00:00
Bryce Denney
75a1d092f6 - I was dismayed to find that stack_return_from_v86 was terribly incomplete.
It did an exception, and then the real code seemed to be commented out
  with an #if 0...#endif.  I put a panic there, asking people to please
  report how they arrived at that condition, and enabled the #if 0 code.
  This was pointed out by luca abeni <l_abeni@hotmail.com>.
2001-10-09 12:23:15 +00:00
Bryce Denney
c99f9aa8ef - use @CPP_SUFFIX@ substitution to get the dependencies right for nmake too 2001-10-07 20:19:04 +00:00
Bryce Denney
8a21b1a9d6 - apply patches/patch.add-makefile-deps. I have added dependencies
which were generated with gcc -MM to the end of each Makefile.in
  so that make understands which files depend on which.  Basically,
  everything depends on bochs.h, which depends on everything, which
  is not ideal.
2001-10-07 00:33:21 +00:00
Bryce Denney
bd286316a0 - clarify panic message in load_seg_reg, to show what's really being compared 2001-10-06 15:19:17 +00:00
Bryce Denney
7d499adac0 - move trace call before the TICK. Well, there are two different places
that TICK is called so I put a trace call just before each TICK.
  This seems best, since the trace has a chance to print before the tick
  can trigger time-based events elsewhere in the system.
2001-10-06 00:00:22 +00:00
Bryce Denney
b70ae5ccf6 - changed args on disassemble current 2001-10-05 21:05:11 +00:00
instinc
dabe63ef72 added a control variable for debugger to know if register tracing is required or not 2001-10-03 19:53:48 +00:00
Bryce Denney
daf2a9fb55 - add RCS Id to header of every file. This makes it easier to know what's
going on when someone sends in a modified file.
2001-10-03 13:10:38 +00:00
Bryce Denney
0f9a525717 - try again! This should fix
[ #433759 ] virtual address checks can overflow
  and I have tested the condition much more thoroughly this time.
  All segment sizes should be supported.
2001-10-03 01:06:31 +00:00
Bryce Denney
6a1c01c8b5 - back out my poorly written patch.virtual-address-checks-overflow 2001-10-02 20:01:29 +00:00
Bryce Denney
beca5d6e67 - fix stupid printf-type bug 2001-10-02 18:11:06 +00:00
Bryce Denney
67ebaaca87 - apply patch.virtual-addr-checks-overflow to fix bug
[ #433759 ] virtual address checks can overflow
  > Bochs has been crashing in some cases when you try to access data which
  > overlaps the segment limit, when the segment limit is near the 32-bit
  > boundary.  The example that came up a few times is reading/writing 4 bytes
  > starting at 0xffffffff when the segment limit was 0xffffffff.  The
  > condition used to compare offset+length-1 with the limit, but
  > offset+length-1 was overflowing so the comparison went wrong.  This patch
  > changes the condition so that it supports all segment limits except for
  > sizes 0,1,2,3 bytes.  Dave and I figured that these sizes would not be
  > needed, while size 0xffffffff is used quite a lot.
2001-10-02 17:02:28 +00:00
Bryce Denney
22f82dcbb3 - copy prev_eip and prev_esp again AFTER the handle_async_event section
has run.  This ensures that the prev_eip and prev_esp that is used
  for tracing and breakpoint checks is correct even in the cycle after
  an interrupt or trap.
2001-09-28 04:12:26 +00:00
Bryce Denney
610a7f5c1b - fix bug introduced by Bryce's revision 1.16, that causes you to get
stuck at breakpoints forever.  Added a comment that says what code
  does that, so that future hackers will be warned.
2001-09-27 23:41:18 +00:00
Bryce Denney
9a1364b1f9 - apply patches/patch.consistent2b. Description:
> This patch fixes a number of debugger problems.
>   - with trace-on, simulation time would pass 5x faster than usual, so
>     interrupts and other timed events would happen at different times
>   - with trace-on, breakpoints were ignored
>   - with trace-on, control-C would not stop the processor and return to the
>     debugger.
>
> This patch changes the execution quantum for the debugger to 1, which means
> that cpu_loop is asked to do one instruction at a time.  This may cause
> bochs with the debugger to be slower than before.
>
> I haven't tested without the debugger yet, so I don't know if the timing
> of events matches or not.
2001-09-27 14:19:38 +00:00
Bryce Denney
d614265f58 - check in a (commented out) debugging option controlled by BX_INSTR_SPY.
To enable, set the #define to 1.
2001-09-26 15:19:56 +00:00
Bryce Denney
4073d65f4d - apply patch [ #455014 ] CR0 bug in 80486, described as:
> In the register CR0, when the bit PM is enabled, the bit 4 is 0
  > when should be 1.
  Another fix from an anonymous donor.
2001-09-19 17:36:54 +00:00
Bryce Denney
fd7e7ee86c - added debugger command "info fpu" which prints all FPU registers
in an output format similar to gdb (when you do info all-registers).
  Also, if you do "info all" you get the CPU registers and the FPU
  registers.
- added bx_cpu_c method called fpu_print_regs, which is implemented
  in wmFPUemu_glue.cc
2001-09-15 06:55:14 +00:00
Bryce Denney
f04e6fe346 - apply VPATH patch from Edouard G. Parmelan, posted to list on September 1 2001-09-14 04:19:08 +00:00
Bryce Denney
ad11335293 - remove space after line continuation character.
Thanks to Martijn Boekhorst <Martijn@boekhorst.net> for pointing it out.
2001-09-11 23:32:14 +00:00
Todd T.Fries
28885e4973 some INFO->DEBUG/ERROR cleanups 2001-08-31 16:06:32 +00:00
Todd T.Fries
cd9733391b AtheOS triggers this, move to debug 2001-08-24 21:02:37 +00:00
Bryce Denney
284178479b - apply patch "patch.ifdef-paging-tlb" 2001-08-10 18:42:24 +00:00
Bryce Denney
c0bd506231 - apply patch [ #439314 ] [Patch] Exception 1 (debug) on HALT
by thomas.petazzoni@meridon.com.  Bryce introduced this bug in
  revision 1.9 when split the code into separate #ifdefs for single
  CPU and multiple CPU.  Comments on the patch are:
  > The following patch addresses a bug concerning the exception 1 (debug)
  > which is being raised during HALT under certain conditions.  It
  > appears only on recent versions (1.2.1 or last CVS), and not on
  > version 2000-0104.
2001-07-08 14:36:36 +00:00
Bryce Denney
3d29d5d614 - add instrumentation macros for begin and end opcode. These are usually
defined to be empty, so there should be no effect except for instrumentation
2001-06-28 19:45:44 +00:00
Todd T.Fries
4f1c151520 Move Init $ to ::init() 2001-06-27 20:27:49 +00:00
Todd T.Fries
a06b031dcf setprefix -> put 2001-06-27 19:16:01 +00:00
Todd T.Fries
12985edb26 setprefix now uses a variable length name as a string for an argument 2001-06-19 21:36:09 +00:00
Bryce Denney
c8ae6c4aa9 - set logging prefix and type in the constructor 2001-06-16 04:27:22 +00:00
Todd T.Fries
61d13559e9 tweaks here and there, show ne2k mac, shorten BX_ messages by removing redundant strings, etc 2001-06-13 16:53:58 +00:00
Bryce Denney
f822257511 - there were cases where BX_APIC_SUPPORT were used and others where
BX_SUPPORT_APIC were used.  To follow the pattern used by other
  names like this, I changed them all to BX_SUPPORT_APIC.
  Thanks to Tom Lindström for chasing this down!
2001-06-12 13:07:43 +00:00
Bryce Denney
565fa8ea8e - another speed boost: when not using SMP, use
BX_CPU_C bx_cpu;
     BX_MEM_C bx_mem;
  and when more than one processor, use
     BX_CPU_C    *bx_cpu_array[BX_SMP_PROCESSORS];
     BX_MEM_C    *bx_mem_array[BX_ADDRESS_SPACES];
  The changeover is controlled by BX_SMP_PROCESSORS, but there are only
  a few code changes since nearly all code uses the BX_CPU(n) and BX_MEM(n)
  macros.
- This turns out to make a 10% speed difference!  With this revision,
  the CVS version now gets 95% of the performance of the 3/25/2000
  snapshot, which I've been using as my baseline.
2001-06-05 17:35:08 +00:00
Bryce Denney
b01b9109a6 - the SMP merge has reduced performance of even one processor, so this
is the first attempt to regain the performance of pre-SMP bochs
  (1.1.2).  When simulating only one processor, stay in cpu_loop forever
  as pre-SMP versions did.  The overhead of returning from cpu_loop over
  and over was slowing us down.
2001-06-05 15:56:19 +00:00
Todd T.Fries
2bbb1ef8eb strip '\n' from BX_{INFO,DEBUG,ERROR,PANIC}
don't need it, moved the output of it into the general io functions.
saves space, as well as removes the confusing output if a '\n' is left off
2001-05-30 18:56:02 +00:00
Todd T.Fries
e291dd17d4 demote BX_INFO to BX_ERROR 2001-05-25 22:17:51 +00:00
Todd T.Fries
9ebd237408 more output cleanup 2001-05-25 18:44:38 +00:00
Todd T.Fries
0b613932ac remove redundant 2001-05-25 15:06:45 +00:00
Todd T.Fries
34a4fa7c67 demote INFO/PANIC to DEBUG to silence a number of w98 verbosity by default 2001-05-25 14:25:25 +00:00
Bryce Denney
49664f7503 - parts of the SMP merge apparantly broke the debugger and this revision
tries to fix it.  The shortcuts to register names such as AX and DL are
  #defines in cpu/cpu.h, and they are defined in terms of BX_CPU_THIS_PTR.
  When BX_USE_CPU_SMF=1, this works fine.  (This is what bochs used for
  a long time, and nobody used the SMF=0 mode at all.)  To make SMP bochs
  work, I had to get SMF=0 mode working for the CPU so that there could
  be an array of cpus.

  When SMF=0 for the CPU, BX_CPU_THIS_PTR is defined to be "this->" which
  only works within methods of BX_CPU_C.  Code outside of BX_CPU_C must
  reference BX_CPU(num) instead.
- to try to enforce the correct use of AL/AX/DL/etc. shortcuts, they are
  now only #defined when "NEED_CPU_REG_SHORTCUTS" is #defined.  This is
  only done in the cpu/*.cc code.
2001-05-24 18:46:34 +00:00
Bryce Denney
26cf93f455 - fixed stupid bug in my RDTSC code, which made the TSD bit
(time stamp disable) not work correctly
2001-05-24 18:03:14 +00:00
Todd T.Fries
cd01453c9d cleanup output 2001-05-23 19:36:55 +00:00
Bryce Denney
3503104390 - configure turns on APIC when cpu level > 5
- now the APIC feature bit is really controlled by cpu level and
  BX_APIC_SUPPORT, so it won't go on at the wrong time.
2001-05-23 15:54:05 +00:00
Bryce Denney
e61d00351f - merged BRANCH-smp-bochs into main branch. For details see comments
in BRANCH-smp-bochs revisions.
- The general task was to make multiple CPU's which communicate
  through their APICs.  So instead of BX_CPU and BX_MEM, we now have
  BX_CPU(x) and BX_MEM(y).  For an SMP simulation you have several
  processors in a shared memory space, so there might be processors
  BX_CPU(0..3) but only one memory space BX_MEM(0).  For cosimulation,
  you could have BX_CPU(0) with BX_MEM(0), then BX_CPU(1) with
  BX_MEM(1).  WARNING: Cosimulation is almost certainly broken by the
  SMP changes.
- to simulate multiple CPUs, you have to give each CPU time to execute
  in turn.  This is currently implemented using debugger guards.  The
  cpu loop steps one CPU for a few instructions, then steps the
  next CPU for a few instructions, etc.
- there is some limited support in the debugger for two CPUs, for
  example printing information from each CPU when single stepping.
2001-05-23 08:16:07 +00:00
Bryce Denney
d7d75a7bdc - changed some messages from BX_INFO to BX_DEBUG so that they wouldn't
show up by default.
2001-05-22 18:48:31 +00:00
Bryce Denney
aab41a611e - SLDT in real mode produces undefined opcode exception. Changed BX_PANIC
to BX_ERROR under these circumstances.
2001-05-17 20:05:17 +00:00
Todd T.Fries
a628039f5f report undefined opcode if not implemented instead of panicing for RDTSC 2001-05-16 17:27:01 +00:00
Todd T.Fries
3c7414a418 error and undefined opcode + typo with BX_INFO in code only used on i386's 2001-05-16 16:50:04 +00:00
Bryce Denney
1d2cd83408 - Double fault patch from Thomas Petazzoni <thomas.petazzoni@ifrance.com>,
sourceforge patch #423726.  He writes:
  > you'll find as attachment a little patch which make
  > bochs support the double fault. currently, when 2 pages
  > fault occur, bochs does not generate a double fault (as
  > the Intel documentation says) but do
  > generate a other page fault, which make a triple fault,
  > and bochs will exit.
  >
  > this very little patch make bochs support this double
  > fault, which is
  > used in our OS in order to dynamically increse kernel
  > level stacks.
2001-05-15 15:29:33 +00:00
Todd T.Fries
bdb89cd364 merge in BRANCH-io-cleanup.
To see the commit logs for this use either cvsweb or
cvs update -r BRANCH-io-cleanup and then 'cvs log' the various files.

In general this provides a generic interface for logging.

logfunctions:: is a class that is inherited by some classes, and also
.   allocated as a standalone global called 'genlog'.  All logging uses
.   one of the ::info(), ::error(), ::ldebug(), ::panic() methods of this
.   class through 'BX_INFO(), BX_ERROR(), BX_DEBUG(), BX_PANIC()' macros
.   respectively.
.
.   An example usage:
.     BX_INFO(("Hello, World!\n"));

iofunctions:: is a class that is allocated once by default, and assigned
as the iofunction of each logfunctions instance.  It is this class that
maintains the file descriptor and other output related code, at this
point using vfprintf().  At some future point, someone may choose to
write a gui 'console' for bochs to which messages would be redirected
simply by assigning a different iofunction class to the various logfunctions
objects.

More cleanup is coming, but this works for now.  If you want to see alot
of debugging output, in main.cc, change onoff[LOGLEV_DEBUG]=0 to =1.

Comments, bugs, flames, to me: todd@fries.net
2001-05-15 14:49:57 +00:00
Bryce Denney
a6fef54678 - update copyright dates to 2001 for all mandrake headers
- for bochs files with other header, replaced with current mandrake header
2001-04-10 02:20:02 +00:00
Bryce Denney
4e04f4cb58 - change all inline declarations to one of two macros: BX_C_INLINE or
BX_CPP_INLINE.  Then in config.h.in you can define these two as you
  wish.
2001-04-10 02:10:09 +00:00
cvs
beff63eb32 - entered original Bochs snapshot bochs-2000_0325a.tar.gz from
ftp.bochs.com
2001-04-10 01:04:59 +00:00