- checked in cmpxchg8b patch from Michael Hohmuth <hohmuth@innocent.com>
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/////////////////////////////////////////////////////////////////////////
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// $Id: arith32.cc,v 1.6 2001-10-03 13:10:37 bdenney Exp $
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// $Id: arith32.cc,v 1.7 2001-11-17 22:22:03 bdenney Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -856,11 +856,38 @@ BX_CPU_C::CMPXCHG_EdGd(BxInstruction_t *i)
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BX_CPU_C::CMPXCHG8B(BxInstruction_t *i)
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{
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#if (BX_CPU_LEVEL >= 5) || (BX_CPU_LEVEL_HACKED >= 5)
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if (i->mod != 0xc0) {
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BX_INFO(("CMPXCHG8B: dest is reg: #UD"));
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UndefinedOpcode(i);
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}
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BX_PANIC(("CMPXCHG8B: not implemented yet"));
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Bit32u op1_64_lo, op1_64_hi, diff;
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if (i->mod == 0xc0) {
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BX_INFO(("CMPXCHG8B: dest is reg: #UD"));
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UndefinedOpcode(i);
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}
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/* pointer, segment address pair */
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read_virtual_dword(i->seg, i->rm_addr, &op1_64_lo);
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read_RMW_virtual_dword(i->seg, i->rm_addr + 4, &op1_64_hi);
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diff = EAX - op1_64_lo;
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diff |= EDX - op1_64_hi;
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// SET_FLAGS_OSZAPC_32(EAX, op1_32, diff_32, BX_INSTR_CMP32);
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if (diff == 0) { // if accumulator == dest
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// ZF = 1
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set_ZF(1);
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// dest <-- src
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write_RMW_virtual_dword(ECX);
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write_virtual_dword(i->seg, i->rm_addr, &EBX);
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}
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else {
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// ZF = 0
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set_ZF(0);
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// accumulator <-- dest
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EAX = op1_64_lo;
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EDX = op1_64_hi;
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}
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#else
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BX_INFO(("CMPXCHG8B: not implemented yet"));
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UndefinedOpcode(i);
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@ -1,88 +0,0 @@
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Date: 15 Nov 2001 17:41:33 +0100
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From: Michael Hohmuth <hohmuth@innocent.com>
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To: bochs-developers@lists.sourceforge.net
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Subject: [Bochs-developers] Patch: CMPXCHG8B
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Parts/Attachments:
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1 Shown 19 lines Text
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2 OK 59 lines Text
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----------------------------------------
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Bochs developers,
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attached below is a patch to add support for the CMPXCHG8B instruction
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to Bochs. The patch is relative to the 20011008 snapshot release. I
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have tested the modification, and it seems to work fine.
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One question:
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I mostly adapted the code from the implementation of CMPXCHG,
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implemented in BX_CPU_C::CMPXCHG_EdGd(). Could someone please explain
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what the line containing ``SET_FLAGS_OSZAPC_32'' does in that
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function, and whether something similar is needed for CMPXCHG8B?
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Cheers,
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Michael
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--
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hohmuth@innocent.com, hohmuth@inf.tu-dresden.de
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http://home.pages.de/~hohmuth/
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Index: arith32.cc
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===================================================================
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RCS file: /home/hohmuth/local/var/cvs/bochs/cpu/arith32.cc,v
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retrieving revision 1.1.1.1
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retrieving revision 1.2
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diff -u -p -r1.1.1.1 -r1.2
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--- arith32.cc 2001/11/14 17:26:46 1.1.1.1
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+++ arith32.cc 2001/11/15 16:10:09 1.2
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@@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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-// $Id: patch.cmpxchg8b,v 1.1 2001-11-15 16:53:24 bdenney Exp $
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+// $Id: patch.cmpxchg8b,v 1.1 2001-11-15 16:53:24 bdenney Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@@ -856,11 +856,38 @@ BX_CPU_C::CMPXCHG_EdGd(BxInstruction_t *
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BX_CPU_C::CMPXCHG8B(BxInstruction_t *i)
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{
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#if (BX_CPU_LEVEL >= 5) || (BX_CPU_LEVEL_HACKED >= 5)
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- if (i->mod != 0xc0) {
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- BX_INFO(("CMPXCHG8B: dest is reg: #UD"));
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- UndefinedOpcode(i);
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- }
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- BX_PANIC(("CMPXCHG8B: not implemented yet"));
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+
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+ Bit32u op1_64_lo, op1_64_hi, diff;
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+
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+ if (i->mod == 0xc0) {
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+ BX_INFO(("CMPXCHG8B: dest is reg: #UD"));
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+ UndefinedOpcode(i);
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+ }
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+
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+ /* pointer, segment address pair */
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+ read_virtual_dword(i->seg, i->rm_addr, &op1_64_lo);
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+ read_RMW_virtual_dword(i->seg, i->rm_addr + 4, &op1_64_hi);
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+
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+ diff = EAX - op1_64_lo;
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+ diff |= EDX - op1_64_hi;
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+
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+// SET_FLAGS_OSZAPC_32(EAX, op1_32, diff_32, BX_INSTR_CMP32);
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+
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+ if (diff == 0) { // if accumulator == dest
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+ // ZF = 1
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+ set_ZF(1);
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+ // dest <-- src
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+ write_RMW_virtual_dword(ECX);
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+ write_virtual_dword(i->seg, i->rm_addr, &EBX);
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+ }
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+ else {
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+ // ZF = 0
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+ set_ZF(0);
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+ // accumulator <-- dest
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+ EAX = op1_64_lo;
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+ EDX = op1_64_hi;
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+ }
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+
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#else
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BX_INFO(("CMPXCHG8B: not implemented yet"));
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UndefinedOpcode(i);
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