mirror of https://github.com/bochs-emu/Bochs
- apply patch.smp-sync-arb-ids. This patch adds a local APIC behavior
that was missing before, the special "INIT Level Deassert" synchronize arbitration ID trick.
This commit is contained in:
Bryce Denney
parent
fcd6f99391
commit
b8ecf5b118
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: apic.cc,v 1.11 2002-03-23 00:54:37 bdenney Exp $
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// $Id: apic.cc,v 1.12 2002-03-25 01:58:34 bdenney Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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#define NEED_CPU_REG_SHORTCUTS 1
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@ -22,6 +22,13 @@ bx_generic_apic_c::~bx_generic_apic_c ()
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{
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}
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void
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bx_generic_apic_c::set_arb_id (int new_arb_id)
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{
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// politely ignore it. This gets sent to every APIC, regardless of its
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// type.
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}
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// init is called during RESET and when an INIT message is delivered.
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void bx_generic_apic_c::init ()
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{
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@ -160,8 +167,7 @@ bx_generic_apic_c::deliver (Bit8u dest, Bit8u dest_mode, Bit8u delivery_mode, Bi
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Bit32u deliver_bitmask = get_delivery_bitmask (dest, dest_mode);
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// mask must include ONLY local APICs, or we will have problems.
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if (!deliver_bitmask) {
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if (bx_dbg.apic)
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BX_INFO(("deliver failed: no APICs in destination bitmask"));
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BX_PANIC(("deliver failed for vector %02x: no APICs in destination bitmask", vector));
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return false;
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}
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switch (delivery_mode) {
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@ -185,6 +191,10 @@ bx_generic_apic_c::deliver (Bit8u dest, Bit8u dest_mode, Bit8u delivery_mode, Bi
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break;
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case 5: // INIT
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{
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// NOTE: special behavior of local apics is handled in
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// bx_local_apic_c::deliver.
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// normal INIT. initialize the local apics in the delivery mask.
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for (int bit=0; bit<APIC_MAX_ID; bit++) {
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if (deliver_bitmask & (1<<bit))
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apic_index[bit]->init ();
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@ -221,6 +231,33 @@ bx_generic_apic_c::deliver (Bit8u dest, Bit8u dest_mode, Bit8u delivery_mode, Bi
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return true;
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}
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Boolean
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bx_local_apic_c::deliver (Bit8u dest, Bit8u dest_mode, Bit8u delivery_mode, Bit8u vector, Bit8u polarity, Bit8u trig_mode)
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{
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// In this function, implement only the behavior that is specific to
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// the local apic. For general behavior of all apics, just send it to
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// the base class.
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if (delivery_mode == 5)
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{
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int trig_mode = (icr_low >> 15) & 1;
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int level = (icr_low >> 14) & 1;
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if (level == 0 && trig_mode == 1) {
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// special mode in local apic. See "INIT Level Deassert" in the
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// Intel Soft. Devel. Guide Vol 3, page 7-34. This magic code
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// causes all APICs (regardless of dest address) to set their
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// arbitration ID to their APIC ID.
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BX_INFO (("INIT with Level&Deassert: synchronize arbitration IDs"));
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for (int bit=0; bit<APIC_MAX_ID; bit++) {
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if (apic_index[bit])
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apic_index[bit]->set_arb_id (apic_index[bit]->get_id ());
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}
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return true;
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}
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}
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// not any special case behavior, just use generic apic code.
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return bx_generic_apic_c::deliver (dest, dest_mode, delivery_mode, vector, polarity, trig_mode);
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}
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bx_local_apic_c::bx_local_apic_c(BX_CPU_C *mycpu)
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: bx_generic_apic_c ()
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{
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@ -229,6 +266,13 @@ bx_local_apic_c::bx_local_apic_c(BX_CPU_C *mycpu)
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hwreset ();
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}
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void
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bx_local_apic_c::set_arb_id (int new_arb_id)
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{
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BX_DEBUG (("set arbitration ID to %d", new_arb_id));
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arb_id = new_arb_id;
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}
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void
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bx_local_apic_c::hwreset ()
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{
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@ -334,9 +378,11 @@ void bx_local_apic_c::write (Bit32u addr, Bit32u *data, unsigned len)
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break;
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case 0xd0: // logical destination
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log_dest = (*data >> 24) & 0xff;
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BX_DEBUG (("set logical destiation to %02x", log_dest));
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break;
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case 0xe0: // destination format
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dest_format = (*data >> 28) & 0xf;
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BX_DEBUG (("set destination format to %02x", dest_format));
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break;
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case 0xf0: // spurious interrupt vector
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spurious_vec = (spurious_vec & 0x0f) | (*data & 0x3f0);
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@ -645,12 +691,9 @@ Bit8u bx_local_apic_c::get_ppr ()
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Bit8u bx_local_apic_c::get_apr ()
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{
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BX_ERROR (("WARNING: Local APIC Arbitration Priority not implemented, returning 0"));
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// should look at TPR, vector of highest priority isr, etc.
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return 0;
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return arb_id;
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}
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void
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bx_local_apic_c::periodic (Bit32u usec_delta)
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{
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: cpu.h,v 1.15 2001-10-03 19:53:48 instinc Exp $
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// $Id: cpu.h,v 1.16 2002-03-25 01:58:34 bdenney Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -548,9 +548,10 @@ public:
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virtual void trigger_irq (unsigned num, unsigned from);
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virtual void untrigger_irq (unsigned num, unsigned from);
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virtual Bit32u get_delivery_bitmask (Bit8u dest, Bit8u dest_mode);
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Boolean deliver (Bit8u destination, Bit8u dest_mode, Bit8u delivery_mode, Bit8u vector, Bit8u polarity, Bit8u trig_mode);
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virtual Boolean deliver (Bit8u destination, Bit8u dest_mode, Bit8u delivery_mode, Bit8u vector, Bit8u polarity, Bit8u trig_mode);
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virtual Boolean match_logical_addr (Bit8u address);
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virtual bx_apic_type_t get_type ();
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virtual void set_arb_id (int newid); // only implemented on local apics
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};
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class bx_local_apic_c : public bx_generic_apic_c {
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@ -612,10 +613,12 @@ public:
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virtual Boolean is_local_apic () { return true; }
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virtual bx_apic_type_t get_type () { return APIC_TYPE_LOCAL_APIC; }
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virtual Bit32u get_delivery_bitmask (Bit8u dest, Bit8u dest_mode);
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virtual Boolean deliver (Bit8u destination, Bit8u dest_mode, Bit8u delivery_mode, Bit8u vector, Bit8u polarity, Bit8u trig_mode);
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Bit8u get_ppr ();
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Bit8u get_apr ();
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void periodic (Bit32u usec_delta);
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void set_divide_configuration (Bit32u value);
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virtual void set_arb_id (int newid);
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};
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#define APIC_MAX_ID 16
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@ -1,151 +0,0 @@
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? cpu/Makefile
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? cpu/stSVOcJq
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? cpu/apic-works.cc
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Index: cpu/apic.cc
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===================================================================
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RCS file: /cvsroot/bochs/bochs/cpu/apic.cc,v
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retrieving revision 1.8
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diff -u -r1.8 apic.cc
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--- cpu/apic.cc 3 Oct 2001 13:10:37 -0000 1.8
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+++ cpu/apic.cc 24 Mar 2002 01:14:58 -0000
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@@ -22,6 +22,13 @@
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{
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}
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+void
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+bx_generic_apic_c::set_arb_id (int new_arb_id)
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+{
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+ // politely ignore it. This gets sent to every APIC, regardless of its
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+ // type.
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+}
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+
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// init is called during RESET and when an INIT message is delivered.
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void bx_generic_apic_c::init ()
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{
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@@ -160,8 +167,7 @@
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Bit32u deliver_bitmask = get_delivery_bitmask (dest, dest_mode);
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// mask must include ONLY local APICs, or we will have problems.
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if (!deliver_bitmask) {
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- if (bx_dbg.apic)
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- BX_INFO(("deliver failed: no APICs in destination bitmask"));
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+ BX_PANIC(("deliver failed for vector %02x: no APICs in destination bitmask", vector));
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return false;
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}
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switch (delivery_mode) {
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@@ -185,6 +191,10 @@
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break;
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case 5: // INIT
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{
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+ // NOTE: special behavior of local apics is handled in
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+ // bx_local_apic_c::deliver.
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+
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+ // normal INIT. initialize the local apics in the delivery mask.
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for (int bit=0; bit<APIC_MAX_ID; bit++) {
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if (deliver_bitmask & (1<<bit))
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apic_index[bit]->init ();
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@@ -221,6 +231,33 @@
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return true;
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}
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+Boolean
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+bx_local_apic_c::deliver (Bit8u dest, Bit8u dest_mode, Bit8u delivery_mode, Bit8u vector, Bit8u polarity, Bit8u trig_mode)
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+{
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+ // In this function, implement only the behavior that is specific to
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+ // the local apic. For general behavior of all apics, just send it to
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+ // the base class.
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+ if (delivery_mode == 5)
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+ {
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+ int trig_mode = (icr_low >> 15) & 1;
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+ int level = (icr_low >> 14) & 1;
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+ if (level == 0 && trig_mode == 1) {
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+ // special mode in local apic. See "INIT Level Deassert" in the
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+ // Intel Soft. Devel. Guide Vol 3, page 7-34. This magic code
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+ // causes all APICs (regardless of dest address) to set their
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+ // arbitration ID to their APIC ID.
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+ BX_INFO (("INIT with Level&Deassert: synchronize arbitration IDs"));
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+ for (int bit=0; bit<APIC_MAX_ID; bit++) {
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+ if (apic_index[bit])
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+ apic_index[bit]->set_arb_id (apic_index[bit]->get_id ());
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+ }
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+ return true;
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+ }
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+ }
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+ // not any special case behavior, just use generic apic code.
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+ return bx_generic_apic_c::deliver (dest, dest_mode, delivery_mode, vector, polarity, trig_mode);
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+}
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+
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bx_local_apic_c::bx_local_apic_c(BX_CPU_C *mycpu)
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: bx_generic_apic_c ()
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{
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@@ -230,6 +267,13 @@
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}
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void
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+bx_local_apic_c::set_arb_id (int new_arb_id)
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+{
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+ BX_DEBUG (("set arbitration ID to %d", new_arb_id));
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+ arb_id = new_arb_id;
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+}
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+
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+void
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bx_local_apic_c::hwreset ()
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{
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/* same as INIT but also sets arbitration ID and APIC ID */
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@@ -338,9 +382,11 @@
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break;
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case 0xd0: // logical destination
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log_dest = (*data >> 24) & 0xff;
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+ BX_DEBUG (("set logical destiation to %02x", log_dest));
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break;
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case 0xe0: // destination format
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dest_format = (*data >> 28) & 0xf;
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+ BX_DEBUG (("set destination format to %02x", dest_format));
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break;
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case 0xf0: // spurious interrupt vector
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spurious_vec = (spurious_vec & 0x0f) | (*data & 0x3f0);
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@@ -653,11 +698,9 @@
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Bit8u bx_local_apic_c::get_apr ()
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{
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- if (bx_dbg.apic)
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- BX_INFO(("WARNING: Local APIC Arbitration Priority not implemented, returning 0"));
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- // should look at TPR, vector of highest priority isr, etc.
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- return 0;
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+ return arb_id;
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}
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+
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void
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Index: cpu/cpu.h
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===================================================================
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RCS file: /cvsroot/bochs/bochs/cpu/cpu.h,v
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retrieving revision 1.15
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diff -u -r1.15 cpu.h
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--- cpu/cpu.h 3 Oct 2001 19:53:48 -0000 1.15
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+++ cpu/cpu.h 24 Mar 2002 01:15:01 -0000
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@@ -548,9 +548,10 @@
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virtual void trigger_irq (unsigned num, unsigned from);
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virtual void untrigger_irq (unsigned num, unsigned from);
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virtual Bit32u get_delivery_bitmask (Bit8u dest, Bit8u dest_mode);
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- Boolean deliver (Bit8u destination, Bit8u dest_mode, Bit8u delivery_mode, Bit8u vector, Bit8u polarity, Bit8u trig_mode);
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+ virtual Boolean deliver (Bit8u destination, Bit8u dest_mode, Bit8u delivery_mode, Bit8u vector, Bit8u polarity, Bit8u trig_mode);
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virtual Boolean match_logical_addr (Bit8u address);
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virtual bx_apic_type_t get_type ();
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+ virtual void set_arb_id (int newid); // only implemented on local apics
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};
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class bx_local_apic_c : public bx_generic_apic_c {
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@@ -612,10 +613,12 @@
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virtual Boolean is_local_apic () { return true; }
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virtual bx_apic_type_t get_type () { return APIC_TYPE_LOCAL_APIC; }
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virtual Bit32u get_delivery_bitmask (Bit8u dest, Bit8u dest_mode);
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+ virtual Boolean deliver (Bit8u destination, Bit8u dest_mode, Bit8u delivery_mode, Bit8u vector, Bit8u polarity, Bit8u trig_mode);
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Bit8u get_ppr ();
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Bit8u get_apr ();
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void periodic (Bit32u usec_delta);
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void set_divide_configuration (Bit32u value);
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+ virtual void set_arb_id (int newid);
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};
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#define APIC_MAX_ID 16
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