Added a RPN directory for the cache to help make invalidates
faster. Hopefully this won't slow things down too much. config.h.in cpu/cpu.cc cpu/cpu.h memory/memory.cc
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@ -553,6 +553,8 @@ typedef unsigned int Boolean;
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// The number of entries. MUST be a power of 2
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#define BX_FDCACHE_SIZE 0x0800
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#define BX_FDCACHE_MASK (BX_FDCACHE_SIZE-1)
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#define BX_FDCACHE_RPN_SIZE (0x0080)
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#define BX_FDCACHE_RPN_MASK (BX_FDCACHE_RPN_SIZE-1)
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#endif // BX_FETCHDECODE_CACHE
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#define BX_SUPPORT_FPU 0
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: cpu.cc,v 1.29 2002-06-03 22:39:10 yakovlev Exp $
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// $Id: cpu.cc,v 1.30 2002-06-05 03:59:31 yakovlev Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -250,9 +250,22 @@ async_events_processed:
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// Not storing such instructions in the cache is probably the
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// easiest way to handle them
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if (ret) {
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Bit32u rpn,rpn_sel,old_rpn;
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BX_CPU_THIS_PTR fdcache_ip[bx_fdcache_sel] = bx_fdcache_ip;
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BX_CPU_THIS_PTR fdcache_is32[bx_fdcache_sel] = is_32;
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new_phy_addr += i->ilen;
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rpn=bx_fdcache_ip>>12;
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rpn_sel=rpn & BX_FDCACHE_RPN_MASK;
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old_rpn=BX_CPU_THIS_PTR fdcache_rpn[rpn_sel];
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if((old_rpn != rpn) && (old_rpn != 0xFFFFFFFF)) {
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int n;
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for(n=0;n<BX_FDCACHE_SIZE;n++) {
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if(((BX_CPU_THIS_PTR fdcache_ip[n])>>12) == old_rpn) {
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BX_CPU_THIS_PTR fdcache_ip[n] = 0xFFFFFFFF;
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}
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}
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BX_CPU_THIS_PTR fdcache_rpn[rpn_sel] = rpn;
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}
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} else {
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// Invalidate cache!
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BX_CPU_THIS_PTR fdcache_ip[bx_fdcache_sel] = 0xFFFFFFFF;
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: cpu.h,v 1.20 2002-06-03 22:39:10 yakovlev Exp $
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// $Id: cpu.h,v 1.21 2002-06-05 03:59:31 yakovlev Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -1588,6 +1588,7 @@ public: // for now...
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// NOTE: This struct should really be aligned!
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BxInstruction_t fdcache_i[BX_FDCACHE_SIZE]; // stores decoded instruction
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Boolean fdcache_is32[BX_FDCACHE_SIZE];
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Bit32u fdcache_rpn[BX_FDCACHE_RPN_SIZE];
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#endif // #if BX_FETCHDECODE_CACHE
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};
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@ -1,5 +1,5 @@
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/////////////////////////////////////////////////////////////////////////
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// $Id: memory.cc,v 1.12 2002-06-03 22:39:11 yakovlev Exp $
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// $Id: memory.cc,v 1.13 2002-06-05 03:59:31 yakovlev Exp $
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/////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2001 MandrakeSoft S.A.
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@ -61,13 +61,30 @@ BX_MEM_C::write_physical(BX_CPU_C *cpu, Bit32u addr, unsigned len, void *data)
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// before the write because there COULD be programs which use
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// jump-in-the-middle-of-an-instruction schemes (esp. copyprotection
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// schemes)
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unsigned long bx_fdcache_idx = addr - 15;
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for (int count = 15+len; count > 0; --count) {
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if (cpu->fdcache_ip[bx_fdcache_idx & BX_FDCACHE_MASK] == bx_fdcache_idx) {
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cpu->fdcache_ip[bx_fdcache_idx & BX_FDCACHE_MASK] = 0xFFFFFFFF;
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Bit32u rpn_start = addr >> 12;
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Bit32u rpn_end = (addr+len-1) >> 12;
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Bit32u rpn = rpn_start;
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for(;rpn<=rpn_end;rpn++) {
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Bit32u rpn_sel = rpn & BX_FDCACHE_RPN_MASK;
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Bit32u old_rpn = cpu->fdcache_rpn[rpn_sel];
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if(rpn==old_rpn) {
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Bit32u n;
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for(n=0;n<BX_FDCACHE_SIZE;n++) {
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if(((BX_CPU_THIS_PTR fdcache_ip[n])>>12) == old_rpn) {
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BX_CPU_THIS_PTR fdcache_ip[n] = 0xFFFFFFFF;
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}
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}
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cpu->fdcache_rpn[rpn_sel] = 0xFFFFFFFF;
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}
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++bx_fdcache_idx;
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}
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//unsigned long bx_fdcache_idx = addr - 15;
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//for (int count = 15+len; count > 0; --count) {
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// if (cpu->fdcache_ip[bx_fdcache_idx & BX_FDCACHE_MASK] == bx_fdcache_idx) {
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// cpu->fdcache_ip[bx_fdcache_idx & BX_FDCACHE_MASK] = 0xFFFFFFFF;
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// }
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// ++bx_fdcache_idx;
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//}
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#endif // #if BX_FETCHDECODE_CACHE
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#if BX_DEBUGGER
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