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Added a linked list to further speed up icache invalidates.

Browse Source 
These should be pretty snappy now.  It's time to generate
some actual statistics.

 Modified Files:
 	cpu/cpu.cc cpu/cpu.h cpu/init.cc memory/memory.cc
This commit is contained in:
Gregory Alexander 2002-06-05 21:51:30 +00:00
parent c41505e342
commit 1be5b1d46c
4 changed files with 55 additions and 18 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

29
bochs/cpu/cpu.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: cpu.cc,v 1.30 2002-06-05 03:59:31 yakovlev Exp $
// $Id: cpu.cc,v 1.31 2002-06-05 21:51:30 yakovlev Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -251,6 +251,20 @@ async_events_processed:
// easiest way to handle them
if (ret) {
Bit32u rpn,rpn_sel,old_rpn;
if(BX_CPU_THIS_PTR fdcache_ip[bx_fdcache_sel] != 0xFFFFFFFF) {
Bit32u next_ptr=BX_CPU_THIS_PTR fdcache_rpn_list[bx_fdcache_sel].next;
Bit32u prev_ptr=BX_CPU_THIS_PTR fdcache_rpn_list[bx_fdcache_sel].prev;
if(next_ptr != 0xFFFFFFFF) {
BX_CPU_THIS_PTR fdcache_rpn_list[next_ptr].prev=prev_ptr;
}
if(prev_ptr != 0xFFFFFFFF) {
BX_CPU_THIS_PTR fdcache_rpn_list[prev_ptr].next=next_ptr;
} else {
Bit32u temp_rpn_sel = ((BX_CPU_THIS_PTR fdcache_ip[bx_fdcache_sel])>>12) & BX_FDCACHE_RPN_MASK;
BX_CPU_THIS_PTR fdcache_rpn_start[temp_rpn_sel] = next_ptr;
}
}
BX_CPU_THIS_PTR fdcache_rpn_list[bx_fdcache_sel].prev = 0xFFFFFFFF;
BX_CPU_THIS_PTR fdcache_ip[bx_fdcache_sel] = bx_fdcache_ip;
BX_CPU_THIS_PTR fdcache_is32[bx_fdcache_sel] = is_32;
new_phy_addr += i->ilen;
@ -258,13 +272,16 @@ async_events_processed:
rpn_sel=rpn & BX_FDCACHE_RPN_MASK;
old_rpn=BX_CPU_THIS_PTR fdcache_rpn[rpn_sel];
if((old_rpn != rpn) && (old_rpn != 0xFFFFFFFF)) {
int n;
for(n=0;n<BX_FDCACHE_SIZE;n++) {
if(((BX_CPU_THIS_PTR fdcache_ip[n])>>12) == old_rpn) {
BX_CPU_THIS_PTR fdcache_ip[n] = 0xFFFFFFFF;
}
Bit32u index = BX_CPU_THIS_PTR fdcache_rpn_start[rpn_sel];
for(;index!=0xFFFFFFFF;index=BX_CPU_THIS_PTR fdcache_rpn_list[index].next) {
BX_CPU_THIS_PTR fdcache_ip[index] = 0xFFFFFFFF;
}
BX_CPU_THIS_PTR fdcache_rpn[rpn_sel] = rpn;
BX_CPU_THIS_PTR fdcache_rpn_start[rpn_sel] = bx_fdcache_sel;
BX_CPU_THIS_PTR fdcache_rpn_list[bx_fdcache_sel].next=0xFFFFFFFF;
} else {
Bit32u index = BX_CPU_THIS_PTR fdcache_rpn_start[rpn_sel];
BX_CPU_THIS_PTR fdcache_rpn_list[bx_fdcache_sel].next=index;
}
} else {
// Invalidate cache!

16
bochs/cpu/cpu.h
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: cpu.h,v 1.21 2002-06-05 03:59:31 yakovlev Exp $
// $Id: cpu.h,v 1.22 2002-06-05 21:51:30 yakovlev Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -1587,10 +1587,18 @@ public: // for now...
Bit32u fdcache_ip[BX_FDCACHE_SIZE]; // will store operation's IP
// NOTE: This struct should really be aligned!
BxInstruction_t fdcache_i[BX_FDCACHE_SIZE]; // stores decoded instruction
Boolean fdcache_is32[BX_FDCACHE_SIZE];
Bit32u fdcache_rpn[BX_FDCACHE_RPN_SIZE];
Boolean fdcache_is32[BX_FDCACHE_SIZE]; //32 or 16-bit mode?
struct list_node{
Bit32u next;
Bit32u prev;
};
Bit32u fdcache_rpn[BX_FDCACHE_RPN_SIZE]; //rpn cache used for invalidates.
list_node fdcache_rpn_list[BX_FDCACHE_SIZE]; //linked list of entries with the same rpn.
Bit32u fdcache_rpn_start[BX_FDCACHE_RPN_SIZE]; //start of rpn linked lists.
#endif // #if BX_FETCHDECODE_CACHE
};

17
bochs/cpu/init.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: init.cc,v 1.15 2002-03-27 16:04:05 bdenney Exp $
// $Id: init.cc,v 1.16 2002-06-05 21:51:30 yakovlev Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -50,7 +50,7 @@ BX_CPU_C::BX_CPU_C()
void BX_CPU_C::init(BX_MEM_C *addrspace)
{
BX_DEBUG(( "Init $Id: init.cc,v 1.15 2002-03-27 16:04:05 bdenney Exp $"));
BX_DEBUG(( "Init $Id: init.cc,v 1.16 2002-06-05 21:51:30 yakovlev Exp $"));
// BX_CPU_C constructor
BX_CPU_THIS_PTR set_INTR (0);
#if BX_SUPPORT_APIC
@ -186,6 +186,19 @@ void BX_CPU_C::init(BX_MEM_C *addrspace)
DTDirBrHandler = (BxDTShim_t) DTASDirBrHandler;
#endif
#if BX_FETCHDECODE_CACHE
{
int n;
for(n=0;n<BX_FDCACHE_SIZE;n++) {
fdcache_ip[n]=0xFFFFFFFF;
}
for(n=0;n<BX_FDCACHE_RPN_SIZE;n++) {
fdcache_rpn[n]=0xFFFFFFFF;
fdcache_rpn_start[n]=0xFFFFFFFF;
}
}
#endif
mem = addrspace;
sprintf (name, "CPU %p", this);

11
bochs/memory/memory.cc
View File

@ -1,5 +1,5 @@
/////////////////////////////////////////////////////////////////////////
// $Id: memory.cc,v 1.13 2002-06-05 03:59:31 yakovlev Exp $
// $Id: memory.cc,v 1.14 2002-06-05 21:51:30 yakovlev Exp $
/////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2001 MandrakeSoft S.A.
@ -68,13 +68,12 @@ BX_MEM_C::write_physical(BX_CPU_C *cpu, Bit32u addr, unsigned len, void *data)
Bit32u rpn_sel = rpn & BX_FDCACHE_RPN_MASK;
Bit32u old_rpn = cpu->fdcache_rpn[rpn_sel];
if(rpn==old_rpn) {
Bit32u n;
for(n=0;n<BX_FDCACHE_SIZE;n++) {
if(((BX_CPU_THIS_PTR fdcache_ip[n])>>12) == old_rpn) {
BX_CPU_THIS_PTR fdcache_ip[n] = 0xFFFFFFFF;
}
Bit32u index = cpu->fdcache_rpn_start[rpn_sel];
for(;index!=0xFFFFFFFF;index=cpu->fdcache_rpn_list[index].next) {
cpu->fdcache_ip[index] = 0xFFFFFFFF;
}
cpu->fdcache_rpn[rpn_sel] = 0xFFFFFFFF;
cpu->fdcache_rpn_start[rpn_sel] = 0xFFFFFFFF;
}
}