Stanislav Shwartsman
399168e37d
small cleanup
2012-08-19 18:44:08 +00:00
Stanislav Shwartsman
cc694377b9
Standartization of Bochs instruction handlers.
...
Bochs instruction emulation handlers won't refer to direct fields of instructions like MODRM.NNN or MODRM.RM anymore.
Use generic source/destination indications like SRC1, SRC2 and DST.
All handlers are modified to support new notation. In addition fetchDecode module was modified to assign sources to instructions properly.
Immediate benefits:
- Removal of several duplicated handlers (FMA3 duplicated with FMA4 is a trivial example)
- Simpler to understand fetch-decode code
Future benefits:
- Integration of disassembler into Bochs CPU module, ability to disasm bx_instruction_c instance (planned)
Huge patch. Almost all source files wre modified.
2012-08-05 13:52:40 +00:00
Stanislav Shwartsman
b5c5082ff2
Completely remove b1() field from bxInstruction structure and resuse it for AVX instructions flags.
...
the iaOpcode field has no masking anymore.
fixed bug during the code reorganization:
+ XOP: Fixed instructions with operands order depending on VEX.W (fixed VEX.W read from instruction object)
2012-05-11 06:35:16 +00:00
Stanislav Shwartsman
f01e5f3e11
removed b1() from shift methods in CPU - lead to removal of b1() field from bxInstruction_c
2012-05-08 16:42:15 +00:00
Stanislav Shwartsman
a68ad9a7f6
small code optimization
2012-04-06 09:41:58 +00:00
Stanislav Shwartsman
5cc04b9955
Implemented AMDs Buldozer XOP and TBM extensions.
...
XOP: few instructions are still missing, coming soon
BX_PANIC(("VPERMILPS_VpsHpsWpsVIbR: not implemented yet"));
BX_PANIC(("VPERMILPD_VpdHpdWpdVIbR: not implemented yet"));
BX_PANIC(("VPMADCSSWD_VdqHdqWdqVIbR: not implemented yet"));
BX_PANIC(("VPMADCSWD_VdqHdqWdqVIbR: not implemented yet"));
BX_PANIC(("VFRCZPS_VpsWpsR: not implemented yet"));
BX_PANIC(("VFRCZPD_VpdWpdR: not implemented yet"));
BX_PANIC(("VFRCZSS_VssWssR: not implemented yet"));
BX_PANIC(("VFRCZSD_VsdWsdR: not implemented yet"));
2011-10-19 20:54:04 +00:00
Stanislav Shwartsman
c6d07ae1b5
store modrm() for x87 in Ib() byte because x87 have no Ib()
2011-09-20 06:02:27 +00:00
Stanislav Shwartsman
f4dbaf1cd8
re-shuffle macros, no impact in general
2011-09-13 17:55:36 +00:00
Stanislav Shwartsman
96cedbc756
continue handlers-chaining optimization: update time once per trace and not for every instruction
2011-09-06 15:35:39 +00:00
Stanislav Shwartsman
c67338203c
small fixups, code cleanup and reorganization
2011-09-05 17:14:49 +00:00
Stanislav Shwartsman
239c5a449d
added 'locked' information to bxInstruction_c for instrumentation and other future use
2011-08-27 20:09:18 +00:00
Stanislav Shwartsman
371dc200fc
Remove the 'trace' debug feature fro the main stream (which now runs with handlers chaining) and this way reduce each handler size.
...
Another 3% speedup on WinXP boot on top of handlers chaining + reduction of Bochs binary size by 45K.
2011-08-21 17:04:21 +00:00
Stanislav Shwartsman
1e2e3c8b0e
forgot to merge file
2011-08-21 14:38:33 +00:00
Stanislav Shwartsman
13feb0772a
- 10% emulation speedup with handlers chaining optimization implemented. The
...
feature is enabled by default when configure with --enable-all-optimizations
option, to disable handlers chaining speedups configure with
--disable-handlers-chaining
2011-08-21 14:31:08 +00:00
Stanislav Shwartsman
f8e4e7f16b
clean up/fixed instrumentation examples + removed old 2-years old configure options check (deprecated)
2011-07-23 19:58:38 +00:00
Stanislav Shwartsman
002c86660a
reword all the CPU code in preparation for future CPU speedup implementation.
...
Bochs emulation can be another 10-15% faster using technique described in paper
"Fast Microcode Interpretation with Transactional Commit/Abort"
http://amas-bt.cs.virginia.edu/2011proceedings/amasbt2011-p3.pdf
2011-07-06 20:01:18 +00:00
Stanislav Shwartsman
31914e4a26
fixed compilation with avx off
2011-06-11 20:12:15 +00:00
Stanislav Shwartsman
d7f19bcfd4
optimize sse DAZ feature + optimization for AVX OFF
2011-06-11 12:22:54 +00:00
Volker Ruppert
c78026a9a2
- deleted executable properties from source files
2011-04-03 10:29:19 +00:00
Stanislav Shwartsman
4de76b0571
introduced victim cache for a trace cache structure.
...
Allows to significantly cut trace cache miss latenct and find data in victim cahe instead of redoding it
8 entries VC in parallel with direct map 64K entries
2011-03-25 23:06:34 +00:00
Stanislav Shwartsman
7ced718040
implemented AVX instructions support
...
many changes - some cleanup will follow
please report ay found bugs !
2011-03-19 20:09:34 +00:00
Stanislav Shwartsman
7d80a6ebe0
Adding Id and Rev property to all files
2011-02-24 21:54:04 +00:00
Stanislav Shwartsman
43600f3756
complete rework of SSE code
...
next step - split all SSE opcodes by ModC0
2010-12-22 21:16:02 +00:00
Stanislav Shwartsman
d60b7c0919
rename accessor for opcodeReg() in instruction
2010-12-06 21:45:56 +00:00
Stanislav Shwartsman
49c85b07f6
Fixed address size wrap
2010-10-18 22:19:45 +00:00
Stanislav Shwartsman
75f2ae9c18
fetchdecode simplification rework
2010-09-25 09:55:40 +00:00
Stanislav Shwartsman
369aba757d
style change
2010-09-23 20:38:02 +00:00
Stanislav Shwartsman
d47c84320a
swap bits in instr
2010-06-29 19:38:56 +00:00
Stanislav Shwartsman
70dc124b3a
1st step of moving CPU options to runtime
2010-02-24 19:27:51 +00:00
Stanislav Shwartsman
cf6a4f5417
added ia_opcode into bxInstruction class
2010-01-09 15:11:32 +00:00
Stanislav Shwartsman
30c9eef6f9
small optimization
2009-12-21 13:38:06 +00:00
Stanislav Shwartsman
868e716411
instrumentation fixes + new example
2009-11-04 15:48:28 +00:00
Stanislav Shwartsman
d16afb6d47
ia_opcodes instrumentation
2009-10-31 20:02:44 +00:00
Stanislav Shwartsman
7254ea36a1
copyright fixes + small optimization
2009-10-14 20:45:29 +00:00
Stanislav Shwartsman
9929e6ed78
- updated FSF address
2009-01-16 18:18:59 +00:00
Stanislav Shwartsman
da511513b3
make displ field of instruction signed
2009-01-12 20:14:37 +00:00
Stanislav Shwartsman
5261e6f73a
Optimize prefetch() method
2008-10-10 20:49:16 +00:00
Stanislav Shwartsman
b03f940807
optimize seg_override decoding
2008-09-08 16:15:59 +00:00
Stanislav Shwartsman
0d90ab0478
Completely new way to handle LD+OP cases - allows to significantly reduce number of BX_CPU_C methods
2008-08-09 21:05:07 +00:00
Stanislav Shwartsman
24e0b53720
This more ellegant way to have debug info for BxError and not lose any performace
2008-08-09 19:18:09 +00:00
Stanislav Shwartsman
5dd02b26e3
Make even more efficient RmAddr calculation - good optimizing compiler could make more efficient code than it was before
2008-08-08 09:22:49 +00:00
Stanislav Shwartsman
0127415ba6
Clear some duplicated arithmetic opcodes - difference only in operands order
2008-07-13 09:59:59 +00:00
Stanislav Shwartsman
65275ffc02
Remove repeat speedups from 16-bit address size methods - they not gonna speed up anyway because of segment limit issue
2008-06-25 10:34:21 +00:00
Stanislav Shwartsman
e4b41764d0
Enabled #AC exception, fixed PANIC message
2008-04-14 21:48:37 +00:00
Stanislav Shwartsman
16bf4402b0
Remove wrongly committed code
2008-04-05 17:57:21 +00:00
Stanislav Shwartsman
5826e2843a
Inline pop/push functions
...
Store only single byte of opcode in b1() - speedup shift instructions
Code cleanups
2008-04-05 17:51:55 +00:00
Stanislav Shwartsman
255d512e29
Organize bxInstruction fields differently
2008-03-31 17:33:34 +00:00
Stanislav Shwartsman
167c7075fb
Use fastcall gcc attribute for all cpu execution functions - this pure "compiler helper" optimization brings additional 2% speedup to Bochs code
2008-03-22 21:29:41 +00:00
Stanislav Shwartsman
0d26c2359b
Reorganize fields in metaInfo3
2008-03-03 16:45:15 +00:00
Stanislav Shwartsman
cdcd7522aa
Added RIP to the GPR register file as lst register
...
This allowed to optimize (read - remove) two more BxResolve methods in 64-bit mode
+ Some white space cleanup
2008-02-15 19:03:54 +00:00
