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65 Commits

Author SHA1 Message Date
Stanislav Shwartsman
002c86660a reword all the CPU code in preparation for future CPU speedup implementation. 
Bochs emulation can be another 10-15% faster using technique described in paper
"Fast Microcode Interpretation with Transactional Commit/Abort"
http://amas-bt.cs.virginia.edu/2011proceedings/amasbt2011-p3.pdf
 2011-07-06 20:01:18 +00:00
Stanislav Shwartsman
a02d8cfe67 cleanups, simplications, copyright updates 2011-04-23 20:39:27 +00:00
Stanislav Shwartsman
7d80a6ebe0 Adding Id and Rev property to all files 2011-02-24 21:54:04 +00:00
Stanislav Shwartsman
5915d92775 very small optimizations + indent 2011-01-25 20:59:26 +00:00
Stanislav Shwartsman
49c85b07f6 Fixed address size wrap 2010-10-18 22:19:45 +00:00
Stanislav Shwartsman
cffe32dd2c remove unused param from exception() call 2010-03-14 15:51:27 +00:00
Stanislav Shwartsman
bd60e0264c change Copyright to Bochs Project 2009-12-04 16:53:12 +00:00
Stanislav Shwartsman
9929e6ed78 - updated FSF address 2009-01-16 18:18:59 +00:00
Stanislav Shwartsman
f6531f6df9 -Fixed alignment chek to be on laddr instead of eaddr for CMPXCHG16B 2008-09-05 21:43:12 +00:00
Stanislav Shwartsman
0d90ab0478 Completely new way to handle LD+OP cases - allows to significantly reduce number of BX_CPU_C methods 2008-08-09 21:05:07 +00:00
Stanislav Shwartsman
5dd02b26e3 Make even more efficient RmAddr calculation - good optimizing compiler could make more efficient code than it was before 2008-08-08 09:22:49 +00:00
Stanislav Shwartsman
0127415ba6 Clear some duplicated arithmetic opcodes - difference only in operands order 2008-07-13 09:59:59 +00:00
Stanislav Shwartsman
ec1ff39a5f Splitted memory access methods for 32 and 64-bit code. 
The 64-bit code got >10% speedup, the 32-bit code also got about 2% because laddr cacluation optimization
 2008-05-10 18:10:53 +00:00
Stanislav Shwartsman
eedf26627f Fixes in CMPXHG8B instruction - slight speedup and correct #AC check 2008-05-05 21:48:07 +00:00
Stanislav Shwartsman
2aaafa76a2 Reorganize fetchdecode tables with another level of redirection - a leap toward future improvements 
Currently no speedup and no slowdown - about the same results on my Bochs benchmarking
A lot of code reorganization in fetchdecode
 2008-04-04 22:39:45 +00:00
Stanislav Shwartsman
167c7075fb Use fastcall gcc attribute for all cpu execution functions - this pure "compiler helper" optimization brings additional 2% speedup to Bochs code 2008-03-22 21:29:41 +00:00
Stanislav Shwartsman
37fbb82baa Cleanups. Move bxInstruction_c definition to separate file instr.h 2008-01-29 17:13:10 +00:00
Stanislav Shwartsman
d9984bb3a1 Eliminate BxResolve call from the heart of cpu loop and move into instructions that really require this calculation. Yes, it blows the code of EVERY CPU method but it has >15% speedup ! 2008-01-10 19:37:56 +00:00
Stanislav Shwartsman
d891f0d8ec Fixed more VC2008 warnings - hopefully last ones 2007-12-30 17:53:12 +00:00
Stanislav Shwartsman
838fb2a048 Fixing V2008 warnings - they found a bug in sse_pfp.cc ! 2007-12-23 17:21:28 +00:00
Stanislav Shwartsman
5d4e32b8da Avoid pointer params for every read_virtual_* except 16-byte SSE and 10-byte x87 reads 2007-12-20 20:58:38 +00:00
Stanislav Shwartsman
b516589e4e Changes in write_virtual_* and pop_* functions -> avoid moving parameteres by pointer 2007-12-20 18:29:42 +00:00
Stanislav Shwartsman
6ac7fa7106 MMX - modify masked write to RMW - faster execution 
CMPXCHG8B/16B - fixed possible problem. Instruction not allowed to fault after some part of it written to the memory
 2007-12-19 23:21:11 +00:00
Stanislav Shwartsman
88899cf617 Changes for lazy flags handling -> 1st stap in transition to new lazy flags handling by Darek Mihocka (www.emulators.com) 2007-12-04 19:27:23 +00:00
Stanislav Shwartsman
dbfa7a51e9 Do not affect CPU state if any exception occured - in this case do not write to MEM and flags 2007-12-03 20:48:02 +00:00
Stanislav Shwartsman
0a1063ad77 Split GvEv opcode groups 2007-11-21 22:36:02 +00:00
Stanislav Shwartsman
1af7010e50 Optimized memory access for 64-bit mode 
Starting convergence to new lazy flags scheme by Darek Mihocka (www.emulators.com). The new flags code is still being validated and perfected but I try to minimize the diff between 2 versionS
 2007-11-20 17:15:33 +00:00
Stanislav Shwartsman
cdc9a09090 Split more opcodes 2007-11-18 18:24:46 +00:00
Stanislav Shwartsman
83f6eb6945 Changes copyrights for the files I wrote :) 
Also split EqId G1 group for x86-64
 2007-11-17 23:28:33 +00:00
Stanislav Shwartsman
5ec15df46d Split more opcodes EbIb opcodes 2007-11-17 18:08:46 +00:00
Stanislav Shwartsman
d5a58e1df2 Split more opcodes - G3 group 2007-11-17 16:20:37 +00:00
Stanislav Shwartsman
d9e58bd598 split11b on opcode tables level - split almost eevery splittable instruction 
will be continued
 2007-11-17 12:44:10 +00:00
Stanislav Shwartsman
494189e822 Small optimization for ADD lazy flags calculations. 
Because most likely flags are not needed after ADD instruction - it is better to store less data for lazy flags and reconstruct it if needed
 2007-11-06 08:39:25 +00:00
Stanislav Shwartsman
68ef783632 reduce amount of used temp variables 2007-10-21 23:35:11 +00:00
Stanislav Shwartsman
42fdd8a3a1 During Bochs benchmarking I figured out that hostasm actually slow down the emulation ... so remove this ugly code which also doesn't help :) 
speedup flags update for some instructions - idea was taken from DT patch by h.johansson
 2007-10-21 22:07:33 +00:00
Stanislav Shwartsman
6c3420a18b Add debug prints before any #GP excepion which only possible to be generated 2006-06-09 22:29:07 +00:00
Stanislav Shwartsman
5c3fba4399 Support access to SMRAM in memory object 
Cleanup in CPU code
 2006-03-26 18:58:01 +00:00
Stanislav Shwartsman
7b6c2587a9 Now devices could be compiled separatelly from CPU 
Averything that required cpu.h include now has it explicitly and there are a lot of files not dependant by CPU at all which will compile a lot faster now ...
 2006-03-06 22:03:16 +00:00
Stanislav Shwartsman
51e03f071d Fixed XLAT instruction for x86-64 
Small optimization for lazy flags for ADD/ADC/SUB/SBB instructions
Enable RETF64 for same privelege level return
 2005-07-21 01:59:05 +00:00
Stanislav Shwartsman
663f7d5ef3 CMPXCHG16B instruction implemented 2005-05-19 20:25:16 +00:00
Stanislav Shwartsman
6fd9f82c35 Fixed typo in apic.cc 
Small speedup for arith64.cc (redundant modC0() call ellimination)
Cleanup
 2005-04-02 18:49:44 +00:00
Stanislav Shwartsman
1f5aa2696f Fix compilation errors ;) 2004-08-18 21:29:07 +00:00
Stanislav Shwartsman
b370a417a4 Optimize lazy-flags for ADC and SBB instructions 2004-08-18 20:47:35 +00:00
Stanislav Shwartsman
571617bcda Optimize lazy flags for NEG instruction 
Removed duplicate flags modification in CMPXCHG instruction
 2004-08-17 17:34:47 +00:00
Stanislav Shwartsman
231cd533c6 1. Update changes 
2. Fix lazy_flags duplicate instruction patterns
 2004-08-16 20:18:01 +00:00
Stanislav Shwartsman
12b68ede54 XADD and ADD instructions have same flags modification rules - remove redundant switch case 2004-08-14 20:44:48 +00:00
Stanislav Shwartsman
88a19a8594 Speedup lazy-flags for NEG instruction 2004-08-14 20:09:22 +00:00
Stanislav Shwartsman
1b7b791493 Speedup lazy-flags for INC and DEC instructions 2004-08-14 20:00:24 +00:00
Stanislav Shwartsman
a1f830d429 Implemented FAST lazy flags version for logic instructions. 
Small code cleanup/simplification for others.
 2004-08-13 20:00:03 +00:00
Stanislav Shwartsman
8f0cf91fff This commit is the first commit in long series of changes the have several purposes: 
1. Review and commit patch

	[ 896733 ] Lazy flags, for more instructions, only 1 src op

   May be partially, but I hope to get all ideas from patch in

2. Get Bochs speedup after lazy flags optimization

3. Most important for me: improve correctness of emulation by handling several
   undocumented EFLAGS modifications. And finally pass

	UFLAGS - Undefined Flags Test v 3.0
	Copyright (C) Potemkin's Hackers Group (PHG) 1989,1995

   The test still fails on > 50% of its checks.
 2004-08-09 21:28:47 +00:00