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90e321469f
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1281 Commits

Author SHA1 Message Date
Stanislav Shwartsman
90e321469f Optimized IP-relative memory access 2008-01-10 21:32:12 +00:00
Stanislav Shwartsman
77b4b70b9b oops, revert incorrectly merged change 2008-01-10 20:32:23 +00:00
Stanislav Shwartsman
1f4608cd84 Fix for implemened 3dnow instuctions (most of them are not implemented) 2008-01-10 20:26:49 +00:00
Stanislav Shwartsman
d9984bb3a1 Eliminate BxResolve call from the heart of cpu loop and move into instructions that really require this calculation. Yes, it blows the code of EVERY CPU method but it has >15% speedup ! 2008-01-10 19:37:56 +00:00
Stanislav Shwartsman
e7a45770fd More optimization for short traces 2008-01-05 10:45:05 +00:00
Stanislav Shwartsman
a9e001bd30 Optimize short traces 2008-01-05 10:21:25 +00:00
Stanislav Shwartsman
f8320c4fe2 removed unused variable 2008-01-01 18:01:39 +00:00
Stanislav Shwartsman
eee1a9030d a bit simplify and optimize shift instructions 
print failed segment info in check_cs - more debug info
 2007-12-30 20:16:35 +00:00
Stanislav Shwartsman
d891f0d8ec Fixed more VC2008 warnings - hopefully last ones 2007-12-30 17:53:12 +00:00
Stanislav Shwartsman
79fc57dec8 Fixed more VCPP2008 warnings 2007-12-26 23:07:44 +00:00
Stanislav Shwartsman
fc159e3bcf small cleanup 2007-12-25 21:42:38 +00:00
Stanislav Shwartsman
38fb3d78be small cleanup in repeat code 2007-12-23 18:09:34 +00:00
Stanislav Shwartsman
085f408078 Fixed possible problem with repeat speedups in 64-bit mode. 
Also was pointed out by MSVCPP2008 warnings
 2007-12-23 17:46:44 +00:00
Stanislav Shwartsman
e4420d52c6 Emplement MASMOVDQU as RMW for efficiency (and correctness) 2007-12-23 17:39:10 +00:00
Stanislav Shwartsman
838fb2a048 Fixing V2008 warnings - they found a bug in sse_pfp.cc ! 2007-12-23 17:21:28 +00:00
Stanislav Shwartsman
948d85c24b Fixed MINGW compilation error 2007-12-22 22:02:08 +00:00
Stanislav Shwartsman
c3c9c40674 Move MaxFetch calculation into fetchdecode - simplify the logic 2007-12-22 17:17:40 +00:00
Stanislav Shwartsman
0e5859302b Avoid 64-bit calculations when checking remainingInPage bytes 2007-12-22 12:43:17 +00:00
Stanislav Shwartsman
cc4a068d7b VM8086 is always ON' 2007-12-21 21:14:48 +00:00
Stanislav Shwartsman
e9a148f9c4 lmost last instruction split -> CMOV in 16/32 bit modes 2007-12-21 18:24:19 +00:00
Stanislav Shwartsman
d830c301cf Fixed 64-bit versions of LOOP instructions, some cleanups 2007-12-21 17:30:49 +00:00
Stanislav Shwartsman
62c098f627 Introduce new icache hash function suggested by Darek Mihocka 
My studies show that in average new hash function of paddr + paddr>>4
suffers 5-10% less from aliasing in direct map cache array.
 2007-12-21 12:38:57 +00:00
Stanislav Shwartsman
a93b0afdbe Merge page split detection method suggested by Darek Mihocka 2007-12-21 10:33:39 +00:00
Stanislav Shwartsman
5d4e32b8da Avoid pointer params for every read_virtual_* except 16-byte SSE and 10-byte x87 reads 2007-12-20 20:58:38 +00:00
Stanislav Shwartsman
b516589e4e Changes in write_virtual_* and pop_* functions -> avoid moving parameteres by pointer 2007-12-20 18:29:42 +00:00
Stanislav Shwartsman
6ac7fa7106 MMX - modify masked write to RMW - faster execution 
CMPXCHG8B/16B - fixed possible problem. Instruction not allowed to fault after some part of it written to the memory
 2007-12-19 23:21:11 +00:00
Stanislav Shwartsman
c9932e97eb Fixes in resolve.cc -> reduce amount of resolve functions even more 2007-12-18 21:41:44 +00:00
Stanislav Shwartsman
d4ee2c0a59 cleanup 2007-12-18 21:08:55 +00:00
Stanislav Shwartsman
d032a30429 Fixed a lot of code duplication and possible bug with oncorrect implementation of repeat speedup in 64-bit guest 2007-12-17 21:13:55 +00:00
Stanislav Shwartsman
fe2e0525da More optimization for string instructions 2007-12-17 19:52:01 +00:00
Stanislav Shwartsman
0af87ab63b Split string instructions according to the address size - simpler and faster 2007-12-17 18:48:26 +00:00
Stanislav Shwartsman
6c8241da9a Added debug prints in case of exceptions 2007-12-16 21:46:39 +00:00
Stanislav Shwartsman
a545bf63ce push_64 and pop_64 could happen only in 64-bit mode 2007-12-16 21:40:44 +00:00
Stanislav Shwartsman
4f78ff2153 Code cleanup 2007-12-16 21:21:29 +00:00
Stanislav Shwartsman
46366b5064 Speedup simulation by eliminating CPL==3 check from read/write_virtual* functions 2007-12-16 21:03:46 +00:00
Stanislav Shwartsman
de5838ce80 cleanups and fixes for Immediate_IbIb of SSE4A 2007-12-16 20:47:10 +00:00
Stanislav Shwartsman
8b5eaa5820 Make functions inline 2007-12-16 20:37:59 +00:00
Stanislav Shwartsman
1e843cb462 Decode SSE4A 
Rework immediate bytes decoding to make it faster
 2007-12-15 17:42:24 +00:00
Stanislav Shwartsman
3a6d714398 Split for JMP_Ew/Ed opcodes from Grp5 2007-12-14 23:15:52 +00:00
Stanislav Shwartsman
fd73390ca5 Split 64-bit CMOVcc opcode 2007-12-14 22:41:43 +00:00
Stanislav Shwartsman
903f6dea35 Split setCC functions - makes code faster and simpler 2007-12-14 21:29:36 +00:00
Stanislav Shwartsman
d9a59c7a1f Added ability to merge traces cross JCC branch instructions 
Makes traces longer -> emulation faster in average
 2007-12-14 20:41:09 +00:00
Stanislav Shwartsman
db69a25c36 Trace cache instrumentation methods 
Next step will be tracing cross non-taken branches
 2007-12-14 11:27:44 +00:00
Stanislav Shwartsman
48d815427c According to AMD docs INVLD/WBINVLD instructions not required to flush TLBs 2007-12-14 10:15:12 +00:00
Stanislav Shwartsman
c3e5c71000 post exceptions and print BX_ERROR messages in tasking.cc 2007-12-13 23:17:50 +00:00
Stanislav Shwartsman
85d10e4f72 Added MWAIT callback 2007-12-13 21:41:32 +00:00
Stanislav Shwartsman
f145f4c847 Unify BX_INSTR_MEM_READ and BX_INSTR_MEM_WRITE callbacks to single callback BX_INSTR_MEM_ACCESS 
Enable the callback with guest-to-host TLB enabled
Update instrumentation docs
 2007-12-13 21:30:05 +00:00
Stanislav Shwartsman
05c7a1e61b Fixed problem with trace cache enabled 
String instructions might confise trace cache by finishing instruction execution method without actually completing an instruction (and advancing eip)
 2007-12-13 18:42:31 +00:00
Stanislav Shwartsman
05a5923971 Merged Bochs instrumentation patch by Lluis Vilanova 2007-12-13 17:16:21 +00:00
Stanislav Shwartsman
da19b9447a All Jq instructions in 64-bit mode have fixed 64-bit osize 2007-12-10 23:04:18 +00:00