finally the shutdown handling should be done exactly as in VmWare - the GUI should ask user if the CPU should reset and go to HLT/IF=0 if user choosed to stay in shutdown mode.
CPU configure option reset-on-triple-failt should be extended to shutdown-reset=0|1
small code cleanups and fixes
- Fixed critical bug in CPU code added with one of the prev commits
- Disasm support for SSE4
- Rename PNI->SSE3 everywhere in the code
- Correctly decode, disassemble and execute 'XCHG R8, rAX' x86-64 instruction
- Correctly decode, disassemble and execute multi-byte NOP 0F F1 opcode
- Fixed ENTER and LEAVE instructions in x86-64 mode
- Added ability to turn ON instruction trace, only GUI support is missed.
Instruction trace could be enabled if Bochs was compiled with disasm
- More changes Bit32u -> bx_phy_address
- Complete preliminary implementation of SMM in Bochs, SMI is still PANICs but if you press 'continue' everything should work OK
- Small code cleanup
- Update CHANGES and user docs
Averything that required cpu.h include now has it explicitly and there are a lot of files not dependant by CPU at all which will compile a lot faster now ...
I would like all next commits be aware of SMM mode.
It can't be implemented right now (too many questions w/o answers) but it will be done till next major release definitelly.
Setting the eip register still not available (deliberatelly).
I don't want to enable it util I find some easy interface to do it.
I don't want to allow setting of part of RIP register using 'set eip=<expr>' and leave the upper part unchanged ....
Remove unused test registres from debugger
Fix compilation error in cpu.h
Change trace-on/trace-off commands. Make one 'trace' command with usage of 'trace on/trace off'
Enable disasm by default - in adds some useful information to debug messages in log file
Remove defines for 8bit registers from cpu.h, the x86 arch defines not match defines used by set_reg and get_reg methods.
The Bochs anyway even doesn't compile if cosimulation configured enabled.
But in the same time the cosimulation code only disturbs to the future development of Bochs debugger, for example adding x86-64 functionality ...
For those of you who still may want to see the cosimulation code inside I put it in patch and upload it Bochs CVS patches folder. Read comments for the patch ! ----------------------------------------------------------------------
'set $eax = <value>' is stupid when you could do expr like 'set eax = ebx + 4'
2. cleanup and optimize Bochs debugger parsing, fixed several memory leaks
2. new command 'u|disasm|disassemble mode-switch' - switch between Intel and AT&T disasm syntax
3. new command 'u|disasm|disassemble size=n' should be used instead of old 'set $disassembler_size=n'
4. 'h' is a new alias for 'help' command
Fixed fetch mode mask initialization (bug report 1400027 Boundary instruction cache error for uninitialized memory)
For safety only - everytime when changing CS register update fetch mode mask.
Actually it need to be updated everytime when there is a chance for execute mode change or 16/32 bit mode change.
Change BxSupportPAE and BxSupportGlobalPages macros to Bochs style names
Set bx_cpu_id in BX_CPU_C constructor (safe way)
Backup cpu-level check for paging features at compile time (already checked in configure)
Some warnings and indent fixes
speed up get_segment_base method for x86-64 case
* Fully supports
* MMX/XMM/3DNOW instruction sets
* FPU instruction
* SSE3 extensions
currently only 16/32 bit mode bug anyway, it is much better that old one ;)
