Stanislav Shwartsman
0683b00535
implemented more avx-512 opcodes
2013-12-02 19:16:48 +00:00
Stanislav Shwartsman
79456eb7e1
Implemented VPCMP* AVX512 instructions
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Implemented VMOVNTPS/PD/DQ AVX512 instructions
Implemented VMOVNTDQA AVX512 instruction
Bugfixes for AVX-512
2013-12-02 18:05:18 +00:00
Stanislav Shwartsman
287523e19a
add dedicated 8bit low register accessor
2013-12-01 22:18:38 +00:00
Stanislav Shwartsman
4f158aef5f
Fixed 8-bit opmask read
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Added opmask printout for AVX dump in dbg_main.cc
2013-12-01 20:50:01 +00:00
Stanislav Shwartsman
c7b03eb00b
implement avx-512 vpabsd/q instructions
2013-12-01 20:10:39 +00:00
Stanislav Shwartsman
2b83146ae2
more avx-512 instructions implemented
2013-12-01 19:39:18 +00:00
Stanislav Shwartsman
fb2521a1fe
implemented avx-512 vsqrt instructions
2013-11-30 19:33:08 +00:00
Stanislav Shwartsman
11f082af82
Implemented VMOVDQU32/VMOVDQA32/VMOVDQU64/VMOVDQA64 AVX512 instructions
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Implemented VCOMISS/VCOMISD/VUCOMISS/VUCOMISD AVX512 instructions
Fix vector length values for AVX-512 (512-bit vector should have length 4)
support mis-alignment #GP exception for VMOVAPS/PD/DQA32/DQ64 AVX512 instructions
move AVX512 load/store and register move operations into dedicated file avx512_move.cc
2013-11-29 20:22:31 +00:00
Stanislav Shwartsman
031583dbd9
moved avx masked load/store operations to separate functions
2013-11-29 18:15:48 +00:00
Stanislav Shwartsman
21bb1363ac
avx512 move functions introduced
2013-11-29 11:10:34 +00:00
Stanislav Shwartsman
4680c22d0e
implemented avx-512 masked register moves
2013-11-28 20:58:31 +00:00
Stanislav Shwartsman
b7f950aa5c
more coding for avx512
2013-11-26 19:22:31 +00:00
Stanislav Shwartsman
1beeb33b51
implemented avx-512 fma instructions (in seperate file), fixes in avx-512 decoding tables
2013-11-25 20:42:24 +00:00
Stanislav Shwartsman
7f8429c643
fix code duplication in fetchdecode modules
2013-11-20 16:00:24 +00:00
Stanislav Shwartsman
940c2a1c8e
fixes for disasm
2013-10-15 17:19:18 +00:00
Stanislav Shwartsman
46e36b463b
size-optimization for SSE opcode tables
2013-10-10 20:21:15 +00:00
Stanislav Shwartsman
0b2e533a55
more avx512 instructions done
2013-10-09 19:45:36 +00:00
Stanislav Shwartsman
d6d1c707df
implemented set of integer avx512 instructions
2013-10-08 19:44:52 +00:00
Stanislav Shwartsman
09254eb474
avx512 implementation fixes and next steps
2013-10-08 18:31:18 +00:00
Stanislav Shwartsman
cb0eee9456
disasm fixes
2013-10-07 19:02:53 +00:00
Stanislav Shwartsman
85b0402668
fixes for disasm
2013-10-02 19:23:34 +00:00
Stanislav Shwartsman
e592f81209
updates to internal disasm
2013-10-01 18:47:55 +00:00
Stanislav Shwartsman
fd383435f0
- Initial code for bx_Instruction_c disassembler which (together with Bochs decoder) will replace Bochs disasm module someday (very soon).
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The code already knows to disasm most of the opcodes with their operands.
- Split according to OSIZE opcodes RDFSBASE/WRFSBASE / RDGSBASE/WRGSBASE both for disasm and performance
- Minimize amount of opcode forms in ia_opcodes.h again.
For example Udq means the same as Wdq but with no memory form.
2013-09-30 19:01:42 +00:00
Stanislav Shwartsman
ff79cbd596
Infrstructure change to support disasm of BxInstruction_c directly (without calling disasm)
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The end goal will be also merging of disasm and cpu decoder to one module and remove the disasm.
Two bug fixes on the way:
TBM: fixed 64-bit TBM instructions with memory access (did 32-bit load instead of 64-bit)
BMI2: fixed operands order for PEXT/PDEP instructions
AVX2: fixed gather instruction decoding bug from decoder alias commit
2013-09-24 05:21:00 +00:00
Stanislav Shwartsman
404b8b1475
move end of trace indication to separate 'flags' field of bx_ia_opcode. this saves a lot of code duplication and simplifies the decode tables. also on the way found missing SVM opcodes that missed 'end of trace' mark
2013-09-21 18:58:01 +00:00
Stanislav Shwartsman
cd55ace8c8
fixed compilation err, rename opcode and handler functions for PUSHA/POPA instructions
2013-09-21 10:03:49 +00:00
Stanislav Shwartsman
0441f82b02
implement more AVX512 instructions
2013-09-19 20:35:55 +00:00
Stanislav Shwartsman
8b3a0acde9
implement first EVEX instructions - VADDPS/PD/SS/SD
2013-09-19 18:31:30 +00:00
Stanislav Shwartsman
0cb0acc30f
added evex decode tables - next step to populate them :)
2013-09-15 20:48:39 +00:00
Stanislav Shwartsman
7297323c69
First step of AVX512 support implementation (simplest)
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decode and implement KMASK manipulation instructions
disasm: coming soon
2013-09-08 19:19:16 +00:00
Stanislav Shwartsman
a6b85d9443
compress xop tables for vex.l - smaller binary size
2013-09-06 18:56:46 +00:00
Stanislav Shwartsman
69f947cef2
fixes and small optimizations for avx and xop decoding
2013-09-05 18:29:50 +00:00
Stanislav Shwartsman
59c65151f5
various fixes
2013-08-29 19:43:15 +00:00
Stanislav Shwartsman
5d61c19b0b
evex support - step2
2013-08-27 20:47:24 +00:00
Stanislav Shwartsman
735154a755
oops, typo bug in prev commit
2013-08-24 19:46:04 +00:00
Stanislav Shwartsman
701d88388e
fixed FCS/FDS deprecation
2013-08-22 20:21:36 +00:00
Stanislav Shwartsman
3a7e336cb6
more opcode alias - now VEX.W alias
2013-08-21 18:45:36 +00:00
Stanislav Shwartsman
115ec37a4c
make decoder tables smaller using decode aliases
2013-08-21 04:52:49 +00:00
Stanislav Shwartsman
3fabcb00b7
VMX: CMPXHG instructions should always write to the memory destination, even if the value unchanged - it affects VMEXIT conditions for the full apic virtualization
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Fixed also CMPXHG16B instruction (last one, others were fixed earlier)
2013-08-04 19:37:04 +00:00
Stanislav Shwartsman
7005afd3a8
clean up BxRepeatable attribute - not needed anymore after VL AVX field moved to new location
2013-07-26 15:42:49 +00:00
Stanislav Shwartsman
2dbe81db51
first infrastructure changes to support EVEX prefix and AVX-512 extensions recently published by Intel
2013-07-26 12:50:56 +00:00
Stanislav Shwartsman
852b5c3749
implemented SHA new instructions announced in recent Intel SDM extensions document rev015
2013-07-24 18:44:22 +00:00
Stanislav Shwartsman
c7698a5589
implemented fcs/fds deprecation. added haswell to cpudb.h as well
2013-06-20 20:12:53 +00:00
Stanislav Shwartsman
9651b5d53c
bugfix: vmx preemption timer vmexit should not wakeup CPU from sleep state. cpuid: added definitions from recently published intel SDM rev047
2013-06-04 20:28:27 +00:00
Stanislav Shwartsman
3fbdf7ff03
do not recognize MTRR MSRs when mtrr is not enabled
2013-04-17 19:59:56 +00:00
Stanislav Shwartsman
025fb15461
properly handle RDMSR/WRMSR of MSR_PAT when PAT feature is disabled
2013-04-11 19:41:54 +00:00
Stanislav Shwartsman
a277d60d89
implemented vmentering to non-active cpu state
2013-04-09 15:43:15 +00:00
Stanislav Shwartsman
53d14c01b5
correctly signal bit 12 (nmi unblocking by iret) in vmx interruption info. todo: find how to implement it clean way
2013-03-06 21:11:23 +00:00
Stanislav Shwartsman
1a770dd260
implementation of virtual NMI
2013-03-05 21:12:43 +00:00
Volker Ruppert
058c0e05fb
- removed wx debugger dialogs (enhanced gui debugger now almost stable with wx)
2013-02-16 12:22:13 +00:00
